Abstract: Embodiments of structure and methods for forming a three-dimensional (3D) memory device are provided. In an example, a 3D memory device includes a substrate and a stack structure in an insulating structure on the substrate. The stack structure includes alternating a plurality of conductor layers and a plurality of insulating layers. The 3D memory device further includes a source structure extending vertically through the alternating stack structure. The source structure includes at least one staggered portion along a respective sidewall. The 3D memory device further includes a channel structure and a support pillar each extending vertically through the alternating stack structure and a plurality of contact structures extending vertically through the insulating structure.

Abstract: A semiconductor storage device according to one embodiment includes a stacked body, a pillar, a contact, and a region. In the stacked body, a plurality of electrically conductive layers and a plurality of insulating layers are stacked alternately one on another. The stacked body includes a stair portion in which end portions of the plurality of electrically conductive layers are stair-shaped. The contact is arranged in the stair portion, and connected at a side surface thereof to an nth (where n is an integer of 2 or larger) electrically conductive layer from the lowermost electrically conductive layer. The region is buried within an (n?1)th electrically conductive layer from the lowermost electrically conductive layer. The region includes an electrically conductive member located below the contact, and an insulating member surrounding the electrically conductive member, so that the region is electrically isolated from the (n?1)th electrically conductive layer that surrounds the region.

Abstract: A vertical photodiode includes an active area. The contacting pads for the diode terminals are laterally shifted away from the active area so as to not be located above or below the active area. The active area is formed in a layer of semiconductor material by a lower portion of a germanium area that is intrinsic and an upper portion of the germanium area that is doped with a first conductivity type. The vertical photodiode is optically coupled to a waveguide formed in the layer of semiconductor material.

Abstract: A semiconductor device comprises a stack comprising an alternating sequence of dielectric structures and conductive structures, and a channel structure within an opening vertically extending through the stack and comprising a first semiconductor material having a first band gap. The semiconductor device also comprises a conductive plug structure within the opening and in direct contact with the channel region, and a band offset structure within the opening and in direct physical contact with the channel structure and the conductive plug structure. The band offset structure comprises a second semiconductor material having a second band gap different than the first band gap. The semiconductor device further comprises a conductive line structure electrically coupled to the conductive plug structure. A method of forming a semiconductor device and an electronic system are also described.

Abstract: The present disclosure relates to a method for forming a semiconductor device with a conductive cap layer over a conductive plug. The method includes forming a first word line and a second word line over a semiconductor substrate, and forming a dielectric layer covering the first word line and the second word line. The method also includes forming a conductive plug between the first word line and the second word line, wherein the conductive plug is surrounded by the dielectric layer. The method further includes removing a portion of the dielectric layer to partially expose a sidewall surface of the conductive plug, and forming a conductive cap layer covering a top surface and the sidewall surface of the conductive plug. In addition, the method includes forming a bit line over the conductive plug, wherein the bit line is electrically connected to the conductive plug through the conductive cap layer.

Abstract: According to one embodiment, a semiconductor storage device includes: a stacked body in which a plurality of conductive layers are separated from each other and are stacked; a pillar which extends in a stacking direction and includes memory cells to be formed at intersections with at least some of the plurality of conductive layers; an upper insulating layer arranged on the stacked body; a plug which extends in the stacking direction inside the upper insulating layer and is connected to the upper end portion of the pillar; and a spacer insulating layer which surrounds the plug and has a lower dielectric constant than a dielectric constant of the upper insulating layer.

Abstract: In accordance with one or more aspects of the present disclosure, a semiconductor device is provided. The semiconductor device may include: a plurality of light-emitting devices comprising a first light-emitting device, a second light-emitting device, and a third light-emitting device, wherein each of the plurality of light-emitting devices comprises a first ohmic contact and a second ohmic contact; and a light-conversion device with embedded quantum dots, wherein a first portion of the light-conversion device includes a first plurality of quantum dots for converting light produced by the first light-emitting device into light of a first color, wherein a second portion of the light-conversion device includes a second plurality of quantum dots for converting light produced by the second light-emitting device into light of a second color, and wherein the third light-emitting device emits light of a third color.

Abstract: A semiconductor memory device includes a first stack including lower conductive patterns separated from each other and stacked on a substrate to form a lower stepped structure, a support pillar passing through the first stack and including an insulating layer, a second stack including upper conductive patterns separated from each other and stacked on the first stack, the upper conductive patterns including an upper stepped structure that does not overlap with the lower stepped structure and the support pillar, a channel structure passing through the second stack and the first stack, and a memory layer surrounding a sidewall of the channel structure.

Abstract: A sensor includes: a substrate, a chip, and a protective layer. The chip is arranged on a surface of the substrate, the protective layer includes a silica gel protective layer, a silica gel active layer, and a strength-increasing protective layer. the silica gel protective layer is coated on the chip and adheres to the substrate; the silica gel active layer is coated on an outer surface of the silica gel protective layer, and adhesion of the silica gel active layer is greater than adhesion of the silica gel protective layer; the strength-increasing protective layer is coated on and adheres to an outer surface of the silica gel active layer, and the strength-increasing protective layer adheres to the substrate; and a strength of the strength-increasing protective layer is greater than a strength of the silica gel protective layer.

Abstract: An optoelectronic device including a support, at least hydrophilic photoluminescent blocks including hydrophilic photoluminescent particles covering first areas of the support and hydrophobic photoluminescent blocks including hydrophobic photoluminescent particles covering second areas of the support, the hydrophilic photoluminescent blocks being in contact with a hydrophilic material in the first areas and the hydrophobic photoluminescent blocks being in contact with a hydrophobic material in the second areas.

Abstract: A microelectronic device comprises a stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers. The stack structure comprises a first block structure comprising stair step structures spaced from each other by crest regions, the stair step structures each comprising steps defined at horizontal edges of the tiers of the conductive structures and the insulative structures, and a second block structure horizontally neighboring the first block structure and comprising additional stair step structures spaced from one another by additional crest regions, the additional stair step structures horizontally offset from the stair step structures of the first block structure, and a slot structure extending though the stack structure and interposed between the first block structure and the second block structure. Related microelectronic devices, electronic systems, and methods are also described.

Abstract: A semiconductor memory device, includes: a first region including a memory cell array; and a second region including a peripheral circuit. The second region includes a semiconductor substrate having a first surface and a second surface. The semiconductor substrate includes: a semiconductor region between the first and second surfaces; an n-type semiconductor region provided on the first surface and higher in donor concentration than the semiconductor region; a damaged region provided on the second surface; and a p-type semiconductor region provided between the damaged region and the n-type semiconductor region, closer to the second surface than the n-type semiconductor region in a direction from the first surface toward the second surfaces of the semiconductor substrate, and higher in acceptor concentration than the semiconductor region.

Abstract: A bulk-acoustic wave resonator comprises a substrate, a resonant portion comprising a first electrode, a piezoelectric layer, and a second electrode sequentially stacked on the substrate, and further comprising a center portion and an extension portion that is disposed along a periphery of the center portion, and an insertion layer that is disposed in the extension portion between the first electrode and the piezoelectric layer, and the insertion layer is formed of an aluminum alloy containing scandium (Sc).

Abstract: A semiconductor storage device includes a substrate having a surface, a first conductive layer 25 disposed on a substrate and extending in an X direction parallel to the surface of the substrate; a second conductive layer 25 that disposed on the first conductive layer 25 and extending in the X direction; an insulation plug 30 disposed on the substrate, extends in a Z direction intersecting with the X direction, and intersects with the first conductive layer 25; and a contact plug CC disposed on the first insulation plug 30, extends in the Z direction, and intersects with the second conductive layer 25.

Abstract: An alternating stack of disposable material layers and silicon nitride layers is formed over a substrate. Memory openings are formed through the alternating stack, and memory opening fill structures are formed in the memory openings, wherein each of the memory opening fill structures comprises a charge storage material layer, a tunneling dielectric layer, and a vertical semiconductor channel Laterally-extending cavities are formed by removing the disposable material layers selective to the silicon nitride layers and the memory opening fill structures. Insulating layers comprising silicon oxide are formed by oxidizing surface portions of the silicon nitride layers and portions of the charge storage material layers that are proximal to the laterally-extending cavities. Remaining portions of the charge storage material layers form vertical stacks of discrete charge storage elements. Remaining portions of the silicon nitride layers are replaced with electrically conductive layers.

Abstract: A semiconductor memory device includes a stack structure comprising horizontal electrodes sequentially stacked on a substrate including a cell array region and an extension region and horizontal insulating layers between the horizontal electrodes. The semiconductor memory device may further include vertical structures that penetrate the stack structure, a first one of the vertical structures being on the cell array region and a second one of the vertical structures being on the extension region. Each of the vertical structures includes a channel layer, and a tunneling insulating layer, a charge storage layer and a blocking insulating layer which are sequentially stacked on a sidewall of the channel layer. The charge storage layer of the first vertical structure includes charge storage patterns spaced apart from each other in a direction perpendicular to a top surface of the substrate with the horizontal insulating layers interposed therebetween.

Abstract: A semiconductor memory device includes a first semiconductor layer that includes a first part extending in a first direction, a second part extending in the first direction, and a third part connected to the first and second parts. When a cross-sectional surface extending in second and third directions and including the third part is defined as a first cross-sectional surface, the third part has one side and the other side of an imaginary center line in the third direction in the first cross-sectional surface defined as first and second regions, the third part has maximum widths in the second direction in the first and second regions defined as first and second widths, and the third part has a width in the second direction on the imaginary center line defined as a third width, the third width is smaller than the first and second widths.

Abstract: An organometallic compound is represented by Formula 1 and an organic light-emitting device includes the same. The organic light-emitting device includes: a first; a second electrode facing the first electrode; and an organic layer between the first electrode and the second electrode and including an emission layer, wherein the organic layer includes an organometallic compound represented by Formula 1.

Abstract: According to one embodiment, a semiconductor memory device includes a via provided above a substrate, a conductive layer provided on the via, and a via provided on the conductive layer. The via, the conductive layer, and the via are one continuous structure.

Abstract: Microelectronic devices include a stack structure with a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. A series of slit structures extends through the stack structure and divides the stack structure into a series of blocks. In a progressed portion of the series of blocks, each block comprises an array of pillars extending through the stack structure of the block. Also, each block—in the progressed portion—has a different block width than a block width of a neighboring block of the progressed portion of the series of blocks. At least one pillar, of the pillars of the array of pillars in the progressed portion, exhibits bending. Related methods and electronic systems are also disclosed.