Abstract: For the manufacture of a photovoltaic module (1), there are attached to a transparent substrate (2) a transparent front electrode layer (3), a semiconductor layer (4) and a rear electrode layer (5) which, for forming cells (C1, C2, . . . , Cn, Cn+1) connected in series, are structured by dividing lines (6, 7, 8). A water-soluble detachment mass (12) is applied using an inkjet printer (15) to the regions of the semiconductor layer (4) at which the dividing lines (8) are to be formed in the rear electrode layer (5), whereon the rear electrode layer (5) is attached. The detachment mass (12), with the regions attached thereto of the rear electrode layer (5), is removed using a water jet (13) while forming the dividing lines (8) in the rear electrode layer (5).

Abstract: Small phase change memory cells may be formed by forming a segmented heater over a substrate. A stop layer may be formed over the heater layer and segmented with the heater layer. Then, sidewall spacers may be formed over the segmented heater to define an aperture between the sidewall spacers that may act as a mask for etching the stop layer over the segmented heater. As a result of the etching using the sidewall spacers as a mask, sublithographic pore may be formed over the heater. Phase change material may be formed within the pore.

Abstract: A method for manufacturing a semiconductor device, includes: forming an insulating film on a substrate; selectively removing the insulating film, so as to form a groove including a first groove area having a first depth and a second groove area having a second depth, the second depth being smaller than the first depth; infusing a conductive liquid material into the first groove area and the second groove area; treating the conductive liquid material, so as to form a first conductive film in the first groove area and a second conductive film in the second groove area; and forming a second insulating film on the first and the second conductive films, followed by forming a third conductive film on the second insulating film.

Abstract: To solve a problem that it becomes difficult to lower contact resistance between nickel-based metal silicide and metal for contact as the result of the miniaturization of the hole. One invention of the present application is a method of manufacturing a semiconductor integrated circuit device having a MISFET subjected to silicidation of a source/drain region and the like by nickel-based metal silicide, the method performing a heat treatment for the upper surface of a silicide film in a non-plasma reducing vapor phase atmosphere containing a gas having a nitrogen-hydrogen bond as one of main gas components, before forming a barrier metal at a contact hole provided at a pre-metal insulating film.

Abstract: A method of manufacturing a semiconductor wafer, the method comprising: providing a base wafer comprising a semiconductor substrate, metal layers and first alignment marks; transferring a monocrystalline layer on top of said metal layers, wherein said monocrystalline layer comprises second alignment marks; and performing a lithography using an alignment based on a misalignment between said first alignment marks and said second alignment marks.

Abstract: A method for manufacturing a reflective surface sub-assembly for a light-emitting device, comprising a substrate, at least one area reserved for placement of a light-emitting device assembly on the substrate, and a diffusive reflective layer applied on selected regions on the substrate, wherein if the light-emitting device assembly were placed onto the at least one area then the diffusive reflective layer would reflect photons emitted by the light-emitting device assembly is disclosed.

Abstract: In methods of fabricating a semiconductor device having multiple channel transistors and semiconductor devices fabricated thereby, the semiconductor device includes an isolation region disposed within a semiconductor substrate and defining a first region. A plurality of semiconductor pillars self-aligned with the first region and spaced apart from each other are disposed within the first region, and each of the semiconductor pillars has at least one recessed region therein. At least one gate structure may be disposed across the recessed regions, which crosses the semiconductor pillars and extends onto the isolation region.

Abstract: A method of forming a microelectronic device comprising, on a same support: at least one semi-conductor zone strained according to a first strain, and at least one semi-conductor zone strained according to a second strain, different to the first strain, comprising: the formation of semi-conductor zones above a pre-strained layer, then trenches extending through the thickness of the pre-strained layer, the dimensions and the layout of the semi-conductor zones as a function of the layout and the dimensions of the trenches being so as to obtain semi-conductor zones having a strain of the same type as that of the pre-strained layer and semi-conductor zones having a strain of a different type to that of the pre-strained layer.

Abstract: Embodiments of the invention contemplate the formation of a high efficiency solar cell using novel methods to form the active doped region(s) and the metal contact structure of the solar cell device. In one embodiment, the methods include the steps of depositing a dielectric material that is used to define the boundaries of the active regions and/or contact structure of a solar cell device. Various techniques may be used to form the active regions of the solar cell and the metal contact structure.

Abstract: A method of manufacturing a semiconductor device includes a process of forming a STI trench in a substrate, a process of forming a thermal oxide film on a sidewall and a bottom surface of the STI trench, a process of performing a plasma treatment on a surface of the thermal oxide film that is located at a bottom portion of the STI trench, and a process of forming an insulating film in the STI trench using a CVD method.

Abstract: A method for the fabrication of a semiconductor structure that includes areas that have different crystalline orientation and semiconductor structure formed thereby. The disclosed method allows fabrication of a semiconductor structure that has areas of different semiconducting materials. The method employs templated crystal growth using a Vapor-Liquid-Solid (VLS) growth process. A silicon semiconductor substrate having a first crystal orientation direction is etched to have an array of holes into its surface. A separation layer is formed on the inner surface of the hole for appropriate applications. A growth catalyst is placed at the bottom of the hole and a VLS crystal growth process is initiated to form a nanowire. The resultant nanowire crystal has a second different crystal orientation which is templated by the geometry of the hole.

Abstract: Disclosed is a novel method for creating local contacts in solar cells. In the method, a surface passivation that has been applied to a semiconductor substrate is locally etched away using a plasma process with the help of a thin stretched, elastic foil. If necessary, deep doping gradients are then locally created at the same points by means of a hydrogen plasma treatment with the help of thermal donors so as to increase the diffusion length of the charge carriers in the direction of the contacts. Finally, local heterostructure contacts are applied through the same mask openings. The contacts are characterized by a much lower saturation current than common diffused contacts and are therefore particularly suitable for high-performance solar cells.

Abstract: A method for forming an electrolytic capacitor is disclosed. The method includes forming a conductive polymer coating over the dielectric layer by polymerizing a monomer in the presence of an oxidative polymerization catalyst. The conductive polymer coating is formed by dipping the anode in a polymerization solution comprising the monomer, the oxidative polymerization catalyst, and a polar solvent. The polymerization solution has a temperature of less than about 20° C. Cooling the polymerization solution further stabilizes the polymerization solution and prevents premature polymerization of the monomer(s). Thus, the resulting conductive polymer layer can be more intimately positioned with respect to the anode. As a result, the formed capacitor can exhibit better performance.

Abstract: A method of making a semiconductor chip assembly includes providing a post and a base, mounting an adhesive on the base including inserting the post into an opening in the adhesive, mounting a substrate on the adhesive including aligning the post with an aperture in the substrate, then flowing the adhesive into and upward in a gap located in the aperture between the post and the substrate, solidifying the adhesive, then etching the post to form a cavity in the post, then mounting a semiconductor device on the post, wherein a heat spreader includes the post and the base and the semiconductor device extends into the cavity, electrically connecting the semiconductor device to the substrate and thermally connecting the semiconductor device to the heat spreader.

Abstract: A semiconductor device manufacturing method includes forming a first film made of a first metal to an upper portion of a substrate, forming a second film made of an amorphous metal oxide or an microcrystalline metal oxide on the first film, subjecting the second film to a heat treatment, subjecting the second film after the heat treatment to a reduction treatment, forming a third film made of a ferroelectric material on the second film, and forming a fourth film made of a second metal on the third film.

Abstract: Methods of preparing photovoltaic modules, as well as related components, systems, and devices, are disclosed.

Abstract: A method of manufacturing a semiconductor device includes the following processes. A first gate trench is formed if a semiconductor substrate region. Then a first insulating film is formed to cover bottom and side surfaces of the first gate trench. Then, the first insulating film is removed to cover the bottom surface. Then, the semiconductor substrate region exposed to the first gate trench is etched by the first insulating film covering the side surfaces as a mask, to form, in the semiconductor substrate region, a second gate trench directly below the first gate trench. The second gate trench is defined by an unetched film portion of the semiconductor substrate region. The unetched film portion extends toward one of the side surfaces of the first gate trench.

Abstract: Under one aspect, a method of cooling a circuit element includes providing a thermal reservoir having a temperature lower than an operating temperature of the circuit element; and providing a nanotube article in thermal contact with the circuit element and with the reservoir, the nanotube article including a non-woven fabric of nanotubes in contact with other nanotubes to define a plurality of thermal pathways along the article, the nanotube article having a nanotube density and a shape selected such that the nanotube article is capable of transferring heat from the circuit element to the thermal reservoir.

Abstract: A silicon-based thin film mass-producing apparatus, including transparent electrodes placed to face in parallel to corresponding counter electrodes with a space therebetween, and silicon-based thin films are deposited on the transparent electrodes by feeding a raw material gas for depositing the silicon-based thin films into the chamber and by applying a DC pulse voltage to the counter electrodes to generate plasma. Unlike methods in which a radio frequency voltage is intermittently applied to perform discharge, a high plasma density distribution does not occur, and in-plane film thickness distribution does not occur. Furthermore, since the DC pulse voltage rises sharply, the ON period can be shortened. As a result, generation of a sheath ceases in the transient state before reaching the steady state, and the thickness of the sheath is small, which allows the space between the counter and transparent electrodes to decrease.

Abstract: A silicon-based thin film depositing apparatus, including a plurality of transparent electrodes disposed to face corresponding counter electrodes with a space therebetween. Subsequently, while injecting a raw material gas from raw material gas injection orifices toward the supporting electrodes and also injecting a barrier gas from barrier gas injection orifices in the same direction as the direction in which the raw material gas is injected, the gases are discharged from a gas outlet, and thereby, the pressure in a chamber is controlled to a pressure of more than 1 kPa. Then, a DC pulse voltage is applied to each counter electrode to deposit a silicon-based thin film. A DC pulse voltage is applied to perform discharge. Therefore, even in a state where the distance between the electrodes is increased, plasma can be generated efficiently, and the in-plane distribution of film thickness can be improved.