Abstract: There is provided a method for suppressing the occurrence of defects such as voids or blisters even in the laminated wafer having no oxide film wherein hydrogen ions are implanted into a wafer for active layer having no oxide film on its surface to form a hydrogen ion implanted layer, and ions other than hydrogen are implanted up to a position that a depth from the surface side the hydrogen ion implantation is shallower than the hydrogen ion implanted layer, and the wafer for active layer is laminated onto a wafer for support substrate, and then the wafer for active layer is exfoliated at the hydrogen ion implanted layer.

Abstract: Various embodiments provide a buffer layer that is grown over a silicon substrate that provides desirable device isolation for devices formed relative to III-V material device layers, such as InSb-based devices, as well as bulk thin film grown on a silicon substrate. In addition, the buffer layer can mitigate parallel conduction issues between transistor devices and the silicon substrate. In addition, the buffer layer addresses and mitigates lattice mismatches between the film relative to which the transistor is formed and the silicon substrate.

Abstract: A method of forming a diffraction grating according to the present invention includes a step of preparing a mold having projections and recesses for forming a diffraction grating, a step of bringing the projections and recesses of the mold into contact with a resin layer in a chamber at a first pressure less than atmospheric pressure, a step of setting a pressure in the chamber to a second pressure more than the first pressure while maintaining the contact, and a step of hardening the resin layer while maintaining the contact between the resin layer and the projections and recesses so as to form a pattern for the diffraction grating on the hardened resin layer. The recesses in the projections and recesses of the mold form a closed pattern in the plane of the mold including the projections and recesses.

Abstract: As to each of a capacitor element employing an anode foil having a matrix made of a metal and a film, provided on the surface of the matrix, made of an oxide of a metal different from the metal of the matrix and a capacitor element employing an anode foil having a matrix made of a prescribed metal and a film of an oxide of the metal and a cathode foil having a matrix made of another metal different from the metal, formation treatment is performed on an end face of the anode foil exposing the surface of the metal forming the matrix by applying a positive voltage to an anode lead wire and applying a negative voltage to a cathode lead wire. Thus, an electrolytic capacitor resistant against corrosion or the like is obtained.

Abstract: An object of the present invention is to provide solder bumps sufficiently satisfying the expected functions and having a small diameter which conventional methods cannot attain, a semiconductor device on which these bumps are mounted, and a bump transferring sheet. The present invention provides a method for forming the bumps, which includes forming a solder alloy material layer and flux material layer one by one on an intermediate metallic layer formed on an external electrode pad in a semiconductor device, and then fusing these layers, wherein each of the solder alloy material layer and flux material layer is formed by a liquid spraying method (e.g., ink jetting method).

Abstract: The present subject matter includes a method that includes joining a first connection member to an unetched connection area, the unetched connection area located on a single major surface of a first planar anode, forming a capacitor stack by aligning the first planar anode with at least a second planar anode, the second planar anode including at least a second connection member, the first connection member and the second connection member for electrical connection of the first planar anode to the second planar anode, aligning the first connection member and the second connection member to define an anode connection surface and joining the first planar anode and the second planar anode.

Abstract: The present invention relates to a production method of a solid electrolytic capacitor element wherein a semiconductor layer is formed by electrolytic polymerization on an oxide dielectric film formed on the surface of an electric conductor and an electrode layer is laminated thereon, comprising passing current providing a period for temporarily applying a reverse voltage during the electrolytic polymerization passing current using an electric conductor having a dielectric layer formed thereon as an anode and a negative electrode plate placed in the electrolyte as a cathode; a solid electrolytic capacitor element produced by the method; a solid electrolytic capacitor obtained from the solid electrolytic capacitor element and use thereof. According to the present invention, a solid electrolytic capacitor element in which a high quality semiconductor layer is formed in a short time can be produced, which enables to produce a solid electrolytic capacitor having a good ESR property.

Abstract: Provided is a method of manufacturing a solid electrolytic capacitor having a solid electrolyte. The solid electrolyte having a conductive polymer is formed by an oxidative polymerization reaction, using a polymerization liquid containing a monomer and a dopant. The dopant contains alkylammonium ions as a cationic component.

Abstract: In a method for producing epitaxially coated semiconductor wafers, a multiplicity of prepared, front side-polished semiconductor wafers are successively coated individually with an epitaxial layer on their polished front sides at temperatures of 800-1200° C. in a reactor, while supporting the prepared semiconductor wafer over a susceptor having a gas-permeable structure, on a ring placed on the susceptor which acts as a thermal buffer between the susceptor and the supported semiconductor wafer, the semiconductor wafer resting on the ring, and its backside facing but not contacting the susceptor, so that gaseous substances are delivered from a region over the backside of the semiconductor wafer by gas diffusion through the susceptor into a region over the backside of the susceptor, the semiconductor wafer contacting the ring only in an edge region of its backside, wherein no stresses measurable by means of photoelastic stress measurement (“SIRD”) occur in the semiconductor wafer.

Abstract: A Zener diode-capacitor combination wherein a Zener diode is mounted in the capacitor body and connected in parallel with the capacitor after the capacitor has been voltage tested. A welded strap or jumper wire completing the diode circuit or a connection of separate terminations during soldering may be used to complete the circuit.

Abstract: An improved method for forming a capacitor. The method includes providing a carrier with a channel therein, providing a metal foil with a valve metal with a first dielectric on a first face of the metal foil, securing the metal foil into the channel with the first dielectric away from a channel floor, inserting an insulative material between the metal foil and each side wall of the channel, forming a cathode layer on the first dielectric between the insulative material, forming a conductive layer on the cathode layer and in electrical contact with the carrier, lap cutting the carrier parallel to the metal foil such that the valve metal is exposed, and dice cutting to form singulated capacitors.

Abstract: It is an object of the invention that, in semiconductor device, in order to promote the tendency of miniaturization of each display pixel pitch, which will be resulted in with the tendency toward the higher precision (increase of pixel number) and further miniaturizations, a plurality of elements is formed within a limited area and the area occupied by the elements is compacted so as to be integrated. A plurality of semiconductor layers 13, 15 is formed on different layers with insulating film 14 sandwiched therebetween. After carrying out crystallization by means of laser beam, on each semiconductor layer (semiconductor layers 16, 17 having crystal structure respectively), an N-channel type TFT of inversed stagger structure and a P-channel type TFT 30 of top gate structure are formed respectively and integrated so that the size of CMOS circuit is miniaturized.

Abstract: A method of manufacturing a semiconductor device comprising the steps of (1) applying an underfill composition to a surface of a silicon wafer, (2) dicing the silicon wafer into chips, (3) positioning the chip, and (4) bonding the chip to the substrate, characterized in that the underfill composition consists of a first underfill composition and a second underfill composition, the step (1) comprises the steps of (i) applying the first underfill composition on the surface of the silicon wafer and then bringing the applied first underfill composition into a B-stage to form a layer of the first underfill composition having a thickness ranging from 0.5 to 1.0 time the height of the solder bump, and (ii) applying the second underfill composition on the B-stage first underfill composition layer and bringing the applied second underfill composition into a B-stage to form a layer wherein a total thickness of the B-stage first underfill composition and the B-stage second underfill composition ranges from 1.0 to 1.

Abstract: The present invention concerns the field of solid state capacitors and in particular high performance capacitors for use in modern electronic devices. Specifically, the present invention relates to a method by which powders of valve-action material may be modified to make them suitable for use in the formation of capacitor anodes for solid state electrolytic capacitors. According to the present invention there is provided a method of modifying raw valve-action material powder into capacitor grade structured powder comprising: (i) providing a raw powder to be converted; (ii) compressing a portion of the powder to form a porous solid mass of powder (iii) heating the solid mass to a pre-determined sintering temperature and maintaining the temperature for a pre-determined time period to form a sintered body, (iv) pulverising the sintered body to form a processed powder and (v) optionally grading the powder particles within pre-determined size ranges so as to collect capacitor grade powder.

Abstract: Provided is an organic light emitting display, in which a semiconductor circuit unit of 2T-1C structure including a switching transistor and a driving transistor formed of single crystalline silicon is formed on a plastic substrate. A method of fabricating the single crystalline silicon includes: growing a single crystalline silicon layer to a predetermined thickness on a crystal growth plate; depositing a buffer layer on the single crystalline silicon layer; forming a partition layer at a predetermined depth in the single crystalline silicon layer by, e.g., implanting hydrogen ions in the single crystalline silicon layer from an upper portion of an insulating layer; attaching a substrate to the buffer layer; and releasing the partition layer of the single crystalline silicon layer by heating the partition layer from the crystal growth plate to obtain a single crystalline silicon layer of a predetermined thickness on the substrate.

Abstract: Piezoelectric ultracapacitor is disclosed capable of converting the kinetic energy of ordinary motion into an electrical potential. The piezoelectric ultracapacitor of the present invention may be used in various contexts, including power generation, switching and control and memory.

Abstract: Techniques for manufacturing a bond pad structure are provide. A method includes providing a substrate. A metal pad and passivation layer are formed over the substrate. The passivation layer includes an opening to expose a portion of the metal pad. A first film is deposited at least over the exposed portion of the metal pad. A second film is deposited over the first film. A photoresist layer is deposited over the substrate, and a trench is formed in the photoresist layer directly over the portion of the metal pad. A first layer is electroplated in the trench over the second film, and a barrier layer is electroplated in trench over the first layer. A termination electrode, comprising tin, is electroplated in the trench over the barrier layer. The photoresist layer is removed. In addition, the method can include etching to remove the second film and first film beyond a predetermined area. The termination electrode is then reflowed.

Abstract: Particles of active electrode material are made by blending mixing a mixture of activated carbon and binder. In selected implementations, sulfur level in the activated carbon is relatively low and the binder is inert. For example, sulfur content of the activated carbon and the resultant mixture is below 300 ppm and in other implementations, below 50 ppm. The electrode material may be attached to a current collector to obtain an electrode for use in various electrical devices, including a double layer capacitor. The electrode decreases current leakage of the capacitor.

Abstract: A method of manufacturing the solar cell module 100 according to the embodiment of the present invention includes: a step of forming the plurality of thin line-shaped electrodes and the connecting electrode connected to one end portion of each of the plurality of thin line-shaped electrodes; a step of disposing the first resin layer on the blanket; and a step of transferring the first resin layer onto the blanket by pressing the blanket against the photoelectric conversion part. In the disposing step, the plurality of concave portions is formed in the first resin layer along the outer edge of the connecting electrode. In the transferring step, each concave portion is disposed at one end portion of each thin line-shaped electrode.

Abstract: A method for making a silicon substrate having a buried thin silicon oxide film is described. The method consists of: a) producing a first element having a first silicon body whereof the main surface is coated, in succession, with a buffer layer of germanium, or of an alloy of germanium and silicon, and with a thin silicon film; b) producing a second element, having a silicon body whereof a main surface is coated with a thin silicon oxide film; c) linking the first element with the second element such that the thin silicon film of the first element is in contact with the thin silicon oxide film of the second element; and d) eliminating the buffer layer to recuperate the silicon substrate having a buried thin silicon oxide film and a reusable silicon substrate. The method may be useful in making microelectronic devices such as CMOS and MOSFET devices.