Patents Examined by Sherman Ng
  • Patent number: 11716814
    Abstract: A display panel includes a plastic substrate and a first inner lead bonding (ILB) electrode on the plastic substrate. The first ILB electrode includes a first bonding segment, a second bonding segment, and a first connection segment. The first bonding segment is extended in a first direction oblique to a vertical direction of the display panel. The first connection segment is configured to provide an electrical connection between the first bonding segment and the second bonding segment. The first ILB electrode is configured to be bonded to an integrated circuit chip using one of the first bonding segment or the second bonding segment.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: August 1, 2023
    Assignee: Synaptics Incorporated
    Inventors: Toshifumi Ogata, Atsushi Maruyama, Goro Sakamaki
  • Patent number: 11711893
    Abstract: The present disclosure relates to an electronic component, a voltage regulation module and a voltage stabilizer. The electronic component may include a substrate, a first electronic element and a second electronic element. The substrate may be provided with a first surface and a second surface that are opposite to each other. The first electronic element may be embedded in the substrate, and may be provided with a first electrical connection terminal and a second electrical connection terminal. The first electrical connection terminal may connect with a first surface of the substrate, the second electrical connection terminal may connect with a second surface of the substrate. The second electronic element may be arranged on the second surface of the substrate and electrically connected to the second electrical connection terminal. The second electronic element may form a stack with the substrate along the first direction.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: July 25, 2023
    Assignee: SHENNAN CIRCUITS CO., LTD.
    Inventors: Lixiang Huang, Jin Dong, Hua Miao
  • Patent number: 11706887
    Abstract: An electronic device including a waterproof structure is provided. The electronic device includes a housing that includes a first face, a second face that faces in a direction substantially opposite to the first face, and a side surface that at least partially encloses a space between the first face and the second face, a middle plate arranged between the first face and the second face inside the housing to be substantially parallel to the first face, extending from the side surface, and including at least one opening, a printed circuit board arranged between the middle plate and the second face, a display arranged between the middle plate and the first face, and including a face directed toward the second face, and a seal member configured to hermetically seal the at least one opening of the middle plate, and arranged between the face of the display and the middle plate.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: July 18, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Min Choi, Woong-Chan Kim, Daehyeong Park, Sung-Gun Cho, Sung-Joo Cho, Young-Sik Choi, Kwang-Hwan Kim, Soonwoong Yang, Min-Sung Lee, Seungjoon Lee, Yuchul Chang
  • Patent number: 11706871
    Abstract: An circuit board assembly includes a first circuit board, a second circuit board stacked with the first circuit board, and a connection plate connected between the first circuit board and the second circuit board. The connection plate includes a signal transmission part and at least one ground part at a spacing to the signal transmission part. The ground part can be used as a reference ground for a signal transmitted by the signal transmission part, so that the characteristic impedance of the signal transmission part is controllable, and the signal transmitted by the signal transmission part has strong continuity, thereby maintaining good matching performance and reducing an insertion loss caused by characteristic impedance mismatch.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: July 18, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Hui Wang, Dan Qiu, Zhijun Chen, Daiping Tang
  • Patent number: 11706870
    Abstract: A structure includes a first copper layer and a first carbon layer applied directly to a surface of the first copper layer, a second copper layer and a second carbon layer applied directly to a surface of the second copper layer, and an insulating core disposed between the first and second copper layers. Each of the first carbon layer and the second carbon layer faces toward and directly contacts the insulating core. The structure provides electrical power to a component of an electronic device.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: July 18, 2023
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Joel Goergen, Jessica Kiefer, Alpesh Umakant Bhobe, Kameron Rose Hurst, D. Brice Achkir, Amendra Koul, Scott Hinaga, David Nozadze
  • Patent number: 11696400
    Abstract: An embedded module according to the present invention includes a base substrate having a multi-layer wiring, at least two semiconductor chip elements having different element thicknesses, each of the semiconductor chip element having a first surface fixed to the base substrate and having a connection part on a second surface, an insulating photosensitive resin layer enclosing the semiconductor chip elements on the base substrate and being formed by a first wiring photo via, a second wiring photo via, and a wiring, the first wiring photo via electrically connected to the connection part of the semiconductor chip elements, the second wiring photo via arranged at the outer periphery of each of the semiconductor chip elements and electrically connected to a connection part of the base substrate, the wiring arranged so as to be orthogonal to and electrically connected to the first wiring photo via and the second wiring photo via.
    Type: Grant
    Filed: February 6, 2022
    Date of Patent: July 4, 2023
    Assignee: RISING TECHNOLOGIES CO., LTD.
    Inventor: Shuzo Akejima
  • Patent number: 11688614
    Abstract: A process condition sensing apparatus is disclosed. The apparatus includes a substrate and an electronic enclosure including one or more electronic components. The apparatus includes a floating connection assembly configured to mechanically couple the electronic enclosure to the substrate, the floating connection assembly includes a leg and a foot. The leg or foot are arranged to mitigate thermal stress between one or more interfaces. The one or more interfaces include a leg-enclosure interface or a foot-substrate interface.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: June 27, 2023
    Assignee: KLA Corporation
    Inventors: Farhat A. Quli, Razieh Mahzoon, Ran Liu
  • Patent number: 11689004
    Abstract: A connector includes a first connector body and a second connector body configured to be coupled to one another. The first connector body has a through hole and a cavity. The through hole and the cavity are configured to receive a shield of a hardline coaxial cable. A first washer is disposed in the first connector body and is configured to permit the shield to be pushed in a first direction through the through hole and into the cavity while resisting movement of the shield in a second direction opposite to the first direction. The second connector body has a through hole and a cavity. The through hole and the cavity of the second connector body are configured to receive a tubular member. A second washer is disposed in the second connector body and is configured to permit the tubular member to be pushed in the second direction through the through hole of the second connector body and into the cavity of the second connector body while resisting movement of the tubular member in the first direction.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: June 27, 2023
    Assignee: PPC BROADBAND, INC.
    Inventor: Eric J. Purdy
  • Patent number: 11682980
    Abstract: An improved distributed-output multi-cell-element power converter utilizes a multiplicity of magnetic core elements, switching elements, capacitor elements and terminal connections in a step and repeat pattern. Stepped secondary-winding elements reduce converter output resistance and improve converter efficiency and scalability to support the high current requirements of very large scale integrated (“VLSI”) circuits.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: June 20, 2023
    Assignee: Vicor Corporation
    Inventor: Patrizio Vinciarelli
  • Patent number: 11665824
    Abstract: An apparatus includes a substrate, a switching device, a capacitor device, a first via, a second via, a third via and a fourth via. The substrate has a first surface and a second surface and includes a plurality of copper layers including M positive copper layers and N negative copper layers. The M positive copper layers and the N negative copper layers are alternated. The switching device is disposed on the first surface and includes a switching positive terminal and a switching negative terminal. The capacitor device is disposed on the first surface and includes a capacitor positive terminal and a capacitor negative terminal, and the capacitor device forms a capacitor area. The projections of the adjacent positive and negative copper layers and the capacitor area on the first surface at least partially overlap with each other.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: May 30, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Da Jin, Shengli Lu
  • Patent number: 11659663
    Abstract: This disclosure describes an electronic component with a package body which comprises a set of sidewalls and a bottom wall. One or more chip mounting elements extend into the space within the package from the inner surface of at least one sidewall, and at least one electronic chip is attached to the chip mounting elements. The electronic component also comprises one or more stiffening elements which extend inside the space within the package from the inner surface of one of the sidewalls to the outer surface of the bottom wall. These stiffening elements are separated from the one or more chip mounting elements inside the enclosed inner space.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: May 23, 2023
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kimmo Kaija
  • Patent number: 11651897
    Abstract: An electronic component includes a capacitor body having alternately stacked first and second internal electrodes with dielectric layers therebetween, the capacitor body having first to sixth surfaces and the first internal electrodes and the second internal electrodes being exposed through the third surface and the fourth surface, respectively. First and second external electrodes are disposed respectively on the third and fourth surfaces of the body and respectively connected to the first and second internal electrodes. A shielding layer includes a cap portion disposed on the second surface of the capacitor body and a side wall portion disposed on the third, fourth, fifth, and sixth surfaces of the capacitor body, and an insulating layer is disposed between the capacitor body and the shielding layer. The shielding layer consists of first and second shielding layers offset from each other in a direction connecting the third and fourth surfaces.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: May 16, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chan Yoon, Sang Soo Park, Hwi Dae Kim, Woo Chul Shin, Ji Hong Jo
  • Patent number: 11647582
    Abstract: A multi-layer ceramic wiring board is patterned with arrays of footprints for high-temperature surface mounted device active and passive components on one side of the board that is patterned with arrays of standard SMD footprints to enable placement and attachment of components including primary 2-terminal components and active components where the SMD pads are connected through vias and buried-layer interconnect traces to a multiple connection point arrays on the front and back side of the ceramic wiring board. Each pad is connected to multiple instances of the pad grid to connections to be made with a single post-fired print.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: May 9, 2023
    Inventors: Ian Getreu, James A. Holmes, Brandon Dyer, Jacob Kupernik, Matthew Barlow, Nicholas Chiolino, Anthony Matt Francis
  • Patent number: 11646133
    Abstract: A method of extending the usable length of a power-over-ethernet cable includes the steps of providing twisted pairs of wires with the conductor of each wire being a 20 AWG or 22 AWG conductor and terminating the cable at an RJ-45 style connector. The connector for the 20 AWG conductors has an insert therein with holes that can accommodate 20 AWG conductors. FEP, PVC or PP insulation may surround each conductor.
    Type: Grant
    Filed: January 5, 2023
    Date of Patent: May 9, 2023
    Assignee: Paige Electric Company, LP
    Inventor: Francis X. Conaty
  • Patent number: 11641720
    Abstract: A circuit board includes a composite structure layer, at least one conductive structure, a thermally conductive substrate, and a thermal interface material layer. The composite structure layer has a cavity and includes a first structure layer, a second structure layer, and a connecting structure layer. The first structure layer includes at least one first conductive member, and the second structure layer includes at least one second conductive member. The cavity penetrates the first structure layer and the connecting structure layer to expose the second conductive member. The conductive structure at least penetrates the connecting structure layer and is electrically connected to the first conductive member and the second conductive member. The thermal interface material layer is disposed between the composite structure layer and the thermally conductive substrate, and the second structure layer is connected to the thermally conductive substrate through the thermal interface material layer.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: May 2, 2023
    Assignee: Unimicron Technology Corp.
    Inventors: Pei-Wei Wang, Shao-Chien Lee, Ra-Min Tain, Chi-Chun Po, Po-Hsiang Wang, Pei-Chang Huang, Chin-Min Hu
  • Patent number: 11627659
    Abstract: A printed circuit board includes a first insulating layer; a first wiring layer having at least a portion buried in one surface side of the first insulating layer and having at least a portion of one surface exposed from the one surface of the first insulating layer; a metal post disposed on the exposed one surface of at least the portion of the first wiring layer; and a second wiring layer disposed on the other surface of the first insulating layer. A width of a first surface, connected to the exposed one surface of at least a portion of the first wiring layer, of the metal post, is greater than a width of a second surface of the metal post opposing the first surface.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: April 11, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Je Sang Park, Sang Ho Jeong, Yong Duk Lee
  • Patent number: 11600433
    Abstract: An electrical device having a stranded wire contact. The device includes a stranded wire with individual wires and a contact piece for electrical contacting of the stranded wire. The stranded wire contact is produced by thermal diffusion bonding.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: March 7, 2023
    Assignee: TDK Electronics AG
    Inventors: Yun Jiang, Karl Stoll
  • Patent number: 11581123
    Abstract: An inductor unit includes a conductive structure, a first magnetic element and an insulating layer. The conductive structure has a bottom conductive layer, a top conductive layer, and a first side conductive layer extending from the bottom conductive layer to the top conductive layer. The first magnetic element is disposed on the bottom conductive layer of the conductive structure. The insulating layer is disposed on the bottom conductive layer of the conductive structure, wherein the insulating layer covers and surrounds the first magnetic element. The circuit structure including the inductor unit and the methods for manufacturing the same are also provided.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: February 14, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Syu-Tang Liu, Huang-Hsien Chang, Yunghsun Chen
  • Patent number: 11581667
    Abstract: A connector includes a first connector body having a through hole configured to receive a conduit, a first washer disposed in the first connector body, the first washer being configured to permit the conduit to be pushed in a first direction through the through hole while resisting movement of the conduit in a second direction opposite to the first direction, a second connector body configured to be coupled to the first connector body, the second connector body having a through hole configured to receive a tubular member, and a second washer disposed in the second connector body, the second washer being configured to permit the tubular member to be pushed in the second direction through the through hole of the second connector body and into the second connector body while resisting movement of the tubular member in the first direction.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: February 14, 2023
    Assignee: PPC BROADBAND, INC.
    Inventors: Eric Purdy, Richard Maroney
  • Patent number: 11576260
    Abstract: An electrical component is configured to allow electrical cables to be mounted directly to a package substrate, such that electrical traces of the package substrate directly place the electrical cables in electrical communication with an integrated circuit that is mounted to the package substrate without passing through any separable interfaces of an electrical connector.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: February 7, 2023
    Assignee: SAMTEC, INC.
    Inventor: James Dunlop