Abstract: Provided is a polishing composition which contains a water-soluble polymer and is suitable for reducing LPDs. The polishing composition provided in this application includes an abrasive, a water-soluble polymer, and a basic compound. In the polishing composition, the content of a reaction product of a polymerization initiator and a polymerization inhibitor is 0.1 ppb or less of the polishing composition on a weight basis.

Abstract: A substrate processing method includes (a) forming a recess on a workpiece by partially etching the workpiece; and (b) forming a film having a thickness that differs along a depth direction of the recess, on a side wall of the recess. Step (b) includes (b-1) supplying a first reactant, and causing the first reactant to be adsorbed to the side wall of the recess; and (b-2) supplying a second reactant, and causing the second reactant to react with the first reactant thereby forming a film.

Abstract: A method and apparatus for calibrating a temperature within a processing chamber are described. The method includes determining an etch rate of a layer within the processing chamber. The processing chamber is a deposition chamber configured for use during semiconductor manufacturing. The etch rate is utilized to determine a temperature within the processing chamber. The temperature within the processing chamber is then subsequently compared to a calibrated temperature to determine a temperature offset. The etch rate is determined using any one of a pyrometer, a reflectometer, a camera, or a mass sensor.

Abstract: A method for manufacturing an integrated circuit includes patterning a plurality of photomask layers over a substrate, partially backfilling the patterned plurality of photomask layers with a first material using atomic layer deposition, completely backfilling the patterned plurality of photomask layers with a second material using atomic layer deposition, removing the plurality of photomask layers to form a masking structure comprising at least one of the first and second materials, and transferring a pattern formed by the masking structure to the substrate and removing the masking structure. The first material includes a silicon dioxide, silicon carbide, or carbon material, and the second material includes a metal oxide or metal nitride material.

Abstract: A method for preparing a semiconductor device structure is provided. The method includes forming a target layer over a semiconductor substrate; forming an energy-sensitive layer over the target layer; performing a first energy treating process to form a plurality of first treated portions in the energy-sensitive layer; performing a second energy treating process to form a plurality of second treated portions in the energy-sensitive layer; removing the first treated portions and the second treated portions to respectively form a plurality of first openings and a plurality of second openings; transferring the first openings and the second openings into the target layer to respectively form a plurality of third openings and a plurality of fourth openings; and transferring the third openings and the fourth openings into the semiconductor substrate to respectively form a plurality of fifth openings and a plurality of sixth openings.

Abstract: The present invention provides means capable of achieving both a reduction in the number of defects and a reduction in haze in an object to be polished after polishing at a high level in a method of polishing the object to be polished containing a material having a silicon-silicon bond. The present invention relates to a method of polishing an object to be polished containing a material having a silicon-silicon bond, and the polishing method includes a final polishing step Pf.

Abstract: Atomic layer etching (ALE) of a substrate using a wafer scale wave of precisely controlled electrons is presented. A volume of gaseous plasma including diluent and reactive species and electrons of a uniform steady state composition is generated in a positive column of a DC plasma proximate the substrate. A corrosion layer is formed on the substrate by adsorption of the reactive species to atoms at the surface of the substrate. The substrate is positively biased to draw electrons from the volume to the surface of the substrate and impart energy to the electrons to stimulate electron transitions in the corrosion layer species, resulting in ejection of the corrosion layer species via electron stimulation desorption (ESD). The substrate is negatively biased to repel the electrons from the surface of the substrate back to the volume, followed by a zero bias to restore the steady state composition of the volume.

Abstract: In a method of manufacturing a semiconductor device, a metallic photoresist layer is formed over a target layer to be patterned, the metallic photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern. The metallic photo resist layer is an alloy layer of two or more metal elements, and the selective exposure changes a phase of the alloy layer.

Abstract: As deposited, hard mask thin films have internal stress components which are an artifact of the material, thickness, deposition process of the mask layer as well as of the underlying materials and topography. This internal stress can cause distortion and twisting of the mask layer when it is patterned, especially when sub-micron critical dimensions are being patterned. A stress-compensating process is employed to reduce the impact of this internal stress. Heat treatment can be employed to relax the stress, as an example. In another example, a second mask layer with an opposite internal stress component is employed to offset the internal stress component in the hard mask layer.

Abstract: A method for atomic layer etching a metal containing layer is provided. At least a region of a surface of the metal containing layer is modified to form a modified metal containing region by exposing a surface of the metal containing layer to a modification gas, wherein adjacent to the modified metal containing region remains an unmodified metal containing region. The modified metal containing region is selectively removed with respect to the unmodified metal containing region by exposing the surface of the metal containing layer to an inert bombardment plasma generated from an inert gas.

Abstract: A semiconductor fabricating method for a film to be processed containing a transition metal on an upper surface of a semiconductor wafer placed in a processing chamber in a container being etched with a gas for complexing the transition metal supplied into the processing chamber, including a first step of adsorbing, to the film, the complexing gas, while supplying the complexing gas, then increasing a temperature of the wafer to form an organic metal complex on a surface of the film, and volatilizing and desorbing the organic metal complex, and a second step of adsorbing, to the surface of the film, the complexing gas at a low temperature, while supplying the complexing gas, then stopping the supply of the complexing gas, and stepwise increasing the temperature of the wafer to volatilize and desorb an organic metal complex formed on the surface of the film.

Abstract: Exemplary methods of patterning a device layer are described, including operations of patterning a protector layer and forming a first opening in a first patterning layer to expose a first portion of the protector layer and a first portion of the hard mask layer, which are then are exposed to a first etch to form a first opening in the first portion of the hard mask layer. A second opening is formed in a second patterning layer to expose a second portion of the protector layer and a second portion of the hard mask layer. The second portion of the protector layer and the second portion of the hard mask layer are exposed to an etch to form a second opening in the second portion of the hard mask layer. Exposed portions of the device layer are then etched through the first opening and the second opening.

Abstract: An atomic layer etching method capable of precisely etching a metal thin film at units of atomic layer from a substrate including the metal thin film, includes forming a metal layer on a substrate, and etching at least a portion of the metal layer. The etching at least a portion of the metal layer includes at least one etching cycle. The at least one etching cycle includes supplying an active gas onto the metal layer, and supplying an etching support gas after supplying the active gas. The etching support gas is expressed by the following general formula wherein each of R1, R2, R3, R4 and R5 independently includes hydrogen or a C1-C4 alkyl group, and N is nitrogen.

Abstract: A polishing composition according to the present invention contains abrasive grains, a basic inorganic compound, an anionic water-soluble polymer, and a dispersing medium, in which a zeta potential of the abrasive grains is negative, an aspect ratio of the abrasive grains is 1.1 or less, in a particle size distribution of the abrasive grains obtained by a laser diffraction/scattering method, a ratio D90/D50 of a particle diameter D90 when an integrated particle mass reaches 90% of a total particle mass from a fine particle side to a particle diameter D50 when the integrated particle mass reaches 50% of the total particle mass from the fine particle side is more than 1.3, and the basic inorganic compound is an alkali metal salt.

Abstract: A polishing composition eliminating protrusions around a laser mark in wafer polishing processes, the manufacturing method therefor and a polishing method using the composition. The polishing composition including silica particles and water, wherein: the composition includes a tetraalkylammonium ion such that the mass ratio of the ion to SiO2 of the silica particles is 0.400 to 1.500:1, and the mass ratio of SiO2 dissolved in the polishing composition to SiO2 is 0.100 to 1.500:1; the tetraalkylammonium ion is derived from a compound selected from the group made of an alkali silicate, a hydroxide, a carbonate, a sulfate, and a halide while the ion is contained in the polishing composition in 0.2% by mass to 8.0% by mass; and the dissolved SiO2 is derived from a tetraalkylammonium silicate, a potassium silicate, a sodium silicate, or a mixture of any of these.

Abstract: A method for preparing a semiconductor device structure includes forming a target layer over a semiconductor substrate, and forming an energy-sensitive layer over the target layer. The method also includes performing a first energy treating process to form a first treated portion in the energy-sensitive layer, and performing a second energy treating process to form a second treated portion in the energy-sensitive layer. The method further includes removing the first treated portion and the second treated portion to form a first opening and a second opening in the energy-sensitive layer, and transferring the first opening and the second opening into the target layer.

Abstract: An etch chemistry solution for treating metallic surfaces in which the etch chemistry solution includes an oxidizing agent and gluconic acid. The etch chemistry solution may also include an oxidizing agent and a short-chained polyethylene polymer glycol or a short-chained polyethylene copolymer glycol. The metallic surfaces are usually used in circuits such as flexible circuits.

Abstract: Atomic layer etching of a substrate using a wafer scale wave of precisely controlled electrons is presented. A volume of gaseous plasma including diluent and reactive species and electrons of a uniform steady state composition is generated in a positive column of a DC plasma proximate the substrate. A corrosion layer is formed on the substrate by adsorption of the reactive species to atoms at the surface of the substrate. The substrate is positively biased to draw electrons from the volume to the surface of the substrate and impart an energy to the electrons so to stimulate electron transitions in the corrosion layer species, resulting in ejection of the corrosion layer species via electron stimulation desorption (ESD). The substrate is negatively biased to repel the electrons from the surface of the substrate back to the volume, followed by a zero bias to restore the steady state composition of the volume.

Abstract: A manufacturing method for a semiconductor device according to an embodiment includes performing first etching for forming a recess in a layer to be processed using a reactive ion etching method, performing a first treatment of supplying a silylation agent to the recess after the first etching, and performing second etching of etching at least a bottom surface of the recess using a reactive ion etching method after the first treatment.

Abstract: Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The processing region may be at least partially defined between a faceplate and a substrate support on which the semiconductor substrate is seated. A bias power may be applied to the substrate support from a bias power source. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include etching the flowable film from a sidewall of the feature within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor. The methods may include densifying remaining flowable film within the feature defined within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor.