Abstract: A survival selection rule for determining a Viterbi output. A survival selection rule according to the present invention compares paths at a plurality of endpoint states but fewer than the total number of endpoint states. Viterbi detectors using the present invention provide high performance, easier implementation, and error degradation comparable to conventional methods.

Abstract: A method and apparatus for Turbo encoding uses a set of rate-compatible Turbo Codes optimized at high code rates and derived from a universal constituent code. The Turbo Codes have rate-compatible puncturing patterns. The method comprises: encoding a signal at a first and second encoder using a best rate 1/2 constituent code universal with higher code rates, the first encoder and the second encoder each producing a respective plurality of parity bits for each information bit; puncturing the respective plurality of parity bits at each encoder with a higher rate best puncturing patterns; and puncturing the respective plurality of parity bits at each encoder with a lower rate best puncturing pattern. In a variation, the best rate 1/2 constituent code represents a concatenation of polynomials 1+D2+D3 (octal 13) and 1+D+D3 (octal 15), D a data bit. A Turbo Encoder is provided which has hardware to implement the method.

Abstract: A method for logically rejecting previously recorded track residue from magnetic media is presented. A session ID unique to a given recording session is encoded into track packet error check and error correction codes but is not itself actually written to tape. During a data recovery session, a reference session ID for the original recording session is acquired by reconstructing the packet session ID from the first few track packets and verifying that a predetermined number of consecutive track packets have identical packet session IDs. Once the reference packet session ID is acquired, it is preloaded into error detection and correction hardware. When a residue track encoded with a previously recorded session ID is recovered by the tape drive track packet detection circuitry, it is inherently rejected because the error detection and correction hardware detects an error and it is therefore never allowed into the data buffer.

Abstract: The present invention is a novel and improved technique for performing coding with particular application to turbo, or iterative, coding techniques. In accordance with one embodiment of the invention, interleaving is performed by generating the address of a memory using a PN state generator. Data is written into a memory in sequential order, and then read out using addresses specified by the PN state generator. To deinterleave, the interleaved data is written into a memory using addresses specified by the PN state generator, and then read out in sequential order. A set of PN state generators that provide excellent coding performance is provided.

Abstract: A maximum likelihood decoding circuit is arranged to reduce power consumption through the effect of a Viterbi algorithm. A plurality of storing elements located vertically in a column and for storing each state survivor path information at the same time point are treated as storing element blocks in a manner to correspond to the combination (state) of intracode interferences. The outputs from the storing elements are again applied into the inputs of the corresponding storing elements contained in the same storing element block through path history selecting circuits. Each of the storing blocks is periodically started on the input timing of a receiving signal at each processing time point by starting signals (pointers) outputted from a starting signal (pointer) generated circuit. A storing element block output circuit and storing element block output terminals are provided in each of the storing element blocks so that a path memory circuit output may be outputted through an OR circuit.

Abstract: An apparatus for recovering information bits from in-phase and quadrature components of a stream of quadrature amplitude modulation (QAM) trellis code modulation (TCM) signals is disclosed. Each signal has an in-phase component and a quadrature component. The in-phase component includes a decoded bit and a plurality of uncoded in-phase bits and the quadrature component includes a decoded quadrature bit and a plurality of uncoded quadrature bits. The apparatus includes a reencode and puncturing circuitry, an inverse mapping circuitry, and a recovery circuitry. The reencode and puncture circuitry is adapted to receive the in-phase and quadrature components of a QAM TCM signal for encoding the decoded in-phase and quadrature bits. The reencode and puncture circuitry punctures the encoded in-phase bit with the uncoded in-phase bits to generate an in-phase component index.

Abstract: A detector is used in detecting data encoded in a read signal received from a storage channel. The detector includes a Viterbi detector having a time-invariant structure configured to detect the data encoded according to a code having time varying constraints.

Abstract: A metric calculator is disclosed having an interleaved structure for increasing the time during which metrics can be calculated by circuit components. A first interleave samples voltage of the received signal during a first phase and a second interleave samples voltage of the received signal during an opposite phase. The interleaved architecture calculates and updates metrics and decisions based on these metrics at code rate, without requiring completion of all ACS computations in one code period.

Abstract: A Reed Solomon decoder which can perform high-speed decoding operation without significantly increasing the circuit scale. The Reed Solomon decoder includes the following: input parameter operator 309 which generates syndrome and erasure data for a data sequence, decoding operation processing unit 304 which performs the decoding operation using the aforementioned syndrome and erasure data based on the command code indicating the prescribed decoding operation, and which generates the error data and error position data, and correction operation executor 312 which performs the correction operation using the aforementioned error data and error position data. The decoding operation processing unit 304 has an multiplier and an adder which execute the product and sum operation of the Galois field in one step.

Abstract: A method of lattice-quantizing an eight-long data point to minimize storage requirements and computational complexity by acquiring the data point, multiplying each coordinate of the data point by the square root of two to form an inflated data point, rounding each coordinate of the rounded and inflated data point to the nearest integer, reducing modulo-two each coordinate of the rounded and inflated data point to form an initial codeword, multiplying a parity-check matrix of an eight-bit Extending Hamming Code by the result of the last step to form a syndrome, correcting any single-bit errors and double-bit errors, if any, in the initial codeword and the rounded and inflated data point, creating a signal packet if the codeword does not contain any single-bit errors and double-bit errors, and transmitting the signal packet to a receiver.