Abstract: A semiconductor device includes a metal chip mounting member and a semiconductor chip bonded to the chip mounting member through a metal sintered material, wherein the metal sintered material includes a first portion overlapping the semiconductor chip in a plan view, and includes a second portion surrounding the semiconductor chip in the plan view, and wherein a porosity ratio of the first portion is greater than or equal to 1% and less than 15%, and a porosity ratio of the second portion is greater than or equal to 15% and less than or equal to 50%.

Abstract: The present disclosure relates to a chip package structure and a method for forming a chip package. A package unit is formed from the chip and an encapsulant surrounding the chip to have an increased area. A redistribution layer is formed on the package unit to draw out to and redistribute input/output terminals on a surface of the chip. The redistribution layer is then electrically coupled to a leadframe or a printed circuit board by external and electrical connectors. The method and the package structure are suitable for providing a chip package having input/output terminals with high density, reducing package cost, and improving package reliability.

Abstract: An image sensing device is provided to include a pixel region including image pixels and a peripheral region located outside of the pixel region. The peripheral region includes logic circuits located to receive the pixel signals from the pixel region and configured to process the pixel signals, and a capacitor located adjacent to the logic circuits. The capacitor includes an active region including a first impurity region and a second impurity region formed over the first impurity region, a recessed structure including a portion formed in the active region, the portion including a conductive layer extending along a direction that the first impurity region and the second impurity region are stacked and an insulation layer formed between the conductive layer and the active region, and a first junction formed in the active region and spaced apart from the recessed structure by a predetermined distance.

Abstract: Present disclosure provides a method for manufacturing a semiconductor device, including providing a substrate, forming a first III-V compound layer over the substrate, forming a first passivation layer over the first III-V compound layer, forming a first opening from a top surface of the first passivation layer to the first III-V compound layer, each opening having a stair-shaped sidewall at the first passivation layer, depositing a metal layer over the first passivation layer and in the first opening, the metal layer having a second opening above the corresponding first opening, and removing a portion of the metal layer to form a source electrode and a drain electrode.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a transistor. The transistor includes a first source/drain (S/D) region, a second S/D region and a gate structure. The first S/D region is defined in a first well on a double diffusion layer, wherein the first well and the double diffusion layer define a diode at a junction therebetween, wherein an anode of the diode and the first S/D region form an open circuit therebetween. The gate structure is between the first S/D region and the second S/D region.

Abstract: An optoelectronic component, comprising: a structured semiconductor layer, a metallic mirror layer arranged on the semiconductor layer, a diffusion barrier layer arranged on the metallic mirror layer, a passivation layer arranged on the diffusion barrier layer, wherein the semiconductor layer comprises a mesa structure with mesa trenches. The mesa trenches taper from the surface of the semiconductor layer towards the mirror layer.

Abstract: A display device includes a display region including a plurality of pixels, a plurality of first electrodes formed by wiring included in a first layer, and aligned in a first direction above the display region, a plurality of second electrodes formed by wiring included in the first layer, and aligned in a second direction intersecting the first direction, a connection wiring formed by wiring included in a second layer, and electrically connecting each of the plurality of first electrodes respectively, an insulating layer separating wiring included in the first layer and wiring included in the second layer, and a light shielding layer located at a different position to the connection wiring and overlapping a space between the plurality of first electrodes and the plurality of second electrodes in the first layer, in a plan view.

Abstract: The present application discloses a semiconductor device structure and a method for preparing the semiconductor device structure. The semiconductor device structure includes a first fin structure and a second fin structure disposed over a semiconductor substrate, and a first word line disposed across the first fin structure and the second fin structure. The semiconductor device structure also includes a first source/drain (S/D) structure disposed over the first fin structure and adjacent to the first word line, and a second S/D structure disposed over the second fin structure and adjacent to the first word line. The first S/D structure and the second S/D structure have an air gap therebetween.

Abstract: An organic light emitting display device includes a substrate, an insulation layer structure, a light emitting layer, and an optical module. The substrate has an opening region, a peripheral region surrounding the opening region, and a display region surrounding the peripheral region. An opening is defined through the substrate in the opening region. The insulation layer structure is disposed in the display region and the peripheral region on the substrate. The light emitting layer is disposed on the insulation layer structure, and extends in a first direction from the display region into the opening region. A first opening is defined through the light emitting layer in the peripheral region. The optical module is disposed in the opening of the substrate.

Abstract: Provided is a display apparatus, including a substrate; a plurality of pixels that are on the substrate and include at least one display device; a separation area that is on the substrate and between two adjacent pixels from among the plurality of pixels; and a penetrating portion that is in the separation area and penetrates the substrate.

Abstract: An electroluminescent display device includes: a substrate, a first subpixel on the substrate, a second subpixel on the substrate, a third subpixel on the substrate, a respective first electrode in each of the first to third subpixels, an emission layer on the first electrodes, a common second electrode on the emission layer, an encapsulation layer including: a first encapsulation layer on the second electrode, and a second encapsulation layer on the first encapsulation layer, and a first semi-transmissive layer between the first encapsulation layer and the second encapsulation layer, the first semi-transmissive layer overlapping the first electrode of the first subpixel.

Abstract: An electroluminescent display apparatus comprises a first subpixel, a second subpixel, and a third subpixel defined on a substrate; a first electrode disposed in each of the first subpixel, the second subpixel, and the third subpixel in the substrate; a bank provided between two adjacent subpixels among the first subpixel, the second subpixel, and the third subpixel to cover an edge of the first electrode; a first light emitting layer disposed on the first electrode of the first subpixel; a second light emitting layer disposed on the first electrode of the second subpixel; a third light emitting layer disposed on the first electrode of the third subpixel; and a second electrode disposed on the first to third light emitting layers, wherein the third light emitting layer is extended onto the bank between the first subpixel and the second subpixel.

Abstract: Embodiments disclosed herein relate generally to forming a structure, e.g., in high aspect ratio trenches. In an embodiment, a method for semiconductor processing is provided. The method includes forming fins on a substrate. Sidewalls of the fins and a bottom surface between the sidewalls of the fins define a trench therebetween. The method includes forming a gate structure over the fins. The gate structure has a sidewall with a defect region formed therein. The method includes forming a filling layer to fill the defect region in the sidewall of the gate structure.

Abstract: A light emitting device is disclosed. In an embodiment a light-emitting device includes a plurality of light-emitting diode chips arranged on a mounting surface of a carrier, a first translucent element and a second translucent element, wherein the first translucent element is arranged over the plurality of light-emitting diode chips as viewed from the mounting surface and the second translucent element is disposed on a side of the plurality of light-emitting diode chips opposite the first translucent element such that the light-emitting diode chips are arranged between the first and second translucent elements, wherein the first and second translucent elements are configured to emit light generated by the light-emitting diode chips during operation outwardly, and wherein the first and second translucent elements appear white or grey in daylight.

Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a first gate electrode extending in a second direction intersecting the first direction on the fin type pattern, a source/drain region on a side wall of the first gate electrode and in the fin type pattern, a separation structure extending in the first direction on the substrate, the separation structure including a first trench and being spaced apart from the fin type pattern and separating the first gate electrode, an interlayer insulating layer on a side wall of the separation structure and covering the source/drain region, the interlayer insulating layer including a second trench having a lower surface lower than a lower surface of the first trench, and a contact connected to the source/drain region and filling the first trench and the second trench.

Abstract: A display panel can include a substrate including first, second and third subpixels; an overcoat layer including a first inclined surface in at least one of the first, second and third subpixels; first, second and third anode electrodes corresponding to the first, second and third subpixels, respectively, wherein at least one of the first, second and third anode electrodes includes a second inclined surface overlapping with the first inclined surface of the overcoat layer; first, second and third organic light emitting layers disposed on the first, second and third anode electrodes, respectively; and a bank layer disposed on the overcoat layer, the bank layer including a third inclined surface overlapping with both the first and second inclined surfaces of the overcoat layer and the at least one of the first, second and third anode electrodes, in which at least one of the first, second and third inclined surfaces is configured to reflect light emitted from a corresponding one of the first, second and third or

Abstract: A method for forming a pixel circuit includes forming transistors on a substrate; forming a passivation layer over the transistors; forming a contact hole to a source of a transistor; forming a transparent conductor that forms a contact in the contact hole and a resistor to control pixel current; and forming an organic light emitting diode (OLED) with an anode connecting to the resistor.

Abstract: A wiring substrate includes a first insulation layer, an electronic component including a first surface and a second surface which is an opposite surface to the first surface, the electronic component being mounted on the first insulation layer with the first surface facing toward the first insulation layer, and a second insulation layer including a first layer and a second layer. The first layer is formed on the first insulation layer and configured to cover the second surface of the electronic component, and the second layer is stacked on the first layer. The first layer includes therein fillers. At least one of the fillers is in direct contact with the second surface of the electronic component at one side, and is exposed from the first layer and is thus in direct contact with the second layer at the other side.

Abstract: A manufacturing method for a flash device. A manufacturing method for a flash device, comprising: providing a substrate; forming sequentially, on the substrate, a floating gate (FG) oxide layer, an FG polycrystalline layer, and an FG mask layer; etching, at the FG location region, the FG polycrystalline layer and the FG mask layer, forming a window on the FG mask layer, and forming a trench on the FG polycrystalline layer, the window being communicated with the trench; performing second etching of the side wall of the window of the FG mask layer, enabling the width of the trench located on the FG polycrystalline layer to be less than the width of the secondarily-etched window located on the FG mask layer; and oxidizing the FG polycrystalline layer, enabling the oxide to fill the trench to form a field oxide layer; and etching an FG having sharp angles.

Abstract: The present disclosure provides a composite film including a hydrophobic film layer and a hydrophilic film layer, a manufacture method thereof, and a light-emitting display device. The hydrophobic film layer is in contact with the hydrophilic film layer, and the hydrophilic film layer forms folds under an action of water vapor. As such, it is possible to achieve real-time detection of whether water vapor enters a light-emitting display device formed subsequently, and thus the adverse effects of water vapor on the light-emitting display device can be eliminated timely.