Abstract: A method of forming a horizontal nanosheet device or a horizontal nanowire device includes forming a dummy gate and a series of external spacers on a stack including an alternating arrangement of sacrificial layers and channel layers, deep etching portions of the stack between the external spacers to form electrode recesses for a source electrode and a drain electrode, performing an etch-back on portions of the sacrificial layers to form internal spacer recesses above and below each of the channel layers, forming doped internal spacers in the internal spacer recesses, and forming doped extension regions of the source electrode and the drain electrode by outdiffusion of dopants from the doped internal spacers. The method may also include epitaxially regrowing the source electrode and the drain electrode in the electrode recesses.

Abstract: A magnetic device includes a free layer; a pinned layer; a tunnel barrier disposed between the free layer and the pinned layer; a polarization enhancement layer disposed between the tunnel barrier and the pinned layer; and a blocking layer disposed between the polarization enhancement layer and the pinned layer, wherein the blocking layer includes a first diffusion trap layer and a second diffusion trap layer disposed on the first diffusion trap layer.

Abstract: In a back surface hole injection type diode, by more effectively securing the effect of hole injection from the back surface of a semiconductor substrate, the performance of a semiconductor device is improved. In the semiconductor device, in a diode formed of a P-N junction including an anode P-type layer formed in the main surface of a semiconductor substrate and a back surface N+-type layer formed in the back surface of the semiconductor substrate, a back surface P+-type layer is formed in the back surface, and a surface P+-type layer is formed in the main surface right above the back surface P+-type layer to thereby promote the effect of hole injection from the back surface.

Abstract: A camera module including a die having a top side and a bottom side, an image sensor is positioned on the top side of the die and a conductive via is formed through the die to provide an electrical connection between the top side and the bottom side; an overmold casing formed around the die; and a lens holder assembly attached to the top side of the die and the overmold casing. A method of producing a camera module including providing an image sensor die that is overmolded within a casing, the image sensor die having a top side and a bottom side, wherein an image sensor is positioned on the top side and a conductive via is formed through the image sensor die from the top side to the bottom side; and attaching a lens holder to the top side of the image sensor die.

Abstract: A method of forming an array comprising pairs of vertically opposed capacitors comprises forming an upwardly-open conductive lining in individual capacitor openings in insulative-comprising material. An elevational mid-portion of individual of the conductive linings is removed to form an upper capacitor electrode lining and a lower capacitor electrode lining that are elevationally separate and spaced from one another in the individual capacitor openings. A capacitor insulator is formed radially inward of the upper and lower capacitor electrode linings in the individual capacitor openings. Conductive material is formed radially inward of the capacitor insulator in the individual capacitor openings and elevationally between the capacitor electrode linings. The conductive material is formed to comprise a shared capacitor electrode that is shared by vertically opposed capacitors in individual of the pairs of vertically opposed capacitors. Additional methods and structure independent of method are disclosed.

Abstract: A first sense resistor is connected between a fourth terminal of a power source potential of a high-potential region and a first terminal of a ground potential. A second sense resistor is connected between a third terminal of a reference potential of the high-potential region and the first terminal. A comparator is disposed in a low-potential region and uses the ground potential as a reference potential for operation. The comparator compares a voltage between an intermediate potential point of the first sense resistor and an intermediate potential point of the second sense resistor with a predetermined reference voltage. The output of the comparator is input through a control circuit and a level shift circuit to a high-side drive circuit driving an upper-arm IGBT. The output of the comparator is input to a driver circuit driving a lower-arm IGBT.

Abstract: This semiconductor device includes a substrate and a thin film transistor supported on the substrate. The thin film transistor includes a gate electrode, a semiconductor layer, a gate-insulating layer provided between the gate electrode and the semiconductor layer, and a source electrode and a drain electrode respectively making contact with the semiconductor layer. The source electrode and the drain electrode respectively include a main layer containing aluminum or copper, a lower layer having a first layer containing refractory metal and positioned at a substrate side of the main layer, and an upper layer having a second layer containing refractory metal. The upper layer is provided so as to cover an upper surface of the main layer and at least the section of the side face of the main layer that overlaps the semiconductor layer.

Abstract: A light-emitting device includes: a light-emitting stack including a first side, a second side opposite to the first side, a third side connecting the first side and the second side, and an upper surface between the first side and the second side; a first electrode pad formed on the upper surface; a second electrode pad formed on the upper surface, wherein the first electrode pad is closer to the first side than the second electrode pad; and a first extension electrode including a first section extended from the first electrode pad in a direction away from the third side, and a second section connecting to the first section and perpendicular to the first side; wherein a distance between the first electrode pad and the third side is smaller than a distance between the second electrode pad and the third side.

Abstract: A semiconductor transistor device includes a substrate having an active area and a trench isolation region surrounding the active area, a gate oxide layer, a gate, a spacer on a sidewall of the gate, a doping region on one side of the gate, an insulating cap layer covering the gate, the spacer and the doping region, and a redistributed contact layer (RCL) on the insulating cap layer. The RCL extends from the active area to the trench isolation region. A contact plug is disposed above the trench isolation region and is electrically connected to the gate or the doping region through the RCL.

Abstract: Various embodiments provide an electronic device, wherein the electronic device comprises a mounting surface configured to mount the electronic device to an external structure and having a first size; a backside electrode having a second size and having arranged thereon a die electrically connected to the backside electrode; wherein the first size is at least three times the second size.

Abstract: Disclosed is a semiconductor light emitting device including: a plurality of semiconductor layers; and a first electrode which is formed on an exposed region of the first semiconductor layer created by mesa etching portions of the second semiconductor layer, the active layer and the first semiconductor layer, and includes a contact layer in contact with the first semiconductor layer, a reflective layer formed on the contact layer, while facing an exposed region of the active layer created by mesa etching and reflecting light, and an anti-rupture layer formed on the reflective layer.

Abstract: The invention relates to a single-photon avalanche diode (SPAD) photodiode having a layer made of semiconductor material, including an N doped zone and a P doped zone separated by an avalanche zone. The semiconductor material layer is intercalated between a periodic structure and a low index layer having a refractive index less than that of the semiconductor material layer and less than that of the periodic structure. The periodic structure is deposited directly on the semiconductor material layer. The photodiode provides low temporal dispersion and high quantum efficiency, without requiring a strong charge acceleration voltage.

Abstract: A method of forming a semiconductor structure includes forming a seed layer over a top surface of a substrate and a protect layer over a top surface of the seed layer. The method also includes forming a magnetic film on a top surface of the protect layer and a top surface of the substrate in at least one opening formed in the seed layer and the protect layer. The method further includes forming at least one patterned magnetic feature on the top surface of the substrate by electro-etching the magnetic film, wherein the seed layer provides a self-stop for the electro-etching of the magnetic film.

Abstract: A lead frame for mounting LED elements includes a frame body region and a large number of package regions arranged in multiple rows and columns in the frame body region. The package regions each include a die pad on which an LED element is to be mounted and a lead section adjacent to the die pad, the package regions being further constructed to be interconnected via a dicing region. The die pad in one package region and the lead section in another package region upward or downward adjacent to the package region of interest are connected to each other by an inclined reinforcement piece positioned in the dicing region.

Abstract: A composite material is described. The composite material comprises semiconductor nanocrystals, and organic molecules that passivate the surfaces of the semiconductor nanocrystals. One or more properties of the organic molecules facilitate the transfer of charge between the semiconductor nanocrystals. A semiconductor material is described that comprises p-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of electrons in the semiconductor material being greater than or equal to a mobility of holes. A semiconductor material is described that comprises n-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of holes in the semiconductor material being greater than or equal to a mobility of electrons.

Abstract: The present invention relates to a light-emitting diode package comprising a high-strength molding part. The light-emitting diode package, according to the present invention, comprises: a housing; at least one light-emitting diode chip disposed in the housing; a molding part which covers the at least one light-emitting diode chip; a first phosphor excited by the at least one light-emitting diode chip so as to emit green light; and a second phosphor excited by the at least one light-emitting diode chip so as to emit red light, wherein the molding part has an oxygen gas permeability of 140 cc/m2/day or less, and the second phosphor can emit red light having a full width at half maximum of 20 nm or less.

Abstract: Embodiments include devices and methods for detecting particles, monitoring etch or deposition rates, or controlling an operation of a wafer fabrication process. In an embodiment, one or more micro sensors are mounted on wafer processing equipment, and are capable of measuring material deposition and removal rates in real-time. The micro sensors are selectively exposed such that a sensing layer of a micro sensor is protected by a mask layer during active operation of another micro sensor, and the protective mask layer may be removed to expose the sensing layer when the other micro sensor reaches an end-of-life. Other embodiments are also described and claimed.

Abstract: A magnetoresistive memory cell includes a magnetoresistive tunnel junction stack and a dielectric encapsulation layer covering sidewall portions of the stack and being opened over a top of the stack. A conductor is formed in contact with a top portion of the stack and covering the encapsulation layer. A magnetic liner encapsulates the conductor and is gapped apart from the encapsulating layer covering the sidewall portions of the stack.

Abstract: In one aspect a light emitting device includes a light emitting diode (LED) chip, and an encapsulant covering the LED chip. The encapsulant is embedded with a downconverter. The downconverter includes a quasi-two dimensional quantum nanoplatelet structure.

Abstract: A semiconductor memory device according to an embodiment includes: a semiconductor substrate which extends in first and second directions that intersect each other; a plurality of first wiring lines which are arranged in a third direction that intersects the first direction and the second direction, and which extend in the first direction; a plurality of second wiring lines which are arranged in the first direction and extend in the third direction; and a plurality of memory cells disposed at intersections of the first wiring lines and the second wiring lines, one of the memory cells having a first film whose resistance changes electrically, a thickness in the second direction of the first film changing with respect to a change of position in the third direction, and the first films of two of the memory cells adjacent in the third direction being separated between the two memory cells.