Abstract: Attributing consumed storage capacity among entities storing data in a storage array includes: identifying a data object stored in the storage array and shared by a plurality of entities, where the data object occupies an amount of storage capacity of the storage array; and attributing to each entity a fractional portion of the amount of storage capacity occupied by the data object.

Abstract: Examples of techniques for memory transaction prioritization for a memory are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include: The method may further include: allocating, by a memory controller, a reserved portion of the memory controller to process prioritized transactions; receiving, by the memory controller, a request transaction from a processor to the memory, wherein the request transaction comprises a priority; determining, by the memory controller, whether the priority of the request transaction is above a priority threshold; and responsive to determining that the priority of the request transaction is above the priority threshold, executing the request using the reserved portion of the memory controller.

Abstract: Memory management is provided within a data processing system 2 which includes a memory protection unit 8 and defines memory regions within the memory address space which extend between base addresses and limit addresses and have respective attributes associated therewith. When a hit occurs within a memory region which is a valid hit, then block data is generated comprising a mask value and a TAG value (derived from the original query address) which may then be used to identify subsequent hits within at least a portion of that region using a bitwise AND. In another embodiment a micro-translation lookaside buffer is reused by the memory protection unit to store page data identifying pages which fall validly within memory regions and may be used to return attribute data for those pages upon subsequent accesses rather than performing the comparison with the base address and the limit addresses.

Abstract: A method of initializing a storage device includes; resetting an interface chip in response to a reset signal generated by the memory controller, loading a boot loader from a nonvolatile memory device via the interface chip in response to a nonvolatile memory initialization signal generated by the memory controller, and initializing a plurality of nonvolatile memory devices by executing the boot loader in the memory controller.

Abstract: Embodiments enable distributed data processing with automatic caching at multiple system levels by accessing a master queue of data processing work comprising a plurality of data processing jobs stored in a long term memory cache; selecting at least one of the plurality of data processing jobs from the master queue of data processing work; pushing the selected data processing jobs to an interface layer including (i) accessing the selected data processing jobs from the long term memory cache; and (ii) saving the selected data processing jobs in an interface layer cache of data processing work; and pushing at least a portion of the selected data processing jobs to a memory cache of a first user system for minimizing latency in user data processing of the pushed data processing jobs.

Abstract: Systems and methods are disclosed for identifying disk drives and processing data access requests. A disk drive may be identified as an Advanced Host Controller Interface (AHCI) drive, a Non-Volatile Memory Express (NVME) drive, and/or an ATA packet interface (ATAPI) drive. Data access requests for the disk drive may be translated to NVME commands, AHCI commands, or ATAPI commands, based on whether the drive is identified as a NVME drive, an AHCI drive, and/or an ATAPI drive.

Abstract: A method, computer program product, and/or system for performing a selection of a plurality of auxiliary storage sites in a multi-target environment in preparation for a hyper exchange are/is provided. To perform the selection, a failure is first detected with respect to a primary storage site in the multi-target environment. Then, aggregate weights are determined based on a management policy for the plurality of auxiliary storage sites. In turn, an auxiliary storage site with a first aggregate weight is selected from the plurality of auxiliary storage sites. With the auxiliary storage site selected, the hyper exchange of a plurality of systems in a multi-target environment in response to the failure is triggered from the primary storage site to the auxiliary storage site with the first aggregate weight.

Abstract: Aspects of a memory and method for accessing the memory are disclosed. The memory includes a plurality of memory cells configured to support a read and write operation in a memory cycle in a first mode and a write only operation in the memory cycle in a second mode. The memory further includes a control circuit configured to generate a read clock for the read operation and a write clock for the write operation. The timing of the write clock is a function of the timing of the read clock in the first mode, and the timing of the memory cycle in the second mode.

Abstract: A data processing system may include: a first memory system including a first memory device, and a first controller of the first memory device; and a second memory system including a second memory device, and a second controller of the second memory device, the first memory system may receive a command from a host, and then checks time information included in the command and performs a first update operation for the first memory device for a first time corresponding to the time information, and the second memory system may perform a second update operation for the second memory device for the first time for which the first update operation is performed.

Abstract: There are disclosed techniques for use in managing data copying. In one embodiment, there is disclosed a method including a number of steps. The method comprises performing a first operation to copy data from a first region of a source area. The method also comprises determining a count relating to pending I/O requests in connection with a second region of the source area upon completion of the first operation. And, in response to determining that the count relating to pending I/O requests in connection with the second region of the source area equals zero, the method further comprises performing a second operation to copy data from the second region of the source area and configuring a new region in the source area to record a count relating to pending I/O requests in connection with the source area.

Abstract: Synchronizing catalogs of virtual machine copies is described. A system determines the number of copies of a virtual machine in a catalog associated with a virtual machine storage management tool. The system determines the number of copies of the virtual machine in a catalog associated with a backup application. The system creates a copy of the virtual machine, which is associated with the backup application, if the number of copies of the virtual machine in the catalog associated with the virtual machine storage management tool is greater than zero and if the number of copies of the virtual machine in the catalog associated with the backup application is zero.

Abstract: A storage device includes a storage medium and a controller configured to control the storage medium. The controller includes an interface unit configured to interface with a host, a processing unit connected to the interface unit via a first signal line and configured to process a direct load operation and a direct store operation between the host and the controller, and at least one memory connected to the interface unit via a second signal line. The at least one memory is configured to temporarily store data read from the storage medium or data received from the host, and is configured to be directly accessed by the host.

Abstract: Provided are a computer program product, system, and method for locking a cache line for a burst write operations on a bus. A cache line is allocated in a cache for a target address. A lock is set for the cache line, wherein setting the lock prevents the data in the cache line from being cast out. Data is written to the cache line. All the data in the cache line is flushed to the target address over a bus in response to completing writing to the cache line.

Abstract: According to one embodiment, a storage device includes a plurality of memory nodes. Each of memory nodes includes a plurality of input ports, a plurality of output ports, a selector, a packet controller and a memory. The selector outputs a packet input to the input port to one of the output ports. The packet controller controls the selector. The memory stores data. The memory nodes are mutually connected at the input ports and the output ports. The memory node has an address that is determined by its physical position. The packet controller switches the output port that outputs the packet based on information including at least a destination address of the packet and an address of the memory node having the packet controller when receiving a packet that is not addressed to the memory node having the packet controller.

Abstract: A data storage device includes a memory including a plurality of memory blocks each of which includes a plurality of pages suitable for storing data transmitted from a host, and a controller suitable for storing data storage information on the data stored in the memory, wherein the data storage information is updated based on valid pages where the data are stored among the plurality of the pages.

Abstract: A non-volatile memory system may include a controller that issues data transfer commands to have data units associated with a host read request transferred from non-volatile memory to a temporary storage area before the data is sent to a host. The controller may be configured to generate a schedule that identifies when the data transfer commands are issued. The schedule may be generated according to one of a plurality of scheduling schemes, each with a different priority in having the data units transferred to the temporary storage area. Which scheduling scheme the controller selects may depend on a queue depth of a read request queue.

Abstract: Example embodiments of the present invention relate a method, a system, and a computer program product for extent-based tiering for virtual storage using full LUNs. The method includes exposing a virtual LUN comprising a first LUN in a first tier of storage having a first latency and a second LUN in a second tier of storage having a second latency and managing the virtual LUN according to properties of the first LUN, properties of the second LUN, and a policy.

Abstract: According to one embodiment, a control unit writes data in a write buffer to a first semiconductor storage device, and requests the first semiconductor storage device to start a background operation. The control unit writes the data to a second semiconductor storage device, and requests the second semiconductor storage device to start a background operation. When the first semiconductor device is in a busy state because of the write operation or the background operation, the control unit reads data from either the second semiconductor storage device or the write buffer.

Abstract: A first component associated with an access controlled memory region receives a transaction request including a protocol header from a second component. The first component sends, to the second component, a negative acknowledgment in response to determining that the second component is not authorized to access the access controlled memory region, based on information in the protocol header.

Abstract: Embodiments of the invention include systems and methods for recovering the system status and maintaining drive coherency after an unexpected power loss. In particular, these systems and methods reduce overhead for maintaining drive coherency by providing for pre-allocation of groups of write addresses and recording the pre-allocated groups of addresses to the non-volatile memory. Write processes can write to the pre-allocated group of addresses while the next group of addresses are pre-allocated and recorded to non-volatile memory.