Abstract: Ownership of a memory unit in a data processing system is tracked by assigning an identifier to each software component in the data processing system that can acquire ownership of the memory unit. An ownership variable is updated with the identifier of the software component that acquires ownership of the memory unit whenever the memory unit is acquired.

Abstract: Reusing data in a memory buffer. A method includes reading data into a first portion of memory of a buffer implemented in the memory. The method further includes invalidating the data and marking the first portion of memory as free such that the first portion of memory is marked as being usable for storing other data, but where the data is not yet overwritten. The method further includes reusing the data in the first portion of memory after the data has been invalidated and the first portion of the memory is marked as free.

Abstract: A computer-implemented method includes, in a transactional memory environment, identifying a transaction and identifying one or more cache lines. The cache lines are allocated to the transaction. A cache line record is stored. The cache line record includes a reference to the one or more cache lines. An indication is received. The indication denotes a request to demote the one or more cache lines. The cache line record is retrieved, and the one or more cache lines are released. A corresponding computer program product and computer system are also disclosed.

Abstract: A method for providing a memory translation layer includes: receiving write request streams from a host computer; selectively storing each write request stream into a sequential zone, a K-associative zone, and a random zone of log blocks of a nonvolatile memory based on the characteristics. A first group of the write request streams that are sequential and start from a header page of a log block are stored in the sequential zone. A second group of the write request streams that are sequential but do not start from a header page of a log block are stored in the K-associative zone. A third group of the write request streams that are random are stored in the random zone.

Abstract: A storage system includes a memory unit group that includes a first memory unit and a plurality of second memory units, and the first memory unit is connected to the plurality of second memory units so that data can be transmitted between the first memory unit and the second memory units. The plurality of second memory units is mounted on a same first substrate. One second memory unit of the plurality of second memory units cooperates with the first memory unit and does not cooperate with the other second memory units of the plurality of second memory units.

Abstract: A data processing system and methods for performing cache eviction are disclosed. An exemplary method includes maintaining a metadata set for each cache unit of a cache device comprising a plurality of cache units, each cache unit having a plurality of segments. In response to determining that a cache eviction is to be performed, a cache unit is evicted based on its metadata set. The exemplary method includes selecting one or more segments of the evicted cache unit to copy to a second cache unit based on the metadata set of the evicted cache unit, copying the selected one or more segments to the second cache unit, and writing the second cache unit to a storage device. The metadata set may include deletion hints (DH) to indicate valid segments, last access time (LAT) or age based metadata, an access count, or a score for each segment based on the metadata set.

Abstract: A data processing system and methods for performing cache eviction are disclosed. An exemplary method includes maintaining a metadata set for each cache unit of a cache device at a sub-cache unit granularity, wherein the cache device comprises a plurality of cache units, each cache unit having a plurality of segments, wherein the cache device is accessible by a cache client at a segment granularity. The exemplary method further includes in response to determining that a cache eviction is to be performed, selecting a predetermined number of cache units from the plurality of cache units, determining a score for each of the selected cache units based on the respective metadata set maintained at the sub-cache unit granularity, and evicting one or more of the selected predetermined number of cache units based on their scores. The metadata may include, for example, last access time (LAT) metadata, an access count, and hotness metadata, and metadata may be maintained at a segment or a segment group granularity.

Abstract: A computer-implemented method is provided which includes: assigning data having a first heat to a first data stream, assigning data having a second heat to a second data stream, determining an anticipated throughput of each of the first and second data streams, assigning a first number of logical erase blocks of non-volatile memory to the first data stream based on the anticipated throughput of the first data stream, and assigning a second number of logical erase blocks of non-volatile memory to the second data stream based on the anticipated throughput of the second data stream. The number of logical erase blocks assigned to the data streams may be statically assigned, or may be adjusted dynamically based on at least one of temporal stream throughput, stream stall events, a current workload, or other factors. The non-volatile memory may include NAND flash memory, and wear leveling may be performed on all open logical erase blocks prior to assigning the first and second numbers of erase blocks.

Abstract: A storage device may be configured to copy valid data units from a source memory area to a destination memory area according to a source-to-destination mapping. The source-to-destination mapping may be generated based on a ranking scheme that considers the number of valid data units being stored in each of a plurality of source pages storing the data.

Abstract: A storage device is provided which includes a nonvolatile memory and a temperature sensor. The temperature sensor is configured to detect a temperature of the storage device. The temperature sensor is configured to output temperature information. The storage device includes a memory controller. The memory controller is configured to access the nonvolatile memory in response to a request of an external host device. The memory controller is configured to obtain the temperature information from the temperature sensor according to a first period in a first mode. The temperature sensor is configured to obtain the temperature information from the temperature sensor according to a second period in a second mode. The second period is shorter than the first period.

Abstract: Embodiments herein describe a memory system that queues program requests to a block of flash memory until a predefined threshold is reached. That is, instead of performing program requests to write data into the block as the requests are received, the memory system queues the requests until the threshold is satisfied. Once the buffer for the block includes the threshold amount of program requests, the memory system performs the stored requests. In one embodiment, the memory system erases all the pages in the block before writing the new data in the program requests into the destination pages. The data that was originally stored in the pages that are not destination pages is rewritten into the pages. In this example, the queued program requests can be written into the pages using one erase and write step rather than individual erase and write steps for each of the requests.

Abstract: Systems and methods for retaining data are disclosed in which refresh copy operations are performed on data stored in non-volatile solid-state memory. A controller may be configured to maintain a list of physical memory locations, the list sorted by a least recently used criterion. The controller may select a first entry from a top of the list and perform a refresh operation to copy data stored in a current physical memory location associated with the first entry to a new physical memory location, and may remove the first entry from the top of the list and add a new entry associated with the new physical memory location to a bottom of the list. The controller may repeat the select, perform, remove and add steps for a plurality of entries in the list, and the steps may be timed such that all refresh operations are performed for all of the plurality of entries within a set period of time.

Abstract: Embodiments of the present invention provide systems, methods, and computer program products for implementing multiple raid level configurations in a computer storage device. In one embodiment, performance or resiliency of application data being executed to a single computer storage device can be prioritized. Embodiment of the present invention provide systems, methods, and computer program products for a recovery operation, responsive to determining to prioritize performance of application data being executed to the single computer storage device.

Abstract: A microprocessor of a solid state memory protects the contents of the solid state memory by comparing a sequence of requests for access to physical blocks of the solid state memory with a predetermined sequence of requests to verify the sequence of requests, and by responding to additional requests for access to the physical blocks of the solid state memory to decrypt and transfer requested files stored therein when the sequence of requests equals the predetermined sequence of requests, thereby verifying the sequence of requests. The predetermined sequence of requests is associated with a plurality of virtual files that can be selected, in a particular sequence, to simulate a request for access to physical blocks of the solid state memory, while the predetermined sequence of requests is stored in a configuration file of the solid state memory in correspondence with an identifier of additional protected files.

Abstract: An electronic device includes a semiconductor memory device. The semiconductor memory device includes: a word line driving unit for driving a plurality of word lines; a first circuit area including a first cell array arranged at one side of the word line driving unit; a second circuit area including a second cell array arranged at the other side of the word line driving unit; a bias voltage generation unit arranged between the first cell array and the second cell array; a first read control unit; and a second read control unit. The first and second cell arrays include storage cells having variable resistance elements, and the bias voltage generation unit generates a bias voltage based on currents flowing through a first reference resistance element included in the first cell array and a second reference resistance element included in the second cell array.

Abstract: A control device includes a processor configured to migrate data in a first partial storage area of a first storage device to a second partial storage area of a third storage device, change an access destination of access to the first partial storage area to the second partial storage area, control a writing of a first part of first data into a remaining partial storage area other than the first partial storage area of the first storage device, control a writing of a second part of the first data into the second partial storage area of the third storage device, and control a writing of at least a third part of second data into a second storage device, wherein a data volume of the first part of the first data is different from a data volume of the third part of the second data.

Abstract: In one embodiment, a computing system includes a cache and a cache manager. The cache manager is able to receive data, write the data to a first portion of the cache, write the data to a second portion of the cache, and delete the data from the second portion of the cache when the data in the first portion of the cache is flushed.

Abstract: A first tree data structure is used to track an allocation state for each block included in a first set of storage blocks. Upper level nodes in a given tree present the allocation state of connected lower level nodes in the given tree, such that each allocation state indicates whether any associated storage blocks are free. A second tree data structure is used to track an allocation state for each block included in a second set of storage blocks. The first tree data structure and the second tree data structure each have a number of leaf nodes corresponding to a maximum number of blocks that can be included in a superset of storage blocks, wherein the first set of storage blocks and second set of storage blocks are included in the superset of storage blocks.

Abstract: Embodiments of present disclosure disclose method and system for selecting victim memory block for garbage collection. A memory block having minimum valid unit count is identified. Wear count bit of memory block to be null wear count or non-null wear count is determined. Memory block is selected as victim memory block for garbage collection upon determining memory block having null wear count. A plurality of memory blocks are divided into first set of memory blocks and second set of memory blocks upon determining memory block having non-null wear count. Minimum valid unit count and wear count bit are identified for each memory block in each set. Division is iterated until a first target memory block having minimum valid unit count and null wear count from one of first set of memory blocks and second set of memory blocks is identified. Final target memory block is selected as victim memory block for garbage collection.

Abstract: A technique for performing non-disruptive migration coordinates object migration with snapshot-shipping to migrate both a data object and its snaps from a source to a target. Snapshot-shipping conveys snaps to the target, and an internal snap of the data object serves as a basis for building a migrated version of the data object at the target. As IO requests specifying writes to the data object arrive at the source, a data mirroring operation writes the arriving data both to the data object at the source and to the version thereof at the target. In parallel with the data mirroring operation, a filtering copy operation copies data of the internal snap to the target, but avoids overwriting data mirrored to the target after the internal snap is taken.