Patents Examined by Valencia Wallace
  • Patent number: 5436500
    Abstract: A surface mount semiconductor package having a novel lead configuration which facilitates a higher packing density than presently available semiconductor packages. More particularly, the package includes a plurality of electrical leads each having a laterally outwardly extending portion, a downwardly extending portion depending from an inner distal end of the laterally extending portion, and a foot portion extending laterally inwardly from a lower distal end of the downwardly extending portion. A semiconductor chip is mounted, preferably by adhesive means such as insulating tape, to the foot portion of the leads. A plurality of electrical wires are connected between an upper surface of the chip and the laterally outwardly extending portion of respective ones of the leads. A protective body, such as a molded resin body, encapsulates the chip, the wires, the laterally outwardly and downwardly extending portions of the leads.
    Type: Grant
    Filed: December 21, 1992
    Date of Patent: July 25, 1995
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Y. Park, Jong K. Choi