Patents Examined by Vongsavanh Sengdara
  • Patent number: 11769784
    Abstract: The present technology relates to an imaging device, an electronic apparatus, and a method of manufacturing an imaging device capable of thinning a semiconductor on a terminal extraction surface while maintaining a strength of a semiconductor chip. There is provided an imaging device including: a first substrate having a pixel region in which pixels are two-dimensionally arranged, the pixels performing photoelectric conversion of light; and a second substrate in which a through silicon via is formed, in which a dug portion is formed in a back surface of the second substrate opposite to an incident side of light of the second substrate, and a redistribution layer (RDL) connected to a back surface of the first substrate is formed in the dug portion. The present technology can be applied to, for example, a semiconductor package including a semiconductor chip.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: September 26, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Suguru Saito, Nobutoshi Fujii
  • Patent number: 11764299
    Abstract: A semiconductor device includes an active fin extending in a first direction on a substrate, a gate electrode intersecting the active fin and extending in a second direction, source/drain regions disposed on the active fin on both sides of the gate electrode, and a contact plug disposed on the source/drain regions. The contact plug has at least one side extending in the second direction which has a step portion having a step shape.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: September 19, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sun Hom Paak, Sung Min Kim
  • Patent number: 11765941
    Abstract: A display device includes: a display including a plurality of light-emitting devices; a first bank provided outside the display; a second bank provided outside the first bank; and a plurality of peripheral lines formed below, and intersecting with, the first bank and the second bank, wherein each of the peripheral lines includes a plurality of bends provided between the first bank and the second bank in plan view.
    Type: Grant
    Filed: December 26, 2017
    Date of Patent: September 19, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Hisao Ochi, Tohru Senoo, Jumpei Takahashi, Tohru Sonoda, Takashi Ochi, Takeshi Hirase
  • Patent number: 11765934
    Abstract: A display device includes a first substrate including a display area in which a plurality of pixels are arranged and a light transmitting area disposed in the display area, an interlayer insulating layer covering the display area and exposing the light transmitting area, an inner sidewall of the interlayer insulating layer defining the light transmitting area, and an inorganic film disposed directly on the first substrate in the light transmitting area and overlapping the entire light transmitting area. A size of the light transmitting area is larger than a size of a pixel of the plurality of pixels.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: September 19, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seok Hoon Seo, Dae Sang Yun, Che Ho Lee, So Yeon Jeong
  • Patent number: 11756941
    Abstract: Embodiments include semiconductor packages. A semiconductor package includes a plurality of dies on a package substrate, and a plurality of smart dies on the package substrate, where the plurality of smart dies include a plurality of interconnects and a plurality of capacitors. The semiconductor package also includes a plurality of routing lines coupled to the dies and the smart dies, where the routing lines are communicatively coupled to the interconnects of the smart dies, where each of the dies has at least two or more routing lines to communicatively couple the dies together, and where one of the routing lines is via the interconnects of the smart dies. The capacitors may be a plurality of metal-insulator-metal (MIM) capacitors. The dies may be a plurality of active dies. The routing lines may communicatively couple first and second active dies to first and second smart dies.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: September 12, 2023
    Assignee: Intel Corporation
    Inventors: John Fallin, Daniel Willis
  • Patent number: 11758754
    Abstract: A display apparatus having enhanced heat dissipation performance is provided. The display apparatus includes a substrate including a display area with a light emitting device disposed therein and a non-display area surrounding the display area, an adhesive layer covering the light emitting device, a heat dissipation substrate provided on the adhesive layer, a pad part provided in the non-display area of the substrate, a circuit film electrically connected to the pad part, and a printed circuit board disposed on the heat dissipation substrate and electrically connected to the circuit film, wherein the heat dissipation substrate is disposed in the outermost portion of the display apparatus.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: September 12, 2023
    Assignee: LG Display Co., Ltd.
    Inventors: Taejin Choi, JooHwan Shin, MinHo Oh
  • Patent number: 11758775
    Abstract: A display apparatus includes: a substrate including a component area, a display area, and a middle area provided between the component area and the display area; a thin-film transistor arranged in the display area; a display element including a pixel electrode, an intermediate layer, and an opposite electrode, wherein the pixel electrode is electrically connected to the thin-film transistor; a first organic insulating layer, a second organic insulating layer, and a passivation layer sequentially stacked on each other between the thin-film transistor and the pixel electrode; and a groove arranged in the middle area, wherein the groove divides an organic material layer included in the intermediate layer, wherein the groove is provided in multiple layers including an organic layer and an inorganic layer, wherein the organic layer is arranged on the substrate, and the inorganic layer is stacked on the organic layer.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: September 12, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jaehak Lee, Jongbaek Seon, Juncheol Shin, Jieun Choi
  • Patent number: 11751444
    Abstract: A flexible display device includes a first display region, a second display region, a curved portion, a first high power supply voltage trunk wiring line, and a second high power supply voltage trunk wiring line. A plurality of first high power supply voltage lines branch from the first high power supply voltage trunk wiring line and extend to the first display region, a plurality of second high power supply voltage lines branch from the second high power supply voltage trunk wiring line and extend to the second display region, and the first high power supply voltage trunk wiring line and the second high power supply voltage trunk wiring line are electrically connected to each other via a first curved portion conductive layer formed in the curved portion.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: September 5, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Noriko Watanabe, Takeshi Yaneda
  • Patent number: 11751445
    Abstract: A display device includes: a first conductive layer on a resin substrate layer; a planarization film on the first conductive layer; and OLEDs on the planarization film. There is provided a second conductive layer in a frame area surrounding a display area. The second conductive layer is in contact with second electrodes of the OLEDs on the planarization film and also in contact with the first conductive layer in an external side of the planarization film. The second electrode is electrically connected to the first conductive layer via the second conductive layer. The planarization film includes, in the frame area, a portion where there is provided a trench. The first conductive layer is exposed from the planarization film in the trench. The second electrode is electrically connected to the first conductive layer via the second conductive layer in the trench.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: September 5, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Hisao Ochi, Jumpei Takahashi, Tohru Sonoda
  • Patent number: 11751422
    Abstract: A display device includes a metal pattern formed, in a frame region between a variant edge portion of the display device forming a cutout portion, and a display region. The metal pattern is formed from a metal layer conforming to at least a portion of the shape of the cutout portion.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: September 5, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Noriko Watanabe
  • Patent number: 11737342
    Abstract: The present disclosure provides a display substrate and a manufacturing method thereof, and a display apparatus. The display substrate has a fingerprint identification region. The display substrate includes a base substrate; a display unit on the base substrate and including a display thin film transistor and a light-emitting device, a second electrode of the display thin film transistor being coupled to a first electrode of the light-emitting device; and a fingerprint identification unit at a gap between adjacent display units in the fingerprint identification region and including a fingerprint identification transistor and a photosensitive device, a first electrode of the fingerprint identification transistor being coupled to a second electrode of the photosensitive device. The display substrate further includes a gate insulating layer on a side of an active layer of the display thin film transistor and an active layer of the fingerprint identification transistor distal to the base substrate.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: August 22, 2023
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Huaisen Ren, Ke Yang, Tao Gao, Zubin Lv, Peng Hou, Yanqiang Wang, Yongzhan Han
  • Patent number: 11716878
    Abstract: A method manufacturing a display device includes: forming a pixel circuit in a display area; forming a sacrificial layer on an insulating layer arranged in a non-display area, the sacrificial layer including an isolated pattern hole; forming functional layers and an opposite electrode of an organic light-emitting diode that extends over the display area and the non-display area, the functional layers and the opposite electrode covering the sacrificial layer; irradiating a laser beam to the opposite electrode through the sacrificial layer and the pattern hole from below a substrate; and lifting off the sacrificial layer from the insulating layer and simultaneously, lifting off the opposite electrode to which the laser beam is irradiated, wherein at least a portion of the functional layers is left on a portion of the insulating layer corresponding to the opposite electrode that is removed.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: August 1, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hwiseong Kim, Hoisoo Kwon, Seunghwan Kim, Yujin Ye, Seunghwan Yu, Jaeman Lee, Heewon Yoon
  • Patent number: 11711949
    Abstract: A display device includes a substrate having a display area and a non-display area. A plurality of insulation layers are disposed on the substrate. A pixel is disposed on the substrate in the display area. The pixel includes a transistor and a light emitting element electrically connected to the transistor. A crack blocker is disposed on the substrate in the non-display area and includes a plurality of first crack block grooves defined in at least one of the plurality of insulation layers. Each first crack block grooves extends in a first direction and is arranged in a second direction crossing the first direction. A plurality of second crack block grooves is defined in at least one of the plurality of insulation layers and is adjacent to the plurality of first crack block grooves. Each second crack block grooves extends in the second direction and is arranged in the first direction.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: July 25, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jihye Heo, Ki Wook Kim, Eunbyul Jo, Joong-Soo Moon
  • Patent number: 11705349
    Abstract: A transfer substrate is configured to transfer a plurality of micro components from a first substrate to a second substrate. The transfer substrate comprises a base and a plurality of transfer heads. The base includes an upper surface. The plurality of transfer heads is disposed on the upper surface of the base, wherein each transfer head includes a first surface and a second surface opposite to each other and the transfer heads contact the base with the first surfaces thereof. A plurality of adhesion lumps is separated from each other, wherein each adhesion lump is disposed on the second surface of one of the transfer heads. A CTE of the base is different from CTEs of the transfer heads.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: July 18, 2023
    Assignee: PlayNitride Inc.
    Inventors: Yu-Hung Lai, Tzu-Yang Lin, Yun-Li Li
  • Patent number: 11705512
    Abstract: A high electron mobility transistor (HEMT) includes a carrier transit layer, a carrier supply layer, a main gate, a control gate, a source electrode and a drain electrode. The carrier transit layer is on a substrate. The carrier supply layer is on the carrier transit layer. The main gate and the control gate are on the carrier supply layer. A fluoride ion doped region is formed right below the main gate in the carrier supply layer. The source electrode and the drain electrode are at two opposite sides of the main gate and the control gate, wherein the source electrode is electrically connected to the control gate by a metal interconnect. The present invention also provides a method of forming a high electron mobility transistor (HEMT).
    Type: Grant
    Filed: February 21, 2022
    Date of Patent: July 18, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Hsing Lee, Yi-Chung Sheng, Sheng-Yuan Hsueh, Chih-Kai Kang, Guan-Kai Huang, Chien-Liang Wu
  • Patent number: 11706948
    Abstract: An organic light emitting display apparatus is disclosed, which comprises a substrate, a thin film transistor provided on the substrate, a planarization film provided on the thin film transistor, a light emitting diode provided on the planarization film and electrically connected with the thin film transistor, an encapsulation layer covering the light emitting diode, and an encapsulation substrate provided on the encapsulation layer, wherein the encapsulation substrate may include a first portion that includes a first member and a second portion that includes a second member.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: July 18, 2023
    Assignee: LG Display Co., Ltd.
    Inventors: JooHwan Shin, Dohyung Kim, MinJoo Kang, Sungsoo Gil, MinHo Oh, TaeJin Choi
  • Patent number: 11706953
    Abstract: A display device includes a display panel and an optical member. The display panel includes a lower substrate and an upper substrate. The display panel forms a light-transmitting area and a display area near the light-transmitting area. The optical member is adjacent to a rear surface of the display panel and overlaps with a portion corresponding to the light-transmitting area. The display area includes a thin film transistor and an organic light emitting element configured to receive a current from the thin film transistor. The light-transmitting area does not include a metal layer, which is disposed in the display area. The upper substrate and the lower substrate do not have a through-hole structure in the light-transmitting area.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: July 18, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jin Koo Chung, Beohm Rock Choi
  • Patent number: 11695014
    Abstract: To provide a semiconductor device having a thin-film BOX-SOI structure and capable of realizing a high-speed operation of a logic circuit and a stable operation of a memory circuit. A semiconductor device according to the present invention includes a semiconductor support substrate, an insulation layer having a thickness of at most 10 nm, and a semiconductor layer. In an upper surface of the semiconductor layer, a first field-effect transistor including a first gate electrode and constituting a logic circuit is formed. Further, in the upper surface of the semiconductor layer, a second field-effect transistor including a second gate electrode and constituting a memory circuit is formed. At least three well regions having different conductivity types are formed in the semiconductor support substrate.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: July 4, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Ryuta Tsuchiya, Toshiaki Iwamatsu
  • Patent number: 11696474
    Abstract: A display device includes, among other things, a pad area having a pattern that may reduce the distance gap between the signal lines cause by the contour changes of the signal lines. A corresponding print circuit board may also include a similar pattern to assimilate the distance gap between the lead wires. The pad and print circuit board may contact through anisotropic conductive film.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: July 4, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sang Hyun Lim, Dong Gyun Ra
  • Patent number: 11690258
    Abstract: A display device including: a substrate; a plurality of transistors disposed on the substrate; and a multi-layer insulating film disposed on the transistors, wherein the multi-layer insulating film includes a first insulating film and a second insulating film, the multi-layer insulating film includes a first region in which the first insulating film and the second insulating film overlap each other in a direction perpendicular to the substrate and a second region in which the first insulating film is disposed, the first region overlaps the plurality of transistors, and a modulus of the second insulating film is lower than a modulus of the first insulating film.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: June 27, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Mi Jang, Do Hyun Kwon, Min Jung Lee