Abstract: A semiconductor device includes a first semiconductor layer having first and second regions, a plurality of first channel layers spaced apart from each other in a vertical direction on the first region of the first semiconductor layer, a first gate electrode surrounding the plurality of first channel layers, a plurality of second channel layers spaced apart from one another in the vertical direction on the second region of the first semiconductor layer, and a second gate electrode surrounding the plurality of second channel layers, wherein each of the plurality of first channel layers has a first crystallographic orientation, and each of the plurality of second channel layers has a second crystallographic orientation different from the first crystallographic orientation, and wherein a thickness of each of the plurality of first channel layers is different from a thickness of each of the plurality of second channel layers.

Abstract: A method for etching a surface including obtaining a structure comprising a plurality of nanowires on or above a substrate and a dielectric layer on or above the nanowires, wherein the dielectric layer comprises protrusions formed by the underlying nanowires; reacting a surface of the dielectric layer with a reactant, comprising a gas or a plasma, to form a reactive layer on the dielectric layer, wherein the reactive layer comprises a chemical compound including the reactant and elements of the dielectric layer and the reactive layer comprises sidewalls defined by the protrusions; and selectively etching the reactive layer, wherein the etching etches the protrusions laterally through the sidewalls so as to planarize the surface and remove or shrink the protrusions.

Abstract: A method for processing a transparent cover plate for a flat body includes the following steps of providing the transparent cover plate having an outer side and an opposite inner side, wherein the transparent cover plate includes a structured area with a light-scattering structure, forming of at least one optical interference layer on a cover plate side including applying a mask to the transparent cover plate, wherein the mask does not cover a first area of a cover plate surface and covers a second area of the cover plate side, and the first area and the second area are arranged to overlap the structured area, the at least one optical interference layer is applied in overlap with the mask, and removing of the mask, whereby the at least one optical interference layer is also removed.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a stack of word line layers and insulating layers that are stacked alternatingly over the substrate, and channel structures formed in a first array region and a second array region of the stack. The first array region and the second array region are positioned at opposing sides of the stack. A first staircase is formed in a connection region of the stack over the substrate. The connection region is arranged between the first and second array regions and the first staircase has non-quadrilateral treads. A second staircase is formed in the connection region of the stack over the substrate and the second staircase has non-quadrilateral treads. The connection region in the stack includes a separation region between the first and second staircases.

Abstract: A microelectromechanical system device includes a substrate, a dielectric layer, an electrode, a surface modification layer and a membrane. The dielectric layer is formed on the substrate, and is formed with a cavity that is defined by a cavity-defining wall. The electrode is formed in the dielectric layer. The surface modification layer covers the cavity-defining wall, and has a plurality of hydrophobic end groups. The membrane is connected to the dielectric layer, and seals the cavity. The membrane is movable toward or away from the electrode. A method for making a microelectromechanical system device is also provided.

Abstract: According to at least one embodiment, a method of fabricating a micro electro-mechanical systems (MEMS) structure is disclosed. The method involves causing an etchant to remove a portion of a sacrificial layer of the MEMS structure, the sacrificial layer between a structural layer of the MEMS structure and a substrate of the MEMS structure. In this embodiment, causing the etchant to remove the portion of the sacrificial layer involves causing a target portion of the substrate to be released from the MEMS structure. According to another embodiment, another method of fabricating a MEMS structure is disclosed. The method involves causing an etchant including water to remove a portion of a sacrificial layer of the MEMS structure, the sacrificial layer between a structural layer of the MEMS structure and a substrate of the MEMS structure. In this embodiment, the sacrificial layer and the substrate are hydrophobic.

Abstract: This disclosure describes a superconducting device comprising a trench and a cavity that extends through a superconducting base layer. The trench crosses the cavity. The superconducting device further comprises a first junction layer that extends from a first region of the superconducting base layer to the cavity, an insulating layer on the surface of the first junction layer, and a second junction layer that extends from a second region of the superconducting base layer to the cavity. The second junction layer overlaps with the insulating layer on the bottom of the cavity. The disclosure also describes a method for producing this disclosed superconducting device.

Abstract: To provide a display device with excellent display quality, in a display device including a signal line, a scan line, a transistor, a pixel electrode, and a common electrode in a pixel, the common electrode is included in which an extending direction of a region overlapping with the signal line differs from an extending direction of a region overlapping with the pixel electrode in a planar shape and the extending directions intersect with each other between the signal line and the pixel electrode. Thus, a change in transmittance of the pixel can be suppressed; accordingly, flickers can be reduced.

Abstract: A method for fabricating a second generation high-temperature superconductor (2G-HTS) tape, including: (S1) depositing a superconducting thin film on a surface of a ductile metal substrate with a buffer layer; (S2) forming a micro-holes array pattern on a surface of the superconducting thin film by etching using a reel-to-reel dynamic femtosecond infrared laser etching system, where the micro-holes array pattern covers the superconducting thin film; (S3) depositing a superconducting thick film on the surface of the superconducting thin film; and (S4) depositing a silver protective layer and a copper stabilization layer on a surface of the superconducting thick film.

Abstract: A MEMS sensor including a diaphragm, a base surface area of the diaphragm being delimited with the aid of a peripheral wall structure, and the base surface area including at least two subareas, of which at least one of the subareas is deflectably situated, and the at least two subareas being separated from one another with the aid of at least one separating structure or being delimited by the latter. The separating structure includes at least one fluid through-opening for the passage of fluid.

Abstract: In certain aspects, a method for controlling wafer stress is disclosed. A semiconductor film is formed on a backside of a wafer. The wafer is deformed by stress associated with a front-side semiconductor structure on a front side of the wafer opposite to the backside of the wafer. A laser application region of the semiconductor film is determined. A laser anneal process is performed in the laser application region of the semiconductor film.

Abstract: A semiconductor package with design features, including an isolation structure for internal components and a flexible electrical connection, that minimizes errors due to environmental temperature, shock, and vibration effects. The semiconductor package may include a base having a first portion surrounded by a second portion. A connector assembly may be attached to the first portion. The connector assembly may extend through an opening in the base. A lid attached may be attached to, at least, the second portion. The attached lid may form a hermetically-sealed cavity defined by an upper surface of the first portion, the connector assembly, and an inner surface of the lid. An elastomer pad may be on the first portion and a sub-assembly may be on the elastomer pad. A flexible electrical connection may be formed between the connector assembly and the sub-assembly.

Abstract: An electronic device includes a first electronic unit and a second electronic unit. The first electronic unit emits a blue light having a first spectrum, the first spectrum has a first intensity, and the first intensity is a maximum intensity of the first spectrum. The second electronic unit emits a light having a second spectrum different from the first spectrum, the second spectrum has a second intensity in a range from 300 nm to 460 nm, and the second intensity is a maximum intensity in the range from 300 nm to 460 nm of the second spectrum. The first intensity is greater than the second intensity.

Abstract: A MEMS support structure and a cap structure are provided. At least one vertically-extending trench is formed into the MEMS support structure or a portion of the cap structure. A vertically-extending outgassing material portion having a surface that is physically exposed to a respective vertically-extending cavity is formed in each of the at least one vertically-extending trench. A matrix material layer is attached to the MEMS support structure. A movable element laterally confined within a matrix layer is formed by patterning the matrix material layer. The matrix layer is bonded to the cap structure. A sealed chamber containing the movable element is formed. Each vertically-extending outgassing material portion has a surface that is physically exposed to the sealed chamber, and outgases a gas to increase the pressure in the sealed chamber.

Abstract: Devices and methods for layout-dependent voltage handling improvement in switch stacks. In some embodiments, a switching device can include a first terminal and a second terminal, a radio-frequency signal path implemented between the first terminal and the second terminal, and a plurality of switching elements connected in series to form a stack between the second terminal and ground. The stack can have an orientation relative to the radio-frequency signal path, and the switching elements can have a non-uniform distribution of a first parameter based in part on the orientation of the stack.

Abstract: A light receiving element (1) according to an embodiment of the present disclosure includes: a semiconductor layer including a compound semiconductor material; a first impurity diffusion region (12A) provided on one surface of the semiconductor layer; and a second impurity diffusion region (12B) provided around the first impurity diffusion region (12A). The second impurity diffusion region (12B) has a lower impurity concentration than an impurity concentration of the first impurity diffusion region (12A).

Abstract: Techniques for reducing the specific contact resistance of metal-semiconductor (group IV) junctions by interposing a monolayer of group V or group III atoms at the interface between the metal and the semiconductor, or interposing a bi-layer made of one monolayer of each, or interposing multiple such bi-layers. The resulting low specific resistance metal-group IV semiconductor junctions find application as a low resistance electrode in semiconductor devices including electronic devices (e.g., transistors, diodes, etc.) and optoelectronic devices (e.g., lasers, solar cells, photodetectors, etc.) and/or as a metal source and/or drain region (or a portion thereof) in a field effect transistor (FET). The monolayers of group III and group V atoms are predominantly ordered layers of atoms formed on the surface of the group IV semiconductor and chemically bonded to the surface atoms of the group IV semiconductor.

Abstract: The present invention is related to a substrate (10) for a controlled implantation of ions (80) into a bulk (20), the substrate (10) comprising the bulk (20) composed of a crystalline first material (70), the bulk (20) comprising an implantation region (28) and a surface (22), wherein the implantation region (28) is located within the bulk (20) and along an implantation direction (82) at an implantation depth (26) below an implantation area (24) on the surface (10) of the bulk (20).

Abstract: A method for manufacturing an electromechanical actuator includes providing a primary stack of layers comprising a monocrystalline layer, providing a secondary stack of layers, and forming, in the etching layer, at least three pads. The method further includes encapsulating the three pads by a first encapsulation layer, assembling the primary stack of layers with the secondary stack of layers, removing the first substrate, and forming a movable electrode in the monocrystalline layer.

Abstract: A semiconductor device package includes a substrate, a first electronic component, a second electronic component, a package body and a shield. The substrate has a first surface and a second surface opposite to the first surface. The substrate defines a cavity from the second surface extending into the substrate. The first electronic component is disposed on the first surface of the substrate. The second electronic component is disposed within the cavity of the substrate. The package body is disposed on a portion of the first surface of the substrate and covers the first electronic component. The shield is disposed on external surfaces of the package body.