Abstract: A receiver device according to an embodiment includes a equalizer, a sampler, and a controller. The equalizer receive a first signal. The equalizer boosts the first signal to output a resultant as a second signal. The sampler samples the second signal. The sampler outputs a sampling result of the second signal as a first digital signal. The controller executes adaptive processing for adapting an amount of boost of the first signal. In the adaptive processing, the controller is configured to: adjust an amount of boost for the equalizer based on inter-symbol interference of a part in the first digital signal, the part matching a data pattern of a set pattern filter; and dynamically change a pattern filter to be set according to the amount of boost for the equalizer.

Abstract: A continuous time linear equalizer (CTLE) includes a first circuit path having a step response that increases from an first initial value to a steady state value higher than the first initial value. The CTLE also includes a second circuit path in parallel with the first circuit path, the second circuit path having a step response that increases from a second initial value to a peak and subsequently falls to second steady state value that is approximately equal to the second initial value. The CTLE is configured to combine an output of the first circuit path and an output of the second circuit path.

Abstract: Provided is a jamming defense system. In the jamming defense system for wireless local area network communication between an access point (AP) and a user node, the AP that transmits and receives a message to and from the user node generates an AP secret key value by measuring a signal reception strength for the message, and the user node that transmits and receives a message to and from the AP generates a user node secret key value by measuring a signal reception strength for the message.

Abstract: An offset detector circuit includes a digital signal register storing M unit digital signals received in latest M signal periods, M being a natural number, among digital signals generated based on a single-ended PAM-N signal, N being an odd number, a comparator outputting a comparison signal of a pair of signals included in differential signals generated from a differential signal generator based on the single-ended PAM-N signal, a comparison result register storing M unit comparison signals corresponding to the latest M signal periods among the comparison signals, a pattern detector outputting a detection signal when the M unit digital signals match a predetermined signal pattern, and an offset checker checking patterns of the M unit comparison signals in response to the detection signal, and outputting an offset detection signal when the patterns of the M unit comparison signals match a predetermined offset pattern.

Abstract: Disclosed embodiments include a decision feedback equalizer (DFE) comprising an N-bit parallel input adapted to be coupled to a communication channel and configured to receive consecutive communication symbols, a first DFE path including a first path input configured to receive communication symbols, and a first adder having a first adder input coupled to the first path input. There is a first DFE filter having outputs responsive to the first DFE filter inputs, the outputs coupled to the second adder input. The DFE includes a first path having a first slicer and a first multiplexer, a first path multiplexer output, and a second DFE path including a second path input configured to receive a second communication symbol, a second adder, a second DFE filter, a second slicer, and a second multiplexer.

Abstract: The present disclosure relates to an acoustic position determination system that includes a mobile communication device and at least one base transmitter unit. The mobile communication device is configured to identify a peak in the received signal, and to de-convolve the signal with all codes that are relevant to the area in which the signal is received. A joint likelihood that a potential code is correct is formed by determining a likelihood based on a signal parameter such as signal-to-noise ratio and a likelihood based on time-of arrival information.

Abstract: Provided are a summing circuit and an equalizer including the summing circuit. The summing circuit includes: a reference signal generator generating a first reference signal and a second reference signal, based on a coefficient code; a first non-overlap clock buffer generating a first switching signal and a second switching signal by using the first reference signal; and a first current source receiving the first switching signal and the second switching signal generated by the first non-overlap clock buffer, generating a first output current by using a bias voltage, and outputting the first output current to an output line, wherein the first switching signal includes a switching signal and a complementary switching signal that is a complementary signal to the switching signal, and wherein a logic low period of the second switching signal is included in a logic high period of the complementary switching signal of the first switching signal.

Abstract: A receiver has a first equalizer circuit that includes a first stage having a source degeneration circuit and a trans-impedance amplifier (TIA). The source degeneration circuit includes a resistor coupled in parallel with a capacitor. The TIA includes an embedded variable gain amplifier with a gain controlled by feedback resistors. Each feedback resistor is coupled between input and output of the TIA. In some implementations, the receiving circuit has a second equalizer circuit coupled in series with the first equalizer circuit. The second equalizer circuit includes a first stage having a source degeneration circuit and a TIA. The source degeneration circuit in the second equalizer circuit has a source degeneration resistor coupled in parallel with a source degeneration capacitor and the TIA includes an embedded variable gain amplifier whose gain is controlled by feedback resistors coupled between input and output of the TIA in the second equalizer circuit.

Abstract: An echo cancellation device and an echo cancellation method thereof applied in a communication device are provided. The echo cancellation device includes an echo canceller and a combine circuit. The echo canceller obtains a plurality of delayed signals from a local signal of the communication device, and the delayed signals are divided into a plurality of delayed signal groups. The echo canceller selectively ignores at least one of the delayed signal groups, and the echo canceller generates an echo cancellation signal with the others of the delayed signal groups. The combine circuit is coupled to an interface circuit of the communication device to receive a received signal. The combine circuit cancels an echo component of the received signal with the echo cancellation signal to generate a cancelled signal.

Abstract: The present invention discloses a receive data equalization apparatus. A delay-compensating calculation circuit retrieves training data groups of a training data signal to retrieve total delay amount, generate signed compensation amounts according to a relation among training data contents of training data in each of the training data groups to generate total compensation amount accordingly, and solve equations that correspond total delay amount of the training data groups to the total compensation amount to obtain each of the compensation amounts. A receive data equalization circuit receives the compensation amounts and retrieves a receive data group in a receive data signal, generate signed receive compensation amounts according to a relation among receive data contents of receive data in the receive data group to generate a total receive compensation amount accordingly to perform equalization on a terminal edge of the receive data group according to the total receive compensation amount.

Abstract: A signal transmitter may include a waveform synthesis circuit and a signal transmission circuit. The waveform synthesis circuit may store values of a reference waveform for a selected channel of the signal transmitter, and use the stored values to generate values of reference waveforms for one or more other channels of the signal transmitter. The waveform synthesis circuit may further include a sampling boost circuit to generate one or more additional values for the reference waveforms. The waveform transmission circuit may generate signals for the channels of the signal transmitter based at least in part on the values of the reference waveforms, and transmit the signals via one or more antennas.

Abstract: During a training procedure for communicating via a full-duplex communication link, a first communication device receives training information from a second communication device. The training information corresponds to first signal processing parameters developed at the second communication device for use by the second communication device to process signals received by the second communication device via the full-duplex communication link. After receiving the training information from the second communication device, the first communication device develops second signal processing parameters to be used by the first communication device to process signals received by the first communication device via the full-duplex communication link. The second signal processing parameters are developed using the training information received from the second communication device.

Abstract: A system for selecting an equalizer setting of an equalizer to equalize signals received via a communications link. Starting with a first (e.g., minimum) equalizer setting and a threshold voltage near the mid-eye voltage of the equalized output signal, the system estimates the amplitude of the inner eye of the equalized output signal by comparing the equalized output signal to a series of threshold voltages. If the amplitude of the equalized output signal is less than ideal, the system dynamically increases the equalizer setting. The system quickly converges on the equalizer setting for the communication link because, rather than comparing the output signal at every voltage offset using every equalizer setting, the system only evaluates the equalizer settings necessary to select the equalizer setting for the communications link and uses only the voltage offsets necessary to evaluate each equalizer setting.

Abstract: A digital signal processor includes analog to digital converters to convert an analog voltage to digital voltage in unit intervals of an analog signal. A decision feedback equalizer (DFE) determines a first level of a digital sum of a digital voltage in a first UI and digital voltages of adjacent UIs (taps). The DFE identifies predetermined sequences of levels of consecutive UIs that include the first level and selects one of the predetermined sequences to decode digital data encoded in the analog signal in the UI. The DSP may be programmable to include taps from UIs that may affect the first UI. The predetermined sequences may include levels of the digital sums of consecutive UIs of the analog signal. The predetermined sequences may be identified in a look-up table based on the first level.

Abstract: Reduced-complexity maximum likelihood sequence detectors (rMLSD) are disclosed for detecting multibit symbols such as those found in pulse amplitude modulation (PAM), quadrature amplitude modulation (QAM), and phase shift keying (PSK) signal constellations with more than two constellation points. One illustrative digital communications receiver includes: an initial equalizer that derives an initial sequence of symbol decisions from a filtered receive signal, each symbol decision in the initial sequence having a second most likely symbol decision; and a rMLSD that derives a final sequence of symbol decisions by evaluating state metrics only for each symbol decision in the initial sequence and its second most likely symbol decision.

Abstract: Embodiments provide a terminal point of a communication system, wherein a control signal is emitted in the communication system for coordinating the participants of the communication system, wherein the control signal is transferred distributed in correspondence with a frequency hop-based occupancy of resources of the frequency band, indicated by a control signal hopping pattern, wherein the terminal point has a receiver, wherein a receive bandwidth of the receiver is smaller at least by the factor 3 than a bandwidth of the frequency hop-based occupancy of resources of the frequency band, indicated by the control signal hopping pattern, wherein the terminal point is configured to receive a reference signal, the reference signal having information on the control signal, wherein the terminal point is configured to receive the control signal based on the information on the control signal.

Abstract: Systems and methods for magnitude and phase trimming are provided. In one aspect, a radio frequency (RF) trimmer circuit includes an input terminal configured to receive an RF signal, an output terminal configured to output the RF signal, a control input configured to receive a control signal, at least one impedance element, and at least one transistor configured to selectively connect the impedance element onto a path between the input and output terminals. The selectively connecting the impedance element controls at least one of a magnitude trim and a phase trim of the RF signal.

Abstract: A sequence detection device includes a decision-feedback equalizer (DFE), a combining circuit, a decision circuit, and a sequence detection circuit. The DFE processes a symbol decision signal to generate a first equalized signal. The combining circuit combines a data signal and the first equalized signal to generate a sample signal. The decision circuit performs hard decision upon the sample signal to generate the symbol decision signal. The sequence detection circuit performs sequence detection upon the data signal to generate and output a symbol sequence. Regarding the sequence detection, the sequence detection circuit selects branches for branch metric calculation according to at least the symbol decision signal.

Abstract: Embodiments provide a method, apparatus and device of reconstructing non-Kronecker structured channels, applicable to communications. A weight matrix is determined for emulating link characteristics of a reconstructed channel, and includes a weight corresponding to each ray mapped to a probe antenna. In each cluster, rays mapped to each probe antenna have different weights with each other. For each cluster, a time-varying fading channel impulse response of each ray of the cluster mapped to a probe antenna is calculated using the weight matrix. The time-varying fading channel impulse response includes a transition equation for each probe antenna describing mapping of rays of the cluster to the probe antenna. A transition matrix from each probe antenna to receiving antennas of a device under test is determined. A product of the time-varying fading channel impulse response of the cluster multiplied by the transition matrix serves as a channel impulse response of the cluster.

Abstract: A transceiver of the present inventive concept includes a transmitter and a receiver connected by a first line and a second line, and the transmitter includes a first encoder; a second encoder; and a transmission driver. The first encoder generates a first encoded data different from a first data during a first period and the second encoder generates a second encoded data equal to a second data during the first period, the second encoder generates the second encoded data different from the second data during a second period and the first encoder generates the first encoded data equal to the first data during the second period, and the first period and the second period are arranged to alternate with each other.