Abstract: A radio-transmitting device comprises a radio interface operating in a predetermined frequency band, operatively arranged for modulating a carrier having a frequency in the frequency band, while switching the frequency of the carrier among several hopping frequencies in the frequency band, according to a hopping sequence, to obtain a spread-spectrum modulated signal, wherein the spread-spectrum modulated signal includes, in a preamble portion, a plurality of sync words, each combined with at least one instance of a sequential index, the sync words being transmitted at different frequencies, and a data portion following the preamble portion and including a plurality of frequency hops.

Abstract: This disclosure provides methods, devices and systems for wireless communication, and particularly, methods, devices and systems for implementing a joint transmission feature in a wireless communication system. Using the joint transmission feature, multiple access points (APs) may use an aggregated collection of antennas of multiple APs to simultaneously transmit a joint beamformed transmission to one or more stations (STAs). The techniques in this disclosure may prevent or reduce variations in relative gain adjustments by the APs that could otherwise negatively impact the joint transmission. In some implementations, a network device may determine a normalized gain adjustment value based on power parameters associated with each of the multiple APs. In some other implementations, each AP may determine the normalized gain adjustment value based on power parameters shared between the APs.

Abstract: Various embodiments provide for quarter-rate data sampling with loop-unrolled decision feedback equalization (DFE) that uses a two-summer (e.g., two-summing node) approach. For example, some embodiments provide for quarter-rate data sampling comprising a plurality of unrolled first-tap DFE loops, and two summers and a two-to-one multiplexer for each of the other tap loops used for direct feedback (e.g., second tap, third tap, fourth tap, etc.

Abstract: Systems and techniques are described that are directed to filter frequency response shift compensation, including attenuation compensation. Attenuation compensation can apply a pre-distortion to compensate for the magnitude of attenuated resource units (RUs). Additionally, filter frequency response shift can involve applying PHY Protocol Data Unit (PPDU) scheduling schemes. For example, a PPDU scheduling scheme can reduce bandwidth in the channel, thereby dropping the affected RUs. The attenuation compensation is implemented using front ends that provide feedback to a respective radio, which allows that radio to apply the appropriate pre-distortion. The front end can include one or more filters enabling frequency domain coexistence between collocated radios operating in the differing Wi-Fi bands, and a coupler that provides the feedback indicating the frequency response shift to a radio.

Abstract: Systems, methods, and devices for reducing insertion loss and/or swapping transmitter (TX) and receiver (RX) frequencies in an electrical balance duplexer (EBD) used in a transceiver device for frequency division duplexing (FDD) applications are provided. Feed-forward receiver path from the antenna to a low noise amplifier (LNA) and a feed-forward path from the antenna to a power amplifier (PA) of the EBD may be used for reducing insertion loss of the RX and TX signals. In some embodiments, switches may be used to selectively alter operational modes for varied levels of isolation and/or swapping of TX and RX frequencies.

Abstract: A radio frequency module includes: a module board including a first principal surface; a reception filter disposed on or above the first principal surface; a transmission filter disposed on the reception filter; a switch mounted on the module board; and a bonding wire that connects the transmission filter to the switch. One end of the bonding wire is connected to the transmission filter and the other end of the bonding wire is connected to the switch.

Abstract: A transmission apparatus that (i) generates a Quadrature Phase Shift Keying (QPSK) modulation signal s1(t) by applying a QPSK modulation scheme to a first data sequence, (ii) generates a 16-Quadrature Amplitude Modulation (QAM) modulation signal s2(t) by applying a 16-QAM modulation scheme to a second data sequence, (iii) generates a transmission signal z1(t) and a second transmission signal z2(t) by applying a phase hopping process, a precoding process, and a power adjust process to the QPSK modulation signal s1(t) and the 16-QAM modulation signal s2(t), wherein an average transmission power of the 16-QAM modulation signal s2(t) being the same as an average transmission power of the QPSK modulation signal s1(t), and (iv) transmits the transmission signal z1(t) from a first antenna at a first time and a first frequency and the second transmission signal z2(t) from a second antenna at the first time and the first frequency.

Abstract: An apparatus and a method for handling non-continuous data transfer for a decision feedback equalizer in a memory subsystem. The apparatus includes a plurality of end-of-transfer detection flip-flops configured to sample a read data enable signal; a flag flip-flop; a first logic circuit configured to generate a load enable signal in response to the end-of-transfer detection flip-flops and the flag flip-flop; a second logic circuit configured to generate a load data in response to the end-of-transfer detection flip-flops, the flag flip-flop and the read data enable signal; a plurality of first-in-first-out buffers configured to receive the load enable signal and the load data, and unload the load data as an end-of-transfer indicator in line with data strobe; and a plurality of bypass flip-flops configured to generate a bypass signal in response to the end-of-transfer indicator.

Abstract: Method for processing a sequence of digital signal samples including a first sub-sequence and a second sub-sequence. Forming a first block of samples comprising the first sub-sequence and a second block of samples comprising header samples followed by the second sub-sequence. Demodulating the first block of samples through a digital demodulator to produce a first block of symbols, and the second block of digital signal samples through a second digital demodulator to produce a second block of symbols. The second demodulator implementing a carrier synchronisation or symbol rate synchronisation starting with the header samples, which comprise samples in a number adapted in such a way that the synchronisation is effective before the second demodulator demodulates the second sub-sequence. Reconstructing a sequence of symbols by concatenating the first symbol block with the second symbol block.

Abstract: Systems and methods are disclosed for an integrated circuit (IC) comprising an oscillator, an on-off-keying modulator configured to modulate input data coupled to the oscillator, a serial communications transmitter coupled to the on-off-keying modulator, a serial communications receiver coupled to the serial communications transmitter by a set of cables, and an envelope detector coupled to the serial communications receiver. In the IC, power and data are simultaneously delivered across the same set of cables from the serial communications transmitter to the serial communications receiver.

Abstract: Disclosed embodiments include a decision feedback equalizer (DFE) comprising an N-bit parallel input adapted to be coupled to a communication channel and configured to receive consecutive communication symbols, a first DFE path including a first path input configured to receive communication symbols, and a first adder having a first adder input coupled to the first path input. There is a first DFE filter having outputs responsive to the first DFE filter inputs, the outputs coupled to the second adder input. The DFE includes a first path having a first slicer and a first multiplexer, a first path multiplexer output, and a second DFE path including a second path input configured to receive a second communication symbol, a second adder, a second DFE filter, a second slicer, and a second multiplexer.

Abstract: An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications capable of flexibly processing high-bandwidth and low-bandwidth RF input signal(s). The RF transceiver may selectively distribute high-bandwidth RF input signals among one or more DSP pipelines for parallel processing of the RF input signals, and the RF transceiver may coherently recombine the processed signals from the one or more DSP pipelines to generate an RF output signal. The ADDA RF transceiver includes one or more ADCs, DSPs, and DACs, all on one or more ASICs, FPGAs, or modular electronic devices in a single semiconductor package. Further, the RF transceiver is radiation tolerant at the module, circuit, and/or system level for high availability and reliability in the ionizing radiation environment present in the space environment.

Abstract: A radio frequency module includes a transmit filter of Band A and Band B, a transmit amplifier, and a switch circuit and can perform CA using a transmit signal of Band A and a receive signal of Band B, a transmit band of Band B including a receive band of Band C. The switch circuit includes a switch switching connection between a common terminal and a first selection terminal, a switch switching connection between the common terminal and a second selection terminal, and a switch switching connection between the second selection terminal and a third selection terminal. The common terminal is connected to the transmit amplifier. The first selection terminal is connected to the transmit filter of Band A. The second selection terminal is connected to the transmit filter of Band B. The third selection terminal is connected to a receive path of Band C.

Abstract: An electronic device according to various embodiments of the present invention can comprise: a housing; a first antenna element positioned inside the housing or at a first position thereof; a second antenna element positioned inside the housing or at a second position separated from the first position thereof; and a wireless communication circuit positioned inside the housing and electrically coupled to the first antenna element and the second antenna element.

Abstract: A physical layer transceiver for a wireline channel medium includes a host interface to a host device, a line interface to the medium, encoding/decoding circuitry for interfacing between the host device and the medium, and adaptive filter circuitry coupled to the encoding/decoding circuitry. The adaptive filter circuitry includes a plurality of filter taps, each corresponding to a segment of the medium, and capable of being powered ON and OFF separately from each other filter tap. Adaptive control circuitry can power ON a first subset, fewer than all the filter taps, corresponding to segments distributed along the medium, monitor powered-ON filter taps for occurrence of interference events, and upon detection of an interference event at a particular segment to which a particular powered-ON filter tap corresponds, power ON one or more additional filter taps corresponding to one or more segments in a vicinity of the particular segment.

Abstract: A radio frequency module includes: a transmission power amplifier that includes a plurality of amplifying elements that are cascaded; and a module board on which the transmission power amplifier is mounted, the module board including a first principal surface and a second principal surface on opposite sides of the module board. The plurality of amplifying elements include: a first amplifying element mounted on the first principal surface; and a second amplifying element mounted on the second principal surface and disposed upstream on a signal path from the first amplifying element.

Abstract: A radio frequency (RF) front end for wireless communications, in particular for use in a half duplex (HD) and/or full duplex (FD) transceiver. The RF front end is based on a quadrature balanced power amplifier (QBPA). The RF front end includes an antenna port for outputting a transmit signal to and receiving a receive signal from an antenna, and a receive port for outputting the receive signal to a signal processing section. Further, the QBPA is configured to receive a transmit input signal at a first port, receive a cancellation input signal at a fourth port, and receive the receive signal at a second port coupled to the antenna port.

Abstract: A low voltage drive circuit (LVDC) includes a drive sense circuit operable to convert analog outbound data into an analog transmit signal and convert analog receive signals into analog inbound data, a transmit digital to analog circuit operable to convert transmit digital data into the analog outbound data, and a receive analog to digital circuit including an analog to digital converter, a digital filtering circuit, and a data formatting module. The data formatting module includes a sample and hold circuit operable to sample and hold an n-bit digital value of filtered digital data from the digital filtering circuit to produce an n-bit sampled digital data value, a digital to digital converter circuit operable to adjust formatting of the n-bit sampled digital data value to produce a formatted digital value, and a data packeting circuit operable to generate a packet of received digital data from a plurality of formatted digital values.

Abstract: Disclosed is a method for uplink transmission and reception in a wireless communication system and an apparatus therefor. Specifically, a method for performing uplink transmission by a user equipment (UE) in a wireless communication system may comprise the steps of: receiving downlink control information (DCI) including sounding reference signal (SRS) resource indication (SRI) and precoding indication from a base station; and transmitting an uplink to the base station by applying precoding indicated by the precoding indication on an antenna port of an SRS transmitted within an SRS resource selected by the SRI.

Abstract: Methods, systems and storage medium for separating a target signal from noise are disclosed. A method comprises providing a plurality of input signals, each of the plurality of input signals comprising the target signal; synchronizing the plurality of input signals; and separating the plurality of synchronized input signals into the target signal and the noise.