Patents by Inventor Akihiro Yamazaki
Akihiro Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9434571Abstract: According to one embodiment, a booklet processing unit is disclosed. It includes a conveyance means for conveying a booklet containing an IC chip along a conveyance way; a printing means for printing a first particular information in the booklet; a recording means for recording a second particular information on the IC chip; a distinguishing means for distinguishing the quality of the printing state of the booklet and a recording state of the IC chip; and a marking means which moves a marking component and marks the booklet when the booklet is identified as being in a poor state by the distinguishing means such that the IC chip is avoided by the marking.Type: GrantFiled: March 14, 2014Date of Patent: September 6, 2016Assignee: Kabushiki Kaisha ToshibaInventor: Akihiro Yamazaki
-
Patent number: 9105277Abstract: According to one embodiment, an equalizer is configured to obtain a noise included in a first correction signal by using a noise component of a first track and a noise interference component from a second track. The equalizer is configured to correct the first correction signal by using the obtained noise. The equalizer is configured to equalize the corrected first correction signal. The noise component of the first track is calculated based on a noise component of the first track at a first timing and a noise component of the first track at a second timing earlier than the first timing. The noise interference component from the second track is calculated based on a noise interference component from the second track at the first timing and a noise interference component from the second track at the second timing. The decoder is configured to decode the equalized first correction signal.Type: GrantFiled: September 9, 2014Date of Patent: August 11, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Kohsuke Harada, Akihiro Yamazaki, Nobuhiro Maeto, Kazuto Kashiwagi, Naoki Tagami, Masahiro Kanamaru, Tomokazu Okubo
-
Patent number: 8988814Abstract: According to one embodiment, a storage device includes a data conversion unit that coverts user data of n bits, into m three-ary symbols, a recording medium that records the symbols as a signal of any one of three levels corresponding to values of the symbols, and a Viterbi equalizer that performs equalization of the m symbols simultaneously based on a signal read from the recording medium while setting the number of states as a power of 3 and using a trellis diagram having 2n branches, and calculates 2n likelihoods.Type: GrantFiled: September 3, 2014Date of Patent: March 24, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Kohsuke Harada, Akihiro Yamazaki, Nobuhiro Maeto, Kazuto Kashiwagi, Tomokazu Okubo, Naoki Tagami
-
Publication number: 20150046764Abstract: According to one embodiment, a recording and reproducing apparatus includes a first masking unit configured to apply first bit masking to error correction code (ECC) encoded data using a bit sequence for masking, to generate a masked bit sequence to be recorded on a medium, and a de-masking unit configured to apply de-masking, using the bit sequence for masking, to a sequence of decision values based on a signal read from the medium to generate a sequence of de-masked decision values to be ECC decoded. The bit sequence for masking comprises an iteration of a fixed bit sequence of N (>1) bits. The bit de-masking is an inverse process corresponding to the first bit masking.Type: ApplicationFiled: December 27, 2013Publication date: February 12, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Kohsuke HARADA, Akihiro Yamazaki, Yosuke Kondo, Kenji Yoshida, Kazuhito Ichihara, Kazuto Kashiwagi
-
Publication number: 20140284174Abstract: According to one embodiment, a booklet processing unit is disclosed. It includes a conveyance means for conveying a booklet containing an IC chip along a conveyance way; a printing means for printing a first particular information in the booklet; a recording means for recording a second particular information on the IC chip; a distinguishing means for distinguishing the quality of the printing state of the booklet and a recording state of the IC chip; and a marking means which moves a marking component and marks the booklet when the booklet is identified as being in a poor state by the distinguishing means such that the IC chip is avoided by the marking.Type: ApplicationFiled: March 14, 2014Publication date: September 25, 2014Applicant: Kabushiki Kaisha ToshibaInventor: Akihiro Yamazaki
-
Patent number: 8780472Abstract: According to one embodiment, an information reproducing apparatus is configured to obtain, from a read sample value sequence obtained by sampling a read signal read from a first recording track of a magnetic recording medium, an interference-component-removed read sample value sequence, from which an interference component from a second recording track adjacent to the first recording track is removed. The apparatus includes a decoding module. The decoding module is configured to generate a first interference-component-removed read sample value sequence based on a cancellation weight column which varies according to a difference in polarity between a first bit of the first recording track and a second bit of the second recording track adjacent to the first bit.Type: GrantFiled: September 20, 2012Date of Patent: July 15, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Tomokazu Okubo, Akihiro Yamazaki, Kazuto Kashiwagi, Naoki Tagami
-
Publication number: 20140149795Abstract: A disclosed apparatus includes a memory and circuitry that is configured to execute an operating system, and realize one or plural logical domains that provide a predetermined function as a computer and a hypervisor that manages the logical domain. The operating system is configured to: detect hardware to be diagnosed; upon detecting the hardware to be diagnosed, secure a memory area in the memory, which is used for diagnosis by the operating system; instruct a kernel of the operating system to ignore an error that will occur in the secured memory area; and output a diagnosis request that instructs to ignore the error and includes designation of the hardware to be diagnosed to the hypervisor. The hypervisor is configured to execute: upon receipt of the diagnosis request, perform a setting to ignore the error that will occur; and perform the diagnosis for the hardware.Type: ApplicationFiled: February 4, 2014Publication date: May 29, 2014Applicant: FUJITSU LIMITEDInventors: Yuichi MUSHA, Akihiro YAMAZAKI
-
Patent number: 8717697Abstract: According to one embodiment, there is provided a controller including an interference cancelling module, a boosting module, and a decoding module. The interference cancelling module generates a first correction signal by cancelling an interference component from an adjacent track in a signal read from a target track of a disk medium. The boosting module generates a second correction signal by boosting a low frequency component of a signal corresponding to the first correction signal. The decoding module decodes a signal based on the second correction signal.Type: GrantFiled: March 13, 2013Date of Patent: May 6, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Yosuke Kondo, Kohsuke Harada, Kenji Yoshida, Akihiro Yamazaki, Kazuhito Ichihara
-
Patent number: 8696224Abstract: According to one embodiment, a control device which controls to, after the feed device has fed the booklet so as to bring the page on the other surface side of the booklet into contact with the contact roller unit and fold the page on the other surface side, feed the booklet to the page turning position again.Type: GrantFiled: June 23, 2010Date of Patent: April 15, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Mitsuyoshi Kanda, Akihiro Yamazaki
-
Patent number: 8488264Abstract: According to one embodiment, a signal processing circuit processes a signal read from a magnetic disk including a servo region and a user data region, the servo region including a servo address mark, the user data region including a data sector, and includes a counter and a gate controller. The counter is configured to count a first clock when having detected the servo address mark based on the signal read from the magnetic disk. The gate controller is configured to generate a pulse for locating the data sector in synchronization with a second clock when the counter counts a first value.Type: GrantFiled: September 20, 2011Date of Patent: July 16, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Kenji Yoshida, Akihiro Yamazaki
-
Publication number: 20120155239Abstract: A channel circuit includes: a detecting module configured to sample a signal amplitude of a reproduced signal of a single-frequency pattern written on a medium, and to detect an amplitude change that is lower or higher than a threshold; and a judgement module configured to judge whether the reproduced signal is decodable by a decoding circuit or not based on a result of detection by the detecting module.Type: ApplicationFiled: September 22, 2011Publication date: June 21, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Masatsugu NISHIDA, Nobuhiro MAETO, Akihiro YAMAZAKI
-
Publication number: 20120134044Abstract: According to one embodiment, a signal processing circuit processes a signal read from a magnetic disk including a servo region and a user data region, the servo region including a servo address mark, the user data region including a data sector, and includes a counter and a gate controller. The counter is configured to count a first clock when having detected the servo address mark based on the signal read from the magnetic disk. The gate controller is configured to generate a pulse for locating the data sector in synchronization with a second clock when the counter counts a first value.Type: ApplicationFiled: September 20, 2011Publication date: May 31, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Kenji YOSHIDA, Akihiro YAMAZAKI
-
Patent number: 7940488Abstract: An amplifier amplifies, according to a first gain value, a first input signal acquired by reproducing first information from first areas having the first information recorded therein area by area in order. The amplifier also amplifies, according to a second gain value, a second input signal acquired by reproducing second information pursuant to reproduction of the first information, from a second area adjacent to the first area and that has the second information recorded at a recording level different from that of the first information. When the first input signal is amplified, a first gain value following a change in the first signal is calculated so that the level of the amplified signal becomes constant. When the second input signal is amplified, a second gain value following a change in the first gain value is calculated so that the level of the amplified signal becomes constant.Type: GrantFiled: December 29, 2008Date of Patent: May 10, 2011Assignee: Toshiba Storage Device CorporationInventor: Akihiro Yamazaki
-
Publication number: 20100328695Abstract: According to one embodiment, a control device which controls to, after the feed device has fed the booklet so as to bring the page on the other surface side of the booklet into contact with the contact roller unit and fold the page on the other surface side, feed the booklet to the page turning position again.Type: ApplicationFiled: June 23, 2010Publication date: December 30, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Mitsuyoshi Kanda, Akihiro Yamazaki
-
Patent number: 7840853Abstract: It is possible to suppress a CPU showing signs of unstable operation before the OS starts. A micro program acquires error CPU information (which cannot be recognized directly by the micro program) from the service processor immediately before the termination of the micro program and making a request for suppression of the CPU showing signs of unstable operation according to the acquired error CPU information. The service processor suppresses the CPU showing signs of unstable operation before the OS starts.Type: GrantFiled: September 18, 2007Date of Patent: November 23, 2010Assignee: Fujitsu LimitedInventors: Hidenori Higashi, Akihiro Yamazaki
-
Publication number: 20100241922Abstract: According to one embodiment, a circuit includes: an ECC encoder to assign symbols of a data string to M interleaves in sequence, create redundancy symbols for each interleaved string, insert the redundancy symbol into the data string every N symbols of the data string, and create ECC encoded data, where M and N are greater than or equal to 2; and an ECC decoder to assign the symbols of the data string that has been inserted with the redundancy symbols to M interleaves and apply error correction to each assigned string, using the redundancy symbols of that assigned string. The encoder assigns each symbol of the data string that corresponds to an insertion position of the different one of the redundancy symbols in the data string to a next position next to and skipping an in-sequence interleaving position of that symbol, and creates the redundancy symbols for each interleaved string.Type: ApplicationFiled: March 16, 2010Publication date: September 23, 2010Applicant: TOSHIBA STORAGE DEVICE CORPORATIONInventors: Kana FURUHASHI, Akihiro YAMAZAKI
-
Publication number: 20090268332Abstract: An amplifier amplifies, according to a first gain value, a first input signal acquired by reproducing first information from first areas having the first information recorded therein area by area in order. The amplifier also amplifies, according to a second gain value, a second input signal acquired by reproducing second information pursuant to reproduction of the first information, from a second area adjacent to the first area and that has the second information recorded at a recording level different from that of the first information. When the first input signal is amplified, a first gain value following a change in the first signal is calculated so that the level of the amplified signal becomes constant. When the second input signal is amplified, a second gain value following a change in the first gain value is calculated so that the level of the amplified signal becomes constant.Type: ApplicationFiled: December 29, 2008Publication date: October 29, 2009Applicant: FUJITSU LIMITEDInventor: Akihiro YAMAZAKI
-
Patent number: 7605997Abstract: A harmonic wave obtaining unit performs a fast Fourier transform (FFT) operation on repeatable run out (RRO) correction data in the time domain and transforms the RRO correction data into a higher harmonic signal data in the frequency domain. A selective-output unit outputs wavelength and amplitude of a first-order harmonic wave and of a third-order harmonic wave of the higher harmonic signal data to a hard disk controller via a formatting unit. A hard disk controller calculates a head-gap between a magnetic head and a magnetic disk in a storage device at the time of reading user data as well as servo data.Type: GrantFiled: December 4, 2007Date of Patent: October 20, 2009Assignee: Fujitsu LimitedInventor: Akihiro Yamazaki
-
Patent number: 7434136Abstract: An ECC determining unit determines whether an error detected by using an ECC has been corrected. When the detected error has not been corrected, an equalizer output sequence transfer unit transfers an equalizer output sequence yk stored in an equalizer output sequence storage unit to a transfer data storage unit in a hard disk controller, so that a high-performance decoding unit (software) performs repetitive decoding, using the transferred equalizer output sequence yk.Type: GrantFiled: January 28, 2004Date of Patent: October 7, 2008Assignee: Fujitsu LimitedInventors: Kazuhito Ichihara, Takao Sugawara, Akihiro Yamazaki
-
Publication number: 20080186619Abstract: A harmonic wave obtaining unit performs a fast Fourier transform (FFT) operation on repeatable run out (RRO) correction data in the time domain and transforms the RRO correction data into a higher harmonic signal data in the frequency domain. A selective-output unit outputs wavelength and amplitude of a first-order harmonic wave and of a third-order harmonic wave of the higher harmonic signal data to a hard disk controller via a formatting unit. A hard disk controller calculates a head-gap between a magnetic head and a magnetic disk in a storage device at the time of reading user data as well as servo data.Type: ApplicationFiled: December 4, 2007Publication date: August 7, 2008Applicant: Fujitsu LimitedInventor: Akihiro Yamazaki