Abstract: Methods, systems, and computer programs are presented for semiconductor manufacturing are provided. One wafer processing apparatus includes: a top electrode; a bottom electrode; a first radio frequency (RF) power source; a second RF power source; a third RF power source; a fourth RF power source; and a switch. The first, second, and third power sources are coupled to the bottom electrode. Further, the switch is operable to be in one of a first position or a second position, where the first position causes the top electrode to be connected to ground, and the second position causes the top electrode to be connected to the fourth RF power source.

Abstract: A bevel etcher incorporating a vacuum chuck used for cleaning the bevel edge and for reducing the bending curvature of a semiconductor substrate. The bevel etcher includes a vacuum chuck and a plasma generation unit which energizes process gas into a plasma state. The vacuum chuck includes a chuck body and a support ring. The top surface of the chuck body and inner periphery of the support ring form a vacuum region enclosed by the bottom surface of a substrate mounted on the support ring. A vacuum pump evacuates the vacuum region during operation. The vacuum chuck is operative to hold the substrate in place by the pressure difference between the top and bottom surfaces of the substrate. The pressure difference also generates a bending force to reduce the bending curvature of the substrate.

Abstract: A bevel etcher incorporating a vacuum chuck used for cleaning the bevel edge and for reducing the bending curvature of a semiconductor substrate. The bevel etcher includes a vacuum chuck and a plasma generation unit which energizes process gas into a plasma state. The vacuum chuck includes a chuck body and a support ring. The top surface of the chuck body and inner periphery of the support ring form a vacuum region enclosed by the bottom surface of a substrate mounted on the support ring. A vacuum pump evacuates the vacuum region during operation. The vacuum chuck is operative to hold the substrate in place by the pressure difference between the top and bottom surfaces of the substrate. The pressure difference also generates a bending force to reduce the bending curvature of the substrate.

Abstract: A plasma processing chamber configured for cleaning a bevel edge of a substrate is provided. The chamber includes a top edge electrode surrounding an insulating plate, and the insulator plate opposes a bottom electrode. The top edge electrode is electrically grounded and separated from the insulator plate by a top dielectric ring. The chamber also includes a bottom edge electrode that is electrically grounded and surrounds the bottom electrode and is separated from the bottom electrode by a bottom dielectric ring. The bottom edge electrode is oriented to oppose the top edge electrode, and the bottom edge electrode has an L shape that is up-facing. Bevel edge plasma processing of a substrate edge is configured to be processed in a chamber having the top and bottom edge electrodes.

Abstract: A plasma etch processing chamber configured to clean a bevel edge of a substrate is provided. The chamber includes a bottom edge electrode and a top edge electrode defined over the bottom edge electrode. The top edge electrode and the bottom edge electrode are configured to generate a cleaning plasma to clean the bevel edge of the substrate. The chamber includes a gas feed defined through a top surface of the processing chamber. The gas feed introduces a processing gas for striking the cleaning plasma at a location in the processing chamber that is between an axis of the substrate and the top edge electrode. A pump out port is defined through the top surface of the chamber and the pump out port located along a center axis of the substrate. A method for cleaning a bevel edge of a substrate is also provided.

Abstract: A process chamber includes a wafer support to mount a wafer to be processed in the process chamber, with the wafer having an annular edge exclusion area. A first electrically grounded ring extends in an annular path radially outward of the edge exclusion area and is electrically isolated from the wafer support. A second electrode is configured with a center area opposite to the wafer support. A second electrically grounded ring extends in an annular path radially outward of the second electrode and the edge exclusion area. The second electrically grounded ring is electrically isolated from the center area. An annular mount section has a DC bias ring, and the DC bias ring opposes the edge exclusion area when the wafer is present. A DC control circuit is provided for applying a DC voltage to the DC bias ring.

Abstract: An apparatus for etching features in an etch layer is provided. A plasma processing chamber is provided, comprising a chamber wall, a chuck, a pressure regulator, an electrode or coil, a gas inlet, and a gas outlet. A gas source comprises a fluorine free deposition gas source and an etch gas source. A controller comprises at least one processor and computer readable media, comprising computer readable code for providing a conditioning for a patterned pseudo-hardmask, wherein the conditioning comprises computer readable code providing a fluorine free deposition gas comprising a hydrocarbon gas, computer readable code for forming a plasma, computer readable code for providing a bias less than 500 volts, and computer readable code for forming a deposition on top of the patterned pseudo-hardmask, computer readable code for etching the etch layer, and computer readable code for cyclically repeating the conditioning and etching at least twice.

Abstract: A system and method of plasma processing includes a plasma chamber including a substrate support and an upper electrode opposite the substrate support, the upper electrode having a plurality of concentric temperature control zones and a controller coupled to the plasma chamber.

Abstract: A system and method of plasma processing includes a plasma processing system including a plasma chamber and a controller coupled to the plasma chamber. The plasma chamber including a substrate support and an upper electrode opposite the substrate support, the upper electrode having a plurality of concentric gas injection zones.

Abstract: Methods, systems, and computer programs are presented for semiconductor manufacturing are provided. One wafer processing apparatus includes: a top electrode; a bottom electrode; a first radio frequency (RF) power source; a second RF power source; a third RF power source; a fourth RF power source; and a switch. The first, second, and third power sources are coupled to the bottom electrode. Further, the switch is operable to be in one of a first position or a second position, where the first position causes the top electrode to be connected to ground, and the second position causes the top electrode to be connected to the fourth RF power source.

Abstract: A system, method and apparatus for increasing an energy level of the ions emitted from a plasma include a plasma chamber, including a top electrode and a bottom electrode, a multiple RF sources, at least one of the RF sources being coupled to the bottom electrode. A phase locking circuit is coupled to at least two of the RF sources hereafter designated the first RF source and the second RF source. A controller is coupled to the plasma chamber, each of the RF sources and the phase locking circuit. The controller including operating system software, multiple logic circuits and a process recipe.

Abstract: Chambers for processing a bevel edge of a substrate are provided. One such chamber includes a bottom electrode defined to support a substrate in the chamber. The bottom electrode has a bottom first level for supporting the substrate and a bottom second level near an outer edge of bottom electrode. The bottom second level is defined at a step below the bottom first level. Further included is a top electrode oriented above the bottom electrode. The top electrode having a top first level and a top second level, where the top first level is opposite the bottom first level and the top second level is opposite the bottom second level. The top second level is defined at a step above the top first level. A bottom ring mount oriented at the bottom second level is included. The bottom ring mount includes a first adjuster for moving a bottom permanent magnet toward and away from the top electrode. Further included is a top ring mount oriented at the top second level.

Abstract: The various embodiments described in the specification provide improved mechanisms of removal of unwanted deposits on the bevel edge to improve process yield. The embodiments provide apparatus and methods of treating the bevel edge of a copper plated substrate to convert the copper at the bevel edge to a copper compound that can be wet etched with a fluid at a high etch selectivity in comparison to copper. In one embodiment, the wet etch of the copper compound at high selectivity to copper allows the removal of the non-volatile copper at substrate bevel edge in a wet etch processing chamber. The plasma treatment at bevel edge allows the copper at bevel edge to be removed at precise spatial control to about 2 mm or below, such as about 1 mm, about 0.5 mm or about 0.25 mm, to the very edge of substrate.

Abstract: Methods for orienting an upper electrode relative to a lower electrode are provided. The lower electrode is configured to have a desired existing orientation in a process chamber to define active and inactive process zones in the process chamber for processing a wafer. The method includes configuring each electrode with a reference surface, where a lower electrode reference surface is in the desired existing orientation and an upper electrode reference surface to be oriented parallel to the lower electrode reference surface. Then, temporarily holding the upper electrode reference surface oriented parallel to the lower electrode reference surface, and securing the upper electrode to a drive to mount the upper electrode reference surface parallel to the lower electrode reference surface. Other method configurations are also disclosed and illustrated.

Abstract: Embodiments for processing a substrate in a pulsed plasma chamber are provided. A processing apparatus with two chambers, separated by a plate fluidly connecting the chambers, includes a continuous wave (CW) controller, a pulse controller, and a system controller. The CW controller sets the voltage and the frequency for a first radio frequency (RF) power source coupled to a top electrode. The pulse controller is operable to set voltage, frequency, ON-period duration, and OFF-period duration for a pulsed RF signal generated by a second RF power source coupled to the bottom electrode. The system controller is operable to set parameters to regulate the flow of species between the chambers to assist in the negative-ion etching, to neutralize excessive positive charge on the wafer surface during afterglow in the OFF period, and to assist in the re-striking of the bottom plasma during the ON period.

Abstract: Apparatus, methods, and computer programs for semiconductor processing in a capacitively-coupled plasma chamber are provided. A chamber includes a bottom radio frequency (RF) signal generator, a top RF signal generator, and an RF phase controller. The bottom RF signal generator is coupled to the bottom electrode in the chamber, and the top RF signal generator is coupled to the top electrode. Further, the bottom RF signal is set at a first phase, and the top RF signal is set at a second phase. The RF phase controller is operable to receive the bottom RF signal and operable to set the value of the second phase. Additionally, the RF phase controller is operable to track the first phase and the second phase to maintain a time difference between the maximum of the top RF signal and the minimum of the bottom RF signal at approximately a predetermined constant value, resulting in an increase of the negative ion flux to the surface of the wafer.

Abstract: Methods for bevel edge etching are provided. One example method is for etching a film on a bevel edge of a substrate in a plasma etching chamber. The method includes providing the substrate on a substrate support in the plasma etching chamber. The plasma etching chamber has a top edge electrode and a bottom edge electrode disposed to surround the substrate support. Then flowing an etching process gas through a plurality of edge gas feeds disposed along a periphery of the gas delivery plate. The periphery of the gas deliver plate is oriented above the substrate support and the bevel edge of the substrate, and the flowing is further directed to a space between the top edge electrode and bottom edge electrode. And, flowing a tuning gas through a center gas feed of the gas delivery plate.

Abstract: A method for detecting plasma unconfinement in a reaction chamber during a bevel edge cleaning operation is provided. The method initiates with selecting a wavelength associated with expected by products of a bevel edge clean process. The method includes cleaning the bevel edge area of a substrate and monitoring the intensity of the selected wavelengths during the cleaning for deviation from a threshold wavelength intensity. The cleaning is terminated if the deviation from the threshold wavelength intensity exceeds a target deviation.

Abstract: A method of cleaning a bevel edge of a substrate in an etch processing chamber is provided. The method includes placing a substrate on a substrate support in a processing chamber. The method also includes flowing a cleaning gas through a gas feed located near a center of a gas distribution plate, disposed at a distance from the substrate support. The method further includes generating a cleaning plasma near a bevel edge of the substrate to clean the bevel edge by powering a bottom edge electrode or a top edge electrode with a RF power source and grounding the edge electrode that is not powered by the RF power source, the bottom edge electrode surrounds the substrate support and the top edge electrode surrounds the gas distribution plate.

Abstract: Various embodiments describe a method of quantifying bow in a wafer. In one embodiment, the method includes measuring a first plurality of distances from a first sensor to a first surface of the wafer to calculate the bow in the wafer. The first sensor is positioned outside of a set of process modules of the plasma processing system. A determination is made whether the calculated bow of the wafer is within a pre-determined range. If the calculated bow of the wafer is within the pre-determined range, the wafer is moved into a process module of the set of process modules for processing and a recipe for processing the wafer is adjusted based on the calculated bow of the wafer. If the calculated bow of the wafer is outside the pre-determined range, the wafer is removed from the plasma processing system. Other methods are described as well.