Patents by Inventor Arne W. Ballantine

Arne W. Ballantine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6649429
    Abstract: A method is presented for measuring and monitoring the mechanical stress at the device level which occurs intrinsically during the fabrication process or which is induced via extrinsic means. The method applies the fact that the current-voltage (I-V) characteristics of a diode change as the diode is subjected to mechanical stress. The method is applicable to monitoring stress at the microscopic and device levels at various stages in the semiconductor wafer fabrication process. Apparatus for implementing the method is also presented.
    Type: Grant
    Filed: July 11, 2002
    Date of Patent: November 18, 2003
    Assignee: International Business Machines Corporation
    Inventors: Edward D. Adams, Arne W. Ballantine, Richard S. Kontra, Alain Loiseau, James A. Slinkman
  • Patent number: 6650000
    Abstract: A method and structure that provides a battery within an integrated circuit for providing voltage to low-current electronic devices that exist within the integrated circuit. The method includes Front-End-Of-Line (FEOL) processing for generating a layer of electronic devices on a semiconductor wafer, followed by Back-End-Of-Line (BEOL) integration for wires connecting the electronic devices together to form completed electrical circuits of the integrated circuit. The BEOL integration includes forming a multilayered structure of wiring levels on the layer of electronic devices. Each wiring level includes conductive metallization (e.g., metal-plated vias, conductive wiring lines, etc.) embedded in insulative material. The battery is formed during BEOL integration within one or more wiring levels, and the conductive metallization conductively couples positive and negative terminals of the battery to the electronic devices.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: November 18, 2003
    Assignee: International Business Machines Corporation
    Inventors: Arne W. Ballantine, Robert A. Groves, Jennifer L. Lund, James S. Nakos, Michael B. Rice, Anthony K. Stamper
  • Patent number: 6647614
    Abstract: A method for changing an electrical resistance of a resistor. Initially, the resistor is provided, wherein the resistor has a length L and an electrical resistance R1. A portion of the resistor is exposed to a laser radiation, wherein the portion includes a fraction F of the length L of the resistor. After the resistor has been exposed to the laser radiation, the resistor has an electrical resistance R2, wherein R2 is unequal to R1.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: November 18, 2003
    Assignee: International Business Machines Corporation
    Inventors: Arne W. Ballantine, Cyril Cabral, Jr., Daniel C. Edelstein, Anthony K. Stamper
  • Publication number: 20030201515
    Abstract: A method for forming a desired junction profile in a semiconductor device. At least one dopant is introduced into a semiconductor substrate. The at least one dopant is diffused in the semiconductor substrate through annealing the semiconductor substrate and the at least one dopant while simultaneously exposing the semiconductor substrate to an electric field.
    Type: Application
    Filed: April 15, 2003
    Publication date: October 30, 2003
    Applicant: International Business Machines Corporation
    Inventors: Arne W. Ballantine, John J. Ellis-Monaghan, Toshihura Furukawa, Jeffrey D. Gilbert, Glenn R. Miller, James A. Slinkman
  • Publication number: 20030183897
    Abstract: A method, and associated structure, for monitoring temperature and temperature distributions in a heating chamber for a temperature range of 200 to 600° C., wherein the heating chamber may be used in the fabrication of a semiconductor device. A copper layer is deposited over a surface of a semiconductor wafer. Next, the wafer is heated in an ambient oxygen atmosphere to a temperature in the range of 200-600° C. The heating of the wafer oxidizes a portion of the copper layer, which generates an oxide layer. After being heated, the wafer is removed and a sheet resistance is measured at points on the wafer surface. Since the local sheet resistance is a function of the local thickness of the oxide layer, a spatial distribution of sheet resistance over the wafer surface reflects a distribution of wafer temperature across the wafer surface during the heating of the wafer.
    Type: Application
    Filed: April 23, 2003
    Publication date: October 2, 2003
    Inventors: Arne W. Ballantine, Edward C. Cooney, Jeffrey D. Gilbert, Robert G. Miller, Amy L. Myrick, Ronald A. Warren
  • Patent number: 6580140
    Abstract: A method, and associated structure, for monitoring temperature and temperature distributions in a heating chamber for a temperature range of 200 to 600° C., wherein the heating chamber may be used in the fabrication of a semiconductor device. A copper layer is deposited over a surface of a semiconductor wafer. Next, the wafer is heated in an ambient oxygen atmosphere to a temperature in the range of 200-600° C. The heating of the wafer oxidizes a portion of the copper layer, which generates an oxide layer. After being heated, the wafer is removed and a sheet resistance is measured at points on the wafer surface. Since the local sheet resistance is a function of the local thickness of the oxide layer, a spatial distribution of sheet resistance over the wafer surface reflects a distribution of wafer temperature across the wafer surface during the heating of the wafer.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: June 17, 2003
    Assignee: International Business Machines Corporation
    Inventors: Arne W. Ballantine, Edward C. Cooney, III, Jeffrey D. Gilbert, Robert G. Miller, Amy L. Myrick, Ronald A. Warren
  • Publication number: 20030104261
    Abstract: The invention generally relates to fuel cell reactant delivery systems and methods for delivering fuel to fuel cell systems, where air or oxygen is injected into a fuel stream containing hydrogen, such that a portion of the hydrogen reacts with the oxygen to form water that humidifies a fuel cell membrane as the fuel stream is passed into the fuel cell. In a preferred embodiment, the invention relates to dead-headed, pure hydrogen PEM fuel cell systems, but the invention is also applicable to other fuel cell system configurations.
    Type: Application
    Filed: July 31, 2002
    Publication date: June 5, 2003
    Applicant: Plug Power Inc.
    Inventors: Marie A. Schnitzer, Arne W. Ballantine, Scott K. Lobdell, Sean S. Lyons
  • Patent number: 6563464
    Abstract: A semiconductor device is presented which is composed of two adjacent semiconductor chips. Each semiconductor chip has an integrated half-wave dipole antenna structure located thereon. The semiconductor chips are oriented so that the half-wave dipole antenna segments extend away from each other, allowing the segments to be effectively mated and thus form a complete full-wave dipole antenna. The two solder bumps which form the antenna are separated by a gap of approximately 200 microns. The length of each solder bump antenna is based on the wavelength and the medium of collection. Phased array antenna arrays may also be constructed from a plurality of these semiconductor chip antennae.
    Type: Grant
    Filed: March 19, 2001
    Date of Patent: May 13, 2003
    Assignee: International Business Machines Corporation
    Inventors: Arne W. Ballantine, Jennifer L. Lund, Anthony K. Stamper
  • Patent number: 6563131
    Abstract: Off-current is not compromised in a field effect transistor having a gate length less than 100 nanometers in length by maintaining the conduction channel width one-half to one-quarter of the gate length and locating the gate on at least two sides of the conduction channel and to thus create a full depletion device. Such a narrow conduction channel is achieved by forming a trough at minimum lithographic dimensions, forming sidewalls within the trough and etching the gate structure self-aligned with the sidewalls. The conduction channel is then epitaxially grown from the source structure in the trough such that the source, conduction channel and drain region are a unitary monocrystalline structure.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: May 13, 2003
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, Paul D. Agnello, Arne W. Ballantine, Christopher S. Putnam, Jed H. Rankin
  • Patent number: 6552411
    Abstract: A method for forming a desired junction profile in a semiconductor device. At least one dopant is introduced into a semiconductor substrate. The at least one dopant is diffused in the semiconductor substrate through annealing the semiconductor substrate and the at least one dopant while simultaneously exposing the semiconductor substrate to an electric field.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: April 22, 2003
    Assignee: International Business Machines Corporation
    Inventors: Arne W. Ballantine, John J. Ellis-Monaghan, Toshihura Furukawa, Jeffrey D. Gilbert, Glenn R. Miller, James A. Slinkman
  • Publication number: 20030064262
    Abstract: A cogeneration fuel cell system and associated methods of operation are provided that accommodate a demand for heat as well as a demand for electric power. The system is operated among various modes to balance heat and power demand signals. In general, a fuel cell system is coupled to a power sink and a heat sink, and a controller is adapted to respond to data signals from the power sink and the heat sink. As examples, such data signals from the heat sink may include a temperature indication or a heat demand signal (such as from a thermostat), and such data signals from the power sink may include a voltage or current measurement, an electrical power demand signal, or an electrical load.
    Type: Application
    Filed: May 30, 2002
    Publication date: April 3, 2003
    Applicant: Plug Power Inc.
    Inventors: Arne W. Ballantine, Ryan Hallum, John W. Parks, Dustan L. Skidmore
  • Publication number: 20030049503
    Abstract: The invention provides a reactant delivery system for a dead-headed PEM fuel cell system, comprising a fuel cell, a fuel supply, a purge valve, an inlet orifice, an outlet orifice, and a controller. A first fuel flow circuit is provided, wherein fuel is flowed from the fuel supply to the inlet orifice, through the fuel cell from the inlet orifice, and through the outlet orifice from the fuel cell to the purge valve. A second fuel flow circuit is also provided, wherein fuel is flowed from the fuel supply to the outlet orifice, through the fuel cell from the outlet orifice, and through the inlet orifice from the fuel cell to the purge valve. A valve means is coupled to the controller and adapted to transfer fuel flow between the first flow circuit and the second flow circuit.
    Type: Application
    Filed: August 30, 2002
    Publication date: March 13, 2003
    Applicant: Plug Power Inc.
    Inventors: Arne W. Ballantine, Scott K. Lobdell, Sean S. Lyons
  • Publication number: 20030044663
    Abstract: The invention provides a fuel cell incorporating a thermal management scheme and associated methods of operation. In one aspect, a fuel cell system includes a frame enclosing a fuel cell, a coolant flow circuit and a heat exchanger. The frame has at least one external panel mounted thereon to enclose the fuel cell, a coolant circuit and heat exchanger. The coolant flow circuit is adapted to circulate a coolant through the heat exchanger and across a surface of the fuel cell to provide heat transfer between the fuel cell and the heat exchanger. An inlet orifice and an outlet orifice are coupled to the frame and to the heat exchanger, and are adapted to provide an export flow circuit from the inlet orifice through the heat exchanger to the outlet orifice. An insulating material is fixed to a surface of the external panel.
    Type: Application
    Filed: August 30, 2002
    Publication date: March 6, 2003
    Applicant: Plug Power Inc.
    Inventors: Arne W. Ballantine, Ryan Hallum
  • Patent number: 6511873
    Abstract: Methods of forming front-end-of the line (FEOL) capacitors such as polysilicon-polysilicon capacitors and metal-insulator-silicon capacitors are provided that are capable of incorporating a high-dielectric constant (k of greater than about 8) into the capacitor structure. The inventive methods provide high capacitance/area devices with low series resistance of the top and bottom electrodes for high frequency responses. The inventive methods provide a significant reduction in chip size, especially in analog and mixed-signal applications where large areas of capacitance are used.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: January 28, 2003
    Assignee: International Business Machines Corporation
    Inventors: Arne W. Ballantine, Douglas A. Buchanan, Eduard A. Cartier, Douglas D. Coolbaugh, Evgeni P. Gousev, Harald F. Okorn-Schmidt
  • Publication number: 20030017639
    Abstract: Methods of forming front-end-of the line (FEOL) capacitors such as polysilicon-polysilicon capacitors and metal-insulator-silicon capacitors are provided that are capable of incorporating a high-dielectric constant (k of greater than about 8) into the capacitor structure. The inventive methods provide high capacitance/area devices with low series resistance of the top and bottom electrodes for high frequency Responses. The inventive methods provide a significant reduction in chip size, especially in analog and mixed-signal applications where large areas of capacitance are used.
    Type: Application
    Filed: September 18, 2002
    Publication date: January 23, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Arne W. Ballantine, Douglas A. Buchanan, Eduard A. Cartier, Douglas D. Coolbaugh, Evgeni P. Gousev, Harald F. Okorn-Schmidt
  • Publication number: 20030008184
    Abstract: A cogeneration fuel cell system and associated methods of operation are provided that accommodate a demand for heat as well as a demand for electric power. The system is operated among various modes to balance heat and power demand signals. In general, a fuel cell system is coupled to a power sink and a heat sink, and a controller is adapted to respond to data signals from the power sink and the heat sink. As examples, such data signals from the heat sink may include a temperature indication or a heat demand signal (such as from a thermostat), and such data signals from the power sink may include a voltage or current measurement, an electrical power demand signal, or an electrical load.
    Type: Application
    Filed: May 30, 2002
    Publication date: January 9, 2003
    Applicant: Plug Power Inc.
    Inventors: Arne W. Ballantine, Ryan Hallum, John W. Parks, Dustan L. Skidmore
  • Publication number: 20030003330
    Abstract: A method of operating a fuel cell system having a fuel cell stack and a plurality of fuel cells associated with the fuel cell stack. The method includes monitoring an operating parameter associated with the fuel cell stack, and adjusting a temperature of the fuel cell stack based on the operating parameter.
    Type: Application
    Filed: June 29, 2001
    Publication date: January 2, 2003
    Inventors: Arne W. Ballantine, Ron H. Farkash
  • Patent number: 6498462
    Abstract: A system includes a generator and a circuit. The generator is coupled to provide power to a power grid. The circuit is coupled to the generator and is adapted to use a scheme to detect a shut down of the power grid and prevent the generator from providing power to the power grid in response to the detection of the shut down of the power grid. The circuit is also adapted to receive an indication to modify the scheme and modify the scheme based on the indication.
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: December 24, 2002
    Assignee: Plug Power Inc.
    Inventors: Arne W. Ballantine, Mark R. Torpey
  • Publication number: 20020192881
    Abstract: Methods of forming front-end-of the line (FEOL) capacitors such as polysilicon-polysilicon capacitors and metal-insulator-silicon capacitors are provided that are capable of incorporating a high-dielectric constant (k of greater than about 8) into the capacitor structure. The inventive methods provide high capacitance/area devices with low series resistance of the top and bottom electrodes for high frequency responses. The inventive methods provide a significant reduction in chip size, especially in analog and mixed-signal applications where large areas of capacitance are used.
    Type: Application
    Filed: June 15, 2001
    Publication date: December 19, 2002
    Applicant: INTERNATIONAL BUSINESS MACHINES COPORATION
    Inventors: Arne W. Ballantine, Douglas A. Buchanan, Eduard A. Cartier, Douglas D. Coolbaugh, Evgeni P. Gousev, Harald F. Okorn-Schmidt
  • Publication number: 20020190252
    Abstract: A method is presented for measuring and monitoring the mechanical stress at the device level which occurs intrinsically during the fabrication process or which is induced via extrinsic means. The method applies the fact that the current-voltage (I-V) characteristics of a diode change as the diode is subjected to mechanical stress. The method is applicable to monitoring stress at the microscopic and device levels at various stages in the semiconductor wafer fabrication process. Apparatus for implementing the method is also presented.
    Type: Application
    Filed: July 11, 2002
    Publication date: December 19, 2002
    Inventors: Edward D. Adams, Arne W. Ballantine, Richard S. Kontra, Alain Loiseau, James A. Slinkman