Abstract: A press-fit pin for a semiconductor package includes a shaft terminating in a head. A pair of arms extends away from a center of the head. Each arm includes a curved shape and the arms together form an s-shape. A length of the s-shape is longer than the shaft diameter. An outer extremity of each arm includes a contact surface configured to electrically couple to and form a friction fit with a pin receiver. In implementations the press-fit pin has only two surfaces configured to contact an inner sidewall of the pin receiver and is configured to contact the inner sidewall at only two locations. The shaft may be a cylinder. The s-shape formed by the pair of arms is visible from a view facing a top of the press-fit pin along a direction parallel with the longest length of the shaft. Versions include a through-hole extending through the head.

Abstract: A pin for a semiconductor package includes an upper contact portion having a contact surface configured to mechanically and electrically couple with a pin receiver. A lower portion of the pin is configured to flex to allow an upper portion of the pin to move towards an upper contact surface of a horizontal base of the pin in response to a pressure applied along a direction collinear with a longest length of the pin towards the upper contact surface of the horizontal base when the pin is inserted into a pin receiver. Some implementations of pins include a vertical stop to stop movement of the pin when a surface of the vertical stop contacts the upper contact surface of the horizontal base. Varying implementations of pins include: two curved legs and one vertical stop; two partially curved legs and no vertical stop, and; a single leg bent into an N-shape.

Abstract: A press-fit pin for a semiconductor package includes a shaft terminating in a head. A pair of arms extends away from a center of the head. Each arm includes a curved shape and the arms together form an s-shape. A length of the s-shape is longer than the shaft diameter. An outer extremity of each arm includes a contact surface configured to electrically couple to and form a friction fit with a pin receiver. In implementations the press-fit pin has only two surfaces configured to contact an inner sidewall of the pin receiver and is configured to contact the inner sidewall at only two locations. The shaft may be a cylinder. The s-shape formed by the pair of arms is visible from a view facing a top of the press-fit pin along a direction parallel with the longest length of the shaft. Versions include a through-hole extending through the head.

Abstract: A press-fit pin for a semiconductor package includes a shaft terminating in a head. A pair of arms extends away from a center of the head. Each arm includes a curved shape and the arms together form an s-shape. A length of the s-shape is longer than the shaft diameter. An outer extremity of each arm includes a contact surface configured to electrically couple to and form a friction fit with a pin receiver. In implementations the press-fit pin has only two surfaces configured to contact an inner sidewall of the pin receiver and is configured to contact the inner sidewall at only two locations. The shaft may be a cylinder. The s-shape formed by the pair of arms is visible from a view facing a top of the press-fit pin along a direction parallel with the longest length of the shaft. Versions include a through-hole extending through the head.

Abstract: A semiconductor device package includes a substrate having first and second opposing surfaces. A first surface of a die couples to the second surface of the substrate, and a first surface of an electrically conductive sub-terminal electrically couples with an electrical contact of the die and physically couples to the second surface of the substrate. A mold compound encapsulates the die and a majority of the sub-terminal. In implementations a first surface of the mold compound is coupled to the second surface of the substrate and a second surface of the mold compound opposing the first surface of the mold compound is flush with a second surface of the sub-terminal opposing the first surface of the sub-terminal. In implementations the sub-terminal includes a pillar having a longest length perpendicular to a longest length of the substrate. In implementations an electrically conductive pin couples to the second surface of the sub-terminal.

Abstract: A packaged semiconductor device includes a substrate, a die, at least one electrical connector, a first mold compound formed of translucent material, and a second mold compound. A first face of the die is electrically and mechanically coupled to the substrate. The at least one electrical connector electrically couples at least one electrical contact on a second face of the die with at least one conductive path of the substrate. The first mold compound formed of a translucent material at least partially encapsulates the die and the at least one electrical connector. The second mold compound at least partially encapsulates the first mold compound and forms a window through which the first mold compound is exposed. In implementations the second mold compound is opaque and the first mold compound is transparent. In implementations the substrate includes a lead frame having a die flag and a plurality of lead frame fingers.

Abstract: A packaged semiconductor device includes a die flag and a plurality of lead frame fingers each having a proximate end spaced apart from the die flag. A first surface of a spacer mechanically and electrically couples to a first surface of the die flag, and a first surface of a die mechanically and electrically couples to a second surface of the spacer. At least one electrical connector electrically couples an electrical contact on a second surface of the die with a lead frame finger. A molding compound encapsulates the die, spacer, at least a portion of the at least one electrical connector, at least a portion of the die flag, and at least a portion of each lead frame finger. A width of the spacer along the second surface of the spacer is greater than a width of the die flag along the first surface of the die flag.

Abstract: A pin for a semiconductor package includes an upper contact portion having a contact surface configured to mechanically and electrically couple with a pin receiver. A lower portion of the pin is configured to flex to allow an upper portion of the pin to move towards an upper contact surface of a horizontal base of the pin in response to a pressure applied along a direction collinear with a longest length of the pin towards the upper contact surface of the horizontal base when the pin is inserted into a pin receiver. Some implementations of pins include a vertical stop to stop movement of the pin when a surface of the vertical stop contacts the upper contact surface of the horizontal base. Varying implementations of pins include: two curved legs and one vertical stop; two partially curved legs and no vertical stop, and; a single leg bent into an N-shape.

Abstract: In one embodiment, a semiconductor package may be formed having a first side and a second side that is substantially opposite to the first side. An embodiment may include forming an attachment clip extending substantially laterally between the first and second sides wherein the attachment clip is positioned near a distal end of the first and second sides. An embodiment may also include forming the attachment clip to have a flexible main portion that can bend away from a plane of the main portion toward a bottom side of the semiconductor package.

Abstract: In one embodiment, a chip-on-lead package structures includes an electronic chip having opposing major surfaces. One major surface of the electronic chip is attached to first and second leads. The one major surface is electrically connected to the first lead, and electrically isolated from the second lead. The other major surface where active device are formed may be electrically connected to the second lead.

Abstract: In one embodiment, a chip-on-lead package structures includes an electronic chip having opposing major surfaces. One major surface of the electronic chip is attached to first and second leads. The one major surface is electrically connected to the first lead, and electrically isolated from the second lead. The other major surface where active device are formed may be electrically connected to the second lead.

Abstract: In one embodiment, a chip-on-lead package structures includes an electronic chip having opposing major surfaces. One major surface of the electronic chip is attached to first and second leads. The one major surface is electrically connected to the first lead, and electrically isolated from the second lead. The other major surface where active device are formed may be electrically connected to the second lead.

Abstract: In one embodiment, a chip-on-lead package structures includes an electronic chip having opposing major surfaces. One major surface of the electronic chip is attached to first and second leads. The one major surface is electrically connected to the first lead, and electrically isolated from the second lead. The other major surface where active device are formed may be electrically connected to the second lead.

Abstract: An electronic device can include a packaging substrate that including an organic material and a hole extending into the packaging substrate. An electrically conductive member can include a via within the hole, and a lead lying along a major surface of the packaging substrate and electrically connected to the via. In an embodiment, the electrically conductive material can be plated, printed, or otherwise formed within and over the organic material, and a leadframe and a corresponding formation of a molding compound around the leadframe are not necessary.

Abstract: An inductor, a semiconductor component including the inductor, and a method of manufacture. A leadframe has a plurality of conductive strips and a flag. A ferrite core is mounted on a die attach material disposed on the conductive strips and a semiconductor die is mounted on a die attach material disposed on the flag. Wire bonds are formed from the conductive strips on one side of the ferrite core to corresponding conductive strips on an opposing side of the ferrite core. The wire bonds and the conductive strips cooperate to form the coil of the inductor. Wire bonds electrically couple one end of the inductor to leadframe leads adjacent the semiconductor die. Wire bonds couple bond pads on the semiconductor die to the leadframe leads coupled to the inductor. An encapsulant is formed around the inductor and the semiconductor die. Alternatively, a stand-alone inductor is manufactured.

Abstract: An inductor, a semiconductor component including the inductor, and a method of manufacture. A leadframe has a plurality of conductive strips and a flag. A ferrite core is mounted on a die attach material disposed on the conductive strips and a semiconductor die is mounted on a die attach material disposed on the flag. Wire bonds are formed from the conductive strips on one side of the ferrite core to corresponding conductive strips on an opposing side of the ferrite core. The wire bonds and the conductive strips cooperate to form the coil of the inductor. Wire bonds electrically couple one end of the inductor to leadframe leads adjacent the semiconductor die. Wire bonds couple bond pads on the semiconductor die to the leadframe leads coupled to the inductor. An encapsulant is formed around the inductor and the semiconductor die. Alternatively, a stand-alone inductor is manufactured.