Patents by Inventor Banqiu Wu

Banqiu Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9039910
    Abstract: The present invention provides methods and an apparatus for controlling and modifying line width roughness (LWR) of a photoresist layer. In one embodiment, an apparatus for controlling a line width roughness of a photoresist layer disposed on a substrate includes a chamber body having a top wall, side wall and a bottom wall defining an interior processing region, a microwave power generator coupled to the to the chamber body through a waveguild, and one or more coils or magnets disposed around an outer circumference of the chamber body adjacent to the waveguide, and a gas source coupled to the waveguide through a gas delivery passageway.
    Type: Grant
    Filed: October 19, 2011
    Date of Patent: May 26, 2015
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Banqiu Wu, Ajay Kumar
  • Publication number: 20150090401
    Abstract: An electrode having a first portion and a second portion is formed over a substrate to couple to a bias RF power. The first portion is configured to compensate for an electric field at the second portion to even out a distribution of an etching strength over a workpiece placed over the electrode.
    Type: Application
    Filed: September 30, 2013
    Publication date: April 2, 2015
    Inventors: Banqiu Wu, Saravjeet Singh, Amitabh Sabharwal, Ajay Kumar
  • Patent number: 8962224
    Abstract: Methods for providing a silicon layer on a photomask substrate surface with minimum defeats for fabricating film stack thereon for EUVL applications are provided. In one embodiment, a method for forming a silicon layer on a photomask substrate includes performing an oxidation process to form a silicon oxide layer on a surface of a first substrate wherein the first substrate comprises a crystalline silicon material, performing an ion implantation process to define a cleavage plane in the first substrate, and bonding the silicon oxide layer to a surface of a second substrate, wherein the second substrate is a quartz photomask.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: February 24, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Banqiu Wu, Ajay Kumar, Omkaram Nalamasu
  • Patent number: 8932802
    Abstract: Methods and apparatus for performing an atomic layer deposition lithography process are provided in the present disclosure. In one embodiment, a method for forming features on a material layer in a device includes pulsing a first reactant gas mixture to a surface of a substrate disposed in a processing chamber to form a first monolayer of a material layer on the substrate surface, directing an energetic radiation to treat a first region of the first monolayer, and pulsing a second reactant gas mixture to the substrate surface to selectively form a second monolayer on a second region of the first monolayer.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: January 13, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Banqiu Wu, Ajay Kumar, Omkaram Nalamasu
  • Publication number: 20140370709
    Abstract: Methods for reducing line width roughness and/or critical dimension nonuniformity in a photoresist pattern are provided herein. In some embodiments, a method of reducing line width roughness along a sidewall of a patterned photoresist layer disposed atop a substrate includes: (a) depositing a first layer atop the sidewall of the patterned photoresist layer; (b) etching the first layer and the sidewall after depositing the first layer to reduce the line width roughness of the patterned photoresist layer. In some embodiments, (a)-(b) may be repeated until the line width roughness is substantially smooth.
    Type: Application
    Filed: June 11, 2014
    Publication date: December 18, 2014
    Inventors: BANQIU WU, AJAY KUMAR, RAO YALAMANCHILI, OMKARAM NALAMASU
  • Publication number: 20140370708
    Abstract: Methods for reducing the line width roughness on a photoresist pattern are provided herein. In some embodiments, a method of processing a patterned photoresist layer disposed atop a substrate includes flowing a process gas into a processing volume of a process chamber having the substrate disposed therein; forming a plasma within the process chamber from the process gas, wherein the plasma has a ion energy of about 1 eV to about 10 eV; and etching the patterned photoresist layer with species from the plasma to at least one of smooth a line width roughness of a sidewall of the patterned photoresist layer or remove debris.
    Type: Application
    Filed: June 11, 2014
    Publication date: December 18, 2014
    Inventors: BANQIU WU, AJAY KUMAR, LEONID DORF, SHAHID RAUF, KARTIK RAMASWAMY, OMKARAM NALAMASU
  • Publication number: 20140356768
    Abstract: Embodiments of the present invention generally provide an apparatus and methods for etching photomasks using charged beam plasma. In one embodiment, an apparatus for performing a charged beam plasma process on a photomask includes a processing chamber having a chamber bottom, a chamber ceiling and chamber sidewalls defining an interior volume, a substrate support pedestal disposed in the interior volume, a charged beam generation system disposed adjacent to the chamber sidewall, and a RF bias electrode disposed in the substrate support.
    Type: Application
    Filed: May 29, 2013
    Publication date: December 4, 2014
    Inventors: Banqiu WU, Ajay KUMAR, Amitabh SABHARWAL, Leonid DORF, Ming-Feng WU, Shahid RAUF, Kartik RAMASWAMY, Kenneth S. COLLINS, Omkaram NALAMASU
  • Publication number: 20140253887
    Abstract: Embodiments of the present invention provide methods and apparatus for removing debris particles using a stream of charged species. In one embodiment, an apparatus for removing debris particles from a beam of radiation includes a mask station comprising a chamber body, a mask stage disposed in the mask station, and a conductive plate having an opening formed therein, wherein the conductive plate is disposed in a spaced apart relationship to the mask stage in the mask station, defining an interior volume between the mask stage and the conductive plate.
    Type: Application
    Filed: March 6, 2014
    Publication date: September 11, 2014
    Applicant: Applied Materials, Inc.
    Inventors: Banqiu WU, Ajay KUMAR
  • Publication number: 20140255830
    Abstract: An apparatus and methods utilized a DC or AC power to supply through a conductive substrate support pedestal to a conductive photomask substrate during a photomask substrate manufacturing process for EUV or other advanced lithography applications are provided. In one embodiment, an apparatus for processing a photomask includes a substrate support pedestal configured to receive a conductive photomask, wherein the conductive photomask is fabricated from a dielectric material substrate with a conductive coating, and at least a conductive path formed in the substrate support pedestal in contact with the photomask substrate configured to be conductive.
    Type: Application
    Filed: March 6, 2014
    Publication date: September 11, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Banqiu WU, Ajay KUMAR
  • Patent number: 8709706
    Abstract: The present invention provides methods and an apparatus controlling and minimizing process defects in a development process, and modifying line width roughness (LWR) of a photoresist layer after the development process, and maintaining good profile control during subsequent etching processes. In one embodiment, a method for forming features on a substrate includes developing and removing exposed areas in the photosensitive layer disposed on the substrate in the electron processing chamber by predominantly using electrons, removing contaminants from the substrate by predominantly using electrons, and etching the non-photosensitive polymer layer exposed by the developed photosensitive layer in the electron processing chamber by predominantly using electrons.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: April 29, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Banqiu Wu, Ajay Kumar, Kartik Ramaswamy, Omkaram Nalamasu
  • Publication number: 20140065797
    Abstract: Methods of dicing substrates by both laser scribing and plasma etching. A method includes forming an in-situ mask with a plasma etch chamber by accumulating a thickness of plasma deposited polymer to protect IC bump surfaces from a subsequent plasma etch. Second mask materials, such as a water soluble mask material may be utilized along with the plasma deposited polymer. At least some portion of the mask is patterned with a femtosecond laser scribing process to provide a patterned mask with trenches. The patterning exposing regions of the substrate between the ICs in which the substrate is plasma etched to singulate the IC and the water soluble material layer washed off.
    Type: Application
    Filed: November 5, 2013
    Publication date: March 6, 2014
    Inventors: Madhava Rao Yalamanchili, Wei-Sheng Lei, Brad Eaton, Saravjeet Singh, Ajay Kumar, Banqiu Wu
  • Publication number: 20140045103
    Abstract: Methods for providing a silicon layer on a photomask substrate surface with minimum defeats for fabricating film stack thereon for EUVL applications are provided. In one embodiment, a method for forming a silicon layer on a photomask substrate includes performing an oxidation process to form a silicon oxide layer on a surface of a first substrate wherein the first substrate comprises a crystalline silicon material, performing an ion implantation process to define a cleavage plane in the first substrate, and bonding the silicon oxide layer to a surface of a second substrate, wherein the second substrate is a quartz photomask.
    Type: Application
    Filed: February 22, 2013
    Publication date: February 13, 2014
    Inventors: Banqiu Wu, Ajay Kumar, Omkaram Nalamasu
  • Patent number: 8598016
    Abstract: Methods of dicing substrates by both laser scribing and plasma etching. A method includes forming an in-situ mask with a plasma etch chamber by accumulating a thickness of plasma deposited polymer to protect IC bump surfaces from a subsequent plasma etch. Second mask materials, such as a water soluble mask material may be utilized along with the plasma deposited polymer. At least some portion of the mask is patterned with a femtosecond laser scribing process to provide a patterned mask with trenches. The patterning exposing regions of the substrate between the ICs in which the substrate is plasma etched to singulate the IC and the water soluble material layer washed off.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: December 3, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Madhava Rao Yalamanchili, Wei-Sheng Lei, Brad Eaton, Saravjeet Singh, Ajay Kumar, Banqiu Wu
  • Publication number: 20130224665
    Abstract: Methods and apparatus for performing an atomic layer deposition lithography process are provided in the present disclosure. In one embodiment, a method for forming features on a material layer in a device includes pulsing a first reactant gas mixture to a surface of a substrate disposed in a processing chamber to form a first monolayer of a material layer on the substrate surface, directing an energetic radiation to treat a first region of the first monolayer, and pulsing a second reactant gas mixture to the substrate surface to selectively form a second monolayer on a second region of the first monolayer.
    Type: Application
    Filed: February 8, 2013
    Publication date: August 29, 2013
    Inventors: Banqiu Wu, Ajay Kumar, Omkaram Nalamasu
  • Publication number: 20130196078
    Abstract: A substrate processing system for processing multiple substrates is provided and generally includes at least one substrate processing platform and at least one substrate staging platform. The substrate processing platform includes a rotary track system capable of supporting multiple substrate support assemblies and continuously rotating the substrate support assemblies, each carrying a substrate thereon. Each substrate is positioned on a substrates support assembly disposed on the rotary track system and being processed through at least one shower head station and at least one buffer station, which are positioned atop the rotary track system of the substrate processing platform. Multiple substrates disposed on the substrate support assemblies are processed in and out the substrate processing platform. The substrate staging platform includes at least one dual-substrate processing station, each dual-substrate processing station includes two substrate support assemblies for supporting two substrates thereon.
    Type: Application
    Filed: January 30, 2013
    Publication date: August 1, 2013
    Inventors: Joseph Yudovsky, Nag B. Patibandla, Pravin K. Narwankar, Li-Qun Xia, Toshiaki Fujita, Ralf Hofmann, Jeonghoon Oh, Srinivas Satya, Banqiu Wu
  • Publication number: 20130192761
    Abstract: A substrate processing system for processing multiple substrates is provided and generally includes at least one processing platform and at least one staging platform. Each substrate is positioned on a substrate carrier disposed on a substrate support assembly. Multiple substrate carriers, each is configured to carry a substrate thereon, are positioned on the surface of the substrate support assembly. The processing platform and the staging platform, each includes a separate substrate support assembly, which can be rotated by a separate rotary track mechanism. Each rotary track mechanism is capable of supporting the substrate support assembly and continuously rotating multiple substrates carried by the substrate carriers and disposed on the substrate support assembly. Each substrate is thus processed through at least one shower head station and at least one buffer station, which are positioned at a distance above the rotary track mechanism of the processing platform.
    Type: Application
    Filed: January 30, 2013
    Publication date: August 1, 2013
    Inventors: Joseph Yudovsky, Ralf Hofmann, Jeonghoon Oh, Li-Qun Xia, Toshiaki Fujita, Pravin K. Narwankar, Nag B, Patibandla, Srinivas Satya, Banqiu Wu
  • Publication number: 20130192524
    Abstract: A processing chamber having a plurality of movable substrate carriers stacked therein for continuously processing a plurality of substrates is provided. The movable substrate carrier is capable of being transported from outside of the processing chamber, e.g., being transferred from a load luck chamber, into the processing chamber and out of the processing chamber, e.g., being transferred into another load luck chamber. Process gases delivered into the processing chamber are spatially separated into a plurality of processing slots, and/or temporally controlled. The processing chamber can be part of a multi-chamber substrate processing system.
    Type: Application
    Filed: January 31, 2013
    Publication date: August 1, 2013
    Inventors: Banqiu Wu, Nag B. Patibandla, Toshiaki Fujita, Ralf Hofmann, Pravin K. Narwankar, Jeonghoon Oh, Srinivas Satya, Li-Qun Xia
  • Publication number: 20120322234
    Abstract: Methods of dicing substrates by both laser scribing and plasma etching. A method includes forming an in-situ mask with a plasma etch chamber by accumulating a thickness of plasma deposited polymer to protect IC bump surfaces from a subsequent plasma etch. Second mask materials, such as a water soluble mask material may be utilized along with the plasma deposited polymer. At least some portion of the mask is patterned with a femtosecond laser scribing process to provide a patterned mask with trenches. The patterning exposing regions of the substrate between the ICs in which the substrate is plasma etched to singulate the IC and the water soluble material layer washed off.
    Type: Application
    Filed: June 15, 2011
    Publication date: December 20, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Madhava Rao YALAMANCHILI, Wei-Sheng LEI, Brad EATON, Saravjeet SINGH, Ajay KUMAR, Banqiu WU
  • Publication number: 20120322011
    Abstract: The present invention provides methods and an apparatus controlling and minimizing process defects in a development process, and modifying line width roughness (LWR) of a photoresist layer after the development process, and maintaining good profile control during subsequent etching processes. In one embodiment, a method for forming features on a substrate includes developing and removing exposed areas in the photosensitive layer disposed on the substrate in the electron processing chamber by predominantly using electrons, removing contaminants from the substrate by predominantly using electrons, and etching the non-photosensitive polymer layer exposed by the developed photosensitive layer in the electron processing chamber by predominantly using electrons.
    Type: Application
    Filed: April 25, 2012
    Publication date: December 20, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Banqiu Wu, Ajay Kumar, Kartik Ramaswamy, Omkaram Nalamasu
  • Publication number: 20120318773
    Abstract: The present invention provides methods and an apparatus for controlling and modifying line width roughness (LWR) of a photoresist layer with enhanced electron spinning control. In one embodiment, an apparatus for controlling a line width roughness of a photoresist layer disposed on a substrate includes a processing chamber having a chamber body having a top wall, side wall and a bottom wall defining an interior processing region, a support pedestal disposed in the interior processing region of the processing chamber, and a plasma generator source disposed in the processing chamber operable to provide predominantly an electron beam source to the interior processing region.
    Type: Application
    Filed: April 25, 2012
    Publication date: December 20, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Banqiu Wu, Ajay Kumar, Kartik Ramaswamy, Omkaram Nalamasu