Patents by Inventor Byung-Hyun Lee

Byung-Hyun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11975076
    Abstract: The present invention relates to antibody-drug conjugates (ADCs) wherein a plurality of active agents are conjugated to an antibody through at least one branched linker. The branched linker may comprise a branching unit, and two active agents are coupled to the branching unit through a secondary linker and the branching unit is coupled to the antibody by a primary linker. The active agents may be the same or different. In certain such embodiments, two or more such branched linkers are conjugated to the antibody, e.g., 2-4 branched linkers, which may each be coupled to a different C-terminal cysteine of a heavy or light chain of the antibody. The branched linker may comprise one active agent coupled to the branching unit by a first branch and a second branch that comprises a polyethylene glycol moiety coupled to the branching unit. In certain such embodiments, two or more such branched linkers are conjugated to the antibody, e.g.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: May 7, 2024
    Assignee: LegoChem Biosciences, Inc.
    Inventors: Yong Zu Kim, Yeong Soo Oh, Jeiwook Chae, Ho Young Song, Chul-Woong Chung, Yun Hee Park, Hyo Jung Choi, Kyung Eun Park, Hyoungrae Kim, Jinyeong Kim, Ji Young Min, Sung Min Kim, Byung Soo Lee, Dong Hyun Woo, Ji Eun Jung, Su In Lee
  • Publication number: 20240140815
    Abstract: The present invention relates to a method for preparing an inorganic compound using desulfurization gypsum for reducing greenhouse gas emissions, and, more specifically, to a method for preparing an inorganic compound, in which calcium sulfate and calcium carbonate, which have various uses as construction materials and the like, can be prepared using, as raw material, desulfurization gypsum which, being a recycled resource, is industrial waste, and an extraction agent, and the extraction agent can be reused after separation, and thus, compared to existing processes, greenhouse gases and manufacturing costs can be remarkably reduced.
    Type: Application
    Filed: March 4, 2022
    Publication date: May 2, 2024
    Inventors: Young Ho LEE, Yong Kwon CHUNG, Byung Kwon YUN, Dae Jin SUNG, Cheol Hyun KIM
  • Patent number: 11970090
    Abstract: A railess variable seatback type rear seat includes: a linear movement device configured to convert a rotation of a motor into a linear movement; a sliding movement device configured to convert the linear movement into a sliding movement in which a seat cushion is pushed forward or backward; and a reclining angle change device configured to convert the sliding movement into a reclining movement, and to fold a seatback, which is connected to the seat cushion, forward or to recline the seatback backward.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: April 30, 2024
    Assignees: HYUNDAI MOTOR COMPANY, Kia Corporation, Daechang Seat Co.,LTD-Dongtan, Hyundai Transys Inc.
    Inventors: Seung-Hyun Kim, Sang-Hyun Lee, Min-Ju Lee, Byung-Yong Choi, Chan-Ho Jung, Seon-Chae Na, Young-Woon Choi, Jae-Jin Lee, Dong-Hwan Kim, In-Chang Hwang
  • Patent number: 11973209
    Abstract: A positive electrode active material for a secondary battery includes a lithium composite transition metal oxide including nickel (Ni), cobalt (Co), and manganese (Mn), wherein the lithium composite transition metal oxide has a layered crystal structure of space group R3m, includes the nickel (Ni) in an amount of 60 mol % or less based on a total amount of transition metals, includes the cobalt (Co) in an amount greater than an amount of the manganese (Mn), and is composed of single particles.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: April 30, 2024
    Assignee: LG Chem, Ltd.
    Inventors: Eun Hee Lee, Seong Bae Kim, Young Su Park, Yi Rang Lim, Hong Kyu Park, Song Yi Yang, Byung Hyun Hwang, Woo Hyun Kim
  • Publication number: 20240130111
    Abstract: A semiconductor device may comprise: a plurality of lower electrodes which are on a substrate; a first electrode support which is between adjacent lower electrodes and comprises a metallic material; a dielectric layer which is on the lower electrodes and the first electrode support to extend along profiles of the first electrode support and each of the lower electrodes; and an upper electrode which is on the dielectric layer.
    Type: Application
    Filed: December 26, 2023
    Publication date: April 18, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yoon Young CHOI, Seung Jin KIM, Byung-Hyun LEE, Sang Jae PARK
  • Patent number: 11957514
    Abstract: The present disclosure relates to a method for determining a relative position between arrays of a flexible array device. The flexible array device according to an embodiment includes a plurality of arrays arranged at a predetermined interval in a deformable substrate, and the method includes measuring the first capacitance between adjacent arrays, measuring the second capacitance between the adjacent arrays after deformation of the substrate, and determining a relative position between the adjacent arrays based on the first capacitance measurement value and the second capacitance measurement value. According to an embodiment, the relative position between the arrays may be determined by measuring the capacitance between the adjacent arrays of the plurality of arrays arranged in the deformable substrate and measuring a change in capacitance caused by the deformation (contraction, relaxation, bending) of the substrate.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: April 16, 2024
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Byung Chul Lee, Dong-Hyun Kang, Shinyong Shim
  • Publication number: 20240118513
    Abstract: A lens assembly includes a first D-cut lens and a lens barrel surrounding a portion of a side surface of the first D-cut lens. The side surface of the first D-cut lens includes a linear portion, and the lens barrel is configured to expose at least a portion of the linear portion of the first D-cut lens in a direction perpendicular to an optical axis.
    Type: Application
    Filed: December 11, 2023
    Publication date: April 11, 2024
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: So Mi YANG, Jae Hyuk HUH, Byung Hyun KIM, Ji Su LEE
  • Patent number: 11944998
    Abstract: A method of fabricating a capacitive micromachined ultrasonic transducer (CMUT) according to one aspect of the present invention may include forming, on a semiconductor substrate, a first region implanted with impurity ions at a first average concentration and a second region implanted with no impurity ions or implanted with the impurity ions at a second average concentration lower than the first average concentration, forming an insulating layer by oxidizing the semiconductor substrate wherein the insulating layer includes a first oxide layer having a first thickness on at least a part of the first region and a second oxide layer having a second thickness smaller than the first thickness on at least a part of the second region, and forming a membrane layer on the insulating layer such that a gap is defined between the second oxide layer and the membrane layer.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: April 2, 2024
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Byung Chul Lee, Dong-Hyun Kang, Jin soo Park, Tae Song Kim
  • Publication number: 20240076633
    Abstract: Provided are a PCR buffer composition for increasing the activity of a DNA polymerase having increased gene mutation specificity, a PCR kit for detecting a gene mutation or SNP comprising the PCR buffer composition and/or the DNA polymerase having increased gene mutation specificity, and a method for in vitro detecting one or more gene mutations or SNPs in one or more templates by using the kit.
    Type: Application
    Filed: September 29, 2023
    Publication date: March 7, 2024
    Inventors: Byung Chul LEE, Il Hyun PARK, Huy Ho LEE
  • Publication number: 20240079642
    Abstract: The present invention relates to a method for preparing an alkali metal ion conductive chalcogenide-based solid electrolyte, a solid electrolyte prepared thereby, and an all-solid-state battery comprising the same.
    Type: Application
    Filed: January 11, 2022
    Publication date: March 7, 2024
    Applicant: KOREA ELECTROTECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yoon Cheol HA, Sang Min LEE, Byung Gon KIM, Gum Jae PARK, Jun Woo PARK, Jun Ho PARK, Ji Hyun YU, Won Jae LEE, You Jin LEE, Hae Young CHOI
  • Publication number: 20240072294
    Abstract: A cylindrical secondary battery and a manufacturing method of a secondary battery are provided. A manufacturing method of a cylindrical secondary battery includes: winding an electrode assembly to expose a first electrode uncoated portion and a second electrode uncoated portion to opposite ends in a longitudinal direction; bending at least some portions of the first electrode uncoated portion and the second electrode uncoated portion of the electrode assembly in a direction by pressing the first electrode uncoated portion and the second electrode uncoated portion; welding electrode collector plates to ends of the bent first and second electrode uncoated portions; and inserting and sealing the electrode assembly into a cylindrical case.
    Type: Application
    Filed: August 16, 2023
    Publication date: February 29, 2024
    Inventors: Jung Hyun KIM, Joung Ku KIM, Byung Kyu PARK, Jung Hyun PARK, Joo Youn SHIN, Gye Won LEE, Dong Sub LEE, Hyun Ki JUNG
  • Patent number: 11910593
    Abstract: A semiconductor device may comprise: a plurality of lower electrodes which are on a substrate; a first electrode support which is between adjacent lower electrodes and comprises a metallic material; a dielectric layer which is on the lower electrodes and the first electrode support to extend along profiles of the first electrode support and each of the lower electrodes; and an upper electrode which is on the dielectric layer.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: February 20, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon Young Choi, Seung Jin Kim, Byung-Hyun Lee, Sang Jae Park
  • Publication number: 20220223523
    Abstract: A semiconductor device, a layout design method for the semiconductor device, and a method for fabricating the semiconductor device are provided. The semiconductor device includes a standard cell region.
    Type: Application
    Filed: October 1, 2021
    Publication date: July 14, 2022
    Inventors: Byung Hyun Lee, Sung-Ok Lee, Sang Do Park
  • Patent number: 11217457
    Abstract: A method of fabricating a semiconductor device including preparing a substrate including a wafer inner region and a wafer edge region, the wafer inner region including a chip region and a scribe lane region, sequentially stacking a mold layer and a supporting layer on the substrate, forming a first mask layer on the supporting layer, the first mask layer including a first stepped region on the wafer edge region, forming a step-difference compensation pattern on the first stepped region, forming a second mask pattern including openings, on the first mask layer and the step-difference compensation pattern, and sequentially etching the first mask layer, the supporting layer, and the mold layer using the second mask pattern as an etch mask to form a plurality of holes in at least the mold layer may be provided.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: January 4, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seungjin Kim, Byung-Hyun Lee, Yoonyoung Choi, Tae-Kyu Kim, Heesook Cheon, Bo-Wo Choi, Hyun-Sil Hong
  • Patent number: 11057945
    Abstract: The present disclosure provides an apparatus and a method for random access in a wireless communication system having a base station and wireless terminals, where the wireless terminal can select a detection sub-segment from a preamble detection segment that is divided into a multiple number of detection sub-segments, transmit a random access preamble with the timing adjusted such that the random access preamble is received at the base station in the selected detection sub-segment, and when a random access response message is received from the base station, transmit a terminal identification message to the base station and receive a contention resolution message from the base station.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: July 6, 2021
    Assignee: INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Jang Won Lee, Byung Hyun Lee, Seok Jae Moon, Hyun Suk Lee
  • Patent number: 11031467
    Abstract: Disclosed is a field effect transistor based on vertically integrated gate-all-around multiple nanowire channels including forming vertically integrated multiple nanowire channels in which a plurality of nanowires is vertically integrated, forming an interlayer dielectric layer (ILD) on the vertically integrated multiple nanowire channels, forming a hole in the interlayer dielectric layer such that at least some of the vertically integrated multiple nanowire channels are exposed, and forming a gate dielectric layer on the interlayer dielectric layer to fill the hole, wherein the forming of the gate dielectric layer on the interlayer dielectric layer to fill the hole includes depositing the gate dielectric layer on the interlayer dielectric layer to surround at least some of the vertically integrated multiple nanowire channels that are exposed though the hole. Nanowires may include various shapes of current channels that have efficient structures for current path.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: June 8, 2021
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Yang-Kyu Choi, Byung-Hyun Lee, Min-Ho Kang
  • Publication number: 20210159230
    Abstract: A semiconductor device may comprise: a plurality of lower electrodes which are on a substrate; a first electrode support which is between adjacent lower electrodes and comprises a metallic material; a dielectric layer which is on the lower electrodes and the first electrode support to extend along profiles of the first electrode support and each of the lower electrodes; and an upper electrode which is on the dielectric layer.
    Type: Application
    Filed: September 25, 2020
    Publication date: May 27, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yoon Young CHOI, Seung Jin KIM, Byung-Hyun LEE, Sang Jae PARK
  • Patent number: 11015495
    Abstract: A drain plug for an oil pan coupled to a plug mounting hole formed at one side of a lower portion of the oil pan, the drain plug may include a head portion configured to be formed at one end portion of the drain plug, and a screw portion configured to extend from the head portion and be screw-coupled to the plug mounting hole of the oil pan.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: May 25, 2021
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Byung-Hyun Lee, Hyun-Jun Kim, Jung-Ho Joo
  • Publication number: 20210095613
    Abstract: A cylinder block includes an extension portion that is shaped to extend toward the cylinder liner and is formed on an end portion of the cylinder block so as to form a surface contact with a head gasket. In particular, the cylinder liner includes an end portion forming an accommodation groove portion that is shaped to correspond to the extension portion, and a part of the end portion of the cylinder liner is supported on a circumferential surface of the extension portion and is linked to the accommodation groove portion. In addition, the part of the end portion of the cylinder liner forms a surface contact with the head gasket.
    Type: Application
    Filed: January 16, 2020
    Publication date: April 1, 2021
    Applicants: HYUNDAI MOTOR COMPANY, KIA MOTORS CORPORATION
    Inventors: Young Gi KIM, Jong Beom SEO, Byung Hyun LEE, Myoung Ho LEE, Joong Hyun HWANG, Jin Woo CHO, Dae Woong LEE, Chang Min LEE
  • Publication number: 20210050221
    Abstract: A method of fabricating a semiconductor device including preparing a substrate including a wafer inner region and a wafer edge region, the wafer inner region including a chip region and a scribe lane region, sequentially stacking a mold layer and a supporting layer on the substrate, forming a first mask layer on the supporting layer, the first mask layer including a first stepped region on the wafer edge region, forming a step-difference compensation pattern on the first stepped region, forming a second mask pattern including openings, on the first mask layer and the step-difference compensation pattern, and sequentially etching the first mask layer, the supporting layer, and the mold layer using the second mask pattern as an etch mask to form a plurality of holes in at least the mold layer may be provided.
    Type: Application
    Filed: April 30, 2020
    Publication date: February 18, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seungjin KIM, Byung-Hyun LEE, Yoonyoung CHOI, Tae-Kyu KIM, Heesook CHEON, Bo-Wo CHOI, Hyun-Sil HONG