Patents by Inventor Cecil J. Davis

Cecil J. Davis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4818327
    Abstract: A processing apparatus and method for rapid thermal processing wherein the radiant heat source is dynamically reconfigurable to change the heating distribution across the radii of the wafer. Since the radiative and conductive heat flow paths from parts of the wafer near the center are different from the heat flow paths for the parts of the wafer near the edge, the loadings will change dynamically as the wafer is heated and cooled. This temperature dependence in the relative couplings across the wafer makes it very difficult to maintain a flat temperature profile during heatup and cooldown, and failure to maintain a flat temperature profile can cause wafer damage (especially wafer warpage). The present application describes a processing apparatus and method which changes the distribution dynamically, so that a higher fraction of the total power is provided to the wafer edge regions after the wafer is at high temperature.
    Type: Grant
    Filed: July 16, 1987
    Date of Patent: April 4, 1989
    Assignee: Texas Instruments Incorporated
    Inventors: Cecil J. Davis, Robert T. Matthews
  • Patent number: 4818326
    Abstract: A processing apparatus and method for providing a process module with a low pressure, low energy ion implanter and a remote microwave plasma generator and a source of thermal energy, which is adapted to receive wafers for processing in a low pressure carrier.
    Type: Grant
    Filed: April 26, 1988
    Date of Patent: April 4, 1989
    Assignee: Texas Instruments Incorporated
    Inventors: Jiann Liu, Cecil J. Davis, Lee M. Loewenstein
  • Patent number: 4816098
    Abstract: A processing apparatus and method for transferring wafers or flat workpieces between a controlled vacuum load lock and a non-vacuum transfer mechanism. The apparatus is adapted to receive the wafers in a carrier under vacuum. The load lock chamber of the apparatus is then pumped down and purged, if desired. Next the chamber is brought to ambient pressure and an opening to the chamber is created. A transfer arm within the chamber transfers the wafers from the carrier through the opening and to a platform or an non-vacuum carrier. The wafers are received by the arm outside the chamber and transferred through the opening and placed into the vacuum carrier within the chamber. The opening into the chamber is closed and a vacuum is generated. The chamber can then be purged, if desired and the vacuum carrier sealed. The carrier can now be removed from the load lock chamber.
    Type: Grant
    Filed: July 16, 1987
    Date of Patent: March 28, 1989
    Assignee: Texas Instruments Incorporated
    Inventors: Cecil J. Davis, Robert T. Matthews
  • Patent number: 4816116
    Abstract: A complete integrated circuit processing module, wherein multiple processing stations, each with its own vacuum isolation, are located inside a single module which is held at hard vacuum. A wafer transport arm mechanism permits interchange of wafers among the processing stations and a load lock. The load lock is equipped to remove and replace wafers from a vacuum-sealed wafer carrier. The wafers remain face-down and under hard vacuum during all the wafers handling steps.
    Type: Grant
    Filed: November 3, 1987
    Date of Patent: March 28, 1989
    Assignee: Texas Instruments Incorporated
    Inventors: Cecil J. Davis, Robert Matthews, Randall C. Hildenbrand
  • Patent number: 4687542
    Abstract: A system for performing one semiconductor manufacturing operation or sequence of operations with reduced particulate contamination. A vacuum-tight wafer carrier, which contains numerous wafers in vacuum in a sealed box, is placed into a platform inside a vacuum load lock. The platform contains slots and protruding fingers to provide accurate registration of the position of the wafer carrier. After the load lock is pumped down, the door of the wafer carrier is opened, and a transfer arm removes wafers from the wafer carrier, in any desired order, and transfers them one by one through a port into a processing chamber.
    Type: Grant
    Filed: October 24, 1985
    Date of Patent: August 18, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Cecil J. Davis, Robert Matthews, Randall C. Hildenbrand
  • Patent number: 4685999
    Abstract: An apparatus for reactive ion etching or plasma etching wherein the wafer faces downward. The process gas is supplied through a distributor which is below the wafer and has orifices pointing away from the wafer. The vacuum (exhaust) port is below the distributor, so that there is no bulk gas flow near the face of the wafer. Preferably transport of the process gasses and their products to the face of the wafer is dominated by diffusion.
    Type: Grant
    Filed: October 24, 1985
    Date of Patent: August 11, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Cecil J. Davis, Duane E. Carter, Rhett B. Jucha
  • Patent number: 4659413
    Abstract: A plasma etch system that processes one slice at a time is disclosed. The system is comprised of an entry loadlock, an exit loadlock, a main chamber, vacuum pumps, RF power supply, RF matching network, a heat exchanger, throttle valve and pressure control gas flow distribution and a microprocessor controller. A multiple slice cassette full of slices is housed in the entry load lock and after pumping to process pressure, a single slice at a time is moved by an articulated arm from the cassette through an isolation gate to the main process chamber. The slice is etched and removed from the main process chamber through a second isolation gate by a second articulated arm to a cassette in the exit loadlock. The process is repeated until all semiconductor wafers have been etched.
    Type: Grant
    Filed: October 24, 1984
    Date of Patent: April 21, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Cecil J. Davis, John E. Spencer, Randall E. Johnson, Rhett B. Jucha, Frederick W. Brown, Stanford P. Kohan
  • Patent number: 4657620
    Abstract: A plasma reactor for the manufacturing of semiconductor devices has powered loadlocks and a main process chamber where slices can be processed one slice at a time with pre-etch plasma treatments before the main etching processing and afterwards receive a post etch treatment. The system comprises powered loadlocks, a main chamber, vacuum pumps radio frequency power supplier, radio frequency matching networks, heat exchangers and throttle valve and pressure controllers, gas flow distribution and microprocessor controllers. The semiconductor wafers are automatically fed one at a time from storage cassettes through isolation gates with articulated mechanical arms to a powered entry loadlock for pre-etching processes. At the completion of the pre-etching processing, the semiconductor wafer is transferred to the main chamber automatically for the main etch process and then to the powered exit loadlock for post etch treatment and finally to an output cassette.
    Type: Grant
    Filed: October 22, 1984
    Date of Patent: April 14, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Cecil J. Davis, John E. Spencer, Dan T. Hockersmith, Randall C. Hildenbrand, Frederick W. Brown, Stanford P. Kohan
  • Patent number: 4654106
    Abstract: A plasma etch system that processes one slice at a time is disclosed. The system is comprised of an entry loadlock, an exit loadlock, a main chamber, vacuum pumps, RF power supply, RF matching network, a heat exchanger, throttle valve and pressure control gas flow distribution and a microprocessor controller. A multiple slice cassette full of slices is housed in the entry load lock and after pumping to process pressure, a single slice at a time is moved by an articulated arm from the cassette through an isolation gate to the main process chamber. The slice is etched and removed from the main process chamber through a second isolation gate by a second articulated arm to a cassette in the exit loadlock. The process is repeated until all semiconductor wafers have been etched.
    Type: Grant
    Filed: October 22, 1984
    Date of Patent: March 31, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Cecil J. Davis, Randall E. Johnson, John E. Spencer