Patents by Inventor Chi-Hao Chang

Chi-Hao Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240010797
    Abstract: A composition contains filler particles dispersed in a matrix material, wherein the matrix material includes: (a) a first polyorganosiloxane that comprises an average of 2 or more succinic anhydride groups per molecule; and (b) a second polyorganosiloxane other than the first polyorganosiloxane; wherein the filler particles are present at a concentration in a range of 15 to 80 volume-percent based on composition volume and wherein the first polyorganosiloxane is present at a concentration sufficient to provide succinic anhydride groups at a concentration of 0.30 to 200 micromoles per gram of matrix material.
    Type: Application
    Filed: January 13, 2022
    Publication date: January 11, 2024
    Inventors: Zhanjie Li, Kyle McDonald, Andrés E. Becerra, Joseph Sootsman, Chi-Hao Chang, Darren Hansen, Dongchan Ahn, Richard Cooper
  • Patent number: 11808316
    Abstract: An electronic device can include a first electronic component, a second electronic component, and an energy dampener positioned between and in contact with the first electronic component and the second electronic component. The energy dampener in this example includes a carbon nanotube-aerogel matrix including carbon nanotubes embedded in an aerogel with a rubber composited therewith.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: November 7, 2023
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kuan-Ting Wu, Chung-Hua Ku, Chi Hao Chang
  • Publication number: 20230282750
    Abstract: Methods of forming improved dielectric layers and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a transistor structure on a semiconductor substrate; a first dielectric layer on the transistor structure; a second dielectric layer on the first dielectric layer, the second dielectric layer having a nitrogen concentration greater than a nitrogen concentration of the first dielectric layer; a first conductive structure extending through the second dielectric layer and the first dielectric layer, the first conductive structure being electrically coupled to a first source/drain region of the transistor structure, a top surface of the first conductive structure being level with a top surface of the second dielectric layer; and a second conductive structure physically and electrically coupled to the first conductive structure, a bottom surface of the second conductive structure being a first distance below the top surface of the second dielectric layer.
    Type: Application
    Filed: June 15, 2022
    Publication date: September 7, 2023
    Inventors: Yu-Lien Huang, Tze-Liang Lee, Jr-Hung Li, Chi-Hao Chang, Hao-Yu Chang, Pei-Yu Chou
  • Publication number: 20230262933
    Abstract: The present disclosure describes thermal management devices. In one example, a thermal management device can include a processing unit, a thermal grease layer directly contacting the processing unit, and a heat pipe. The heat pipe can include a heat pipe interior volume having a working fluid disposed therein, a first exterior surface directly contacting the thermal grease layer, a second exterior surface opposite from the first exterior surface, and side exterior surfaces connecting the first exterior surface and the second exterior surface. The thermal management device can also include a device cover spaced from the second exterior surface of the heat pipe by a distance from greater than 1 mm to about 5 mm, and a bracket having a clamping portion that holds the heat pipe by the side exterior surfaces of the heat pipe. The clamping portion does not extend past the first exterior surface of the heat pipe.
    Type: Application
    Filed: July 23, 2020
    Publication date: August 17, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: HENDRY HUANG, KUAN-TING WU, CHI HAO CHANG
  • Publication number: 20230259179
    Abstract: The present disclosure is drawn to housings for electronic devices. In one example, a housing for an electronic device can include a rigid substrate having an exterior surface including a recessed region positioned at an opening extending through the rigid substrate connecting the recessed region to an interior surface of the rigid substrate. A conductive metal antenna is conformally carried by the recessed region and positioned at the opening.
    Type: Application
    Filed: July 27, 2020
    Publication date: August 17, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: CHI HAO CHANG, HENDRY HUANG, KUAN-TING WU
  • Publication number: 20230211375
    Abstract: A coated substrate for an electronic device can include a substrate, a physical vapor deposition layer over the substrate, and an anti-fingerprint layer over the physical vapor deposition layer. The physical vapor deposition layer can include an alloy of gold and platinum. The anti-fingerprint layer can include an ultraviolet radiation-cured polymer mixed with an anti-fingerprint material. The anti-fingerprint material can include a silane, a fluorinated polymer, a hydrophobic polymer, or a combination thereof.
    Type: Application
    Filed: April 15, 2020
    Publication date: July 6, 2023
    Inventors: CHI HAO CHANG, CHIEN-TING LIN, KUAN-TING WU
  • Publication number: 20230189465
    Abstract: The present disclosure is drawn to covers for electronic, devices, methods of making the covers, and electronic devices, in one example, described herein Is a cover for an electronic device comprising: a substrate; a micro-arc oxidation layer applied on at least one surface of the substrate; and a dyeing layer on the micro-arc oxidation layer, wherein the dyeing layer comprises: from about 3 to about 10 wt% wafer based dyes based on the total weight of the dyeing layer; and from about 0.3 wt % to about 2 wt% surfactant based on the total weight of the dyeing layer.
    Type: Application
    Filed: May 13, 2020
    Publication date: June 15, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Kuan-Ting Wu, Ya-Ting Yeh, Chi Hao Chang
  • Publication number: 20230187530
    Abstract: A method of forming a semiconductor device includes forming a dummy gate structure across a fin protruding from a substrate, forming gate spacers on opposite sidewalls of the dummy gate structure, forming source/drain epitaxial structures on opposite sides of the dummy gate structure, forming a first interlayer dielectric (ILD) layer on the source/drain epitaxial structures and outer sidewalls of the gate spacers, replacing the dummy gate structure with a replacement gate structure, etching back the replacement gate structure to form a recess between the gate spacers, performing a first non-conformal deposition process to fill the recess with a first gate cap material, and planarizing the first gate cap material to remove a portion of the first gate cap material outside the recess.
    Type: Application
    Filed: December 9, 2021
    Publication date: June 15, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Lien HUANG, Tze-Liang LEE, Jr-Hung LI, Chi-Hao CHANG, Bor Chiuan HSIEH
  • Publication number: 20230171928
    Abstract: The present disclosure describes thermal modules having solder-free thermal bonds, methods of forming the thermal modules, and electronic devices that include the thermal modules. In one example, a thermal module having a solder-free thermal bond can include an assembly of a heat pipe and a heat sink mechanically connected to the heat pipe at a bonding junction area. The bonding junction area can include a gap between the heat pipe and the heat sink at a portion of the bonding junction area. A ther-mal coating composition can coat the assembly and fill the gap. The thermal coating composition can include a cured resin and thermally conductive particles.
    Type: Application
    Filed: April 10, 2020
    Publication date: June 1, 2023
    Inventors: CHI HAO CHANG, HENDRY HUANG, KUAN-TING WU
  • Publication number: 20230112533
    Abstract: The present disclosure is drawn to displays for electronic devices. In one example, the display includes a light emitting layer with an organic light emitting element. A porous substrate can be attached to the light emitting layer, wherein the porous substrate is flexible and spreads heat generated by the light emitting layer. A cover layer can be attached to a surface of the porous substrate opposite the light emitting layer.
    Type: Application
    Filed: April 3, 2020
    Publication date: April 13, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Kuan-Ting Wu, Hsing-Hung Hsieh, Chi Hao Chang
  • Publication number: 20230055348
    Abstract: An example dual plate Organic Light-Emitting Field-Effect Transistor (OLET) display device includes a first plate device having a first substrate; a gate layer adjacent to the first substrate; and a dielectric layer adjacent to the gate layer. A second plate device is connected to the first plate device. The second plate device includes a second substrate; a source/drain layer adjacent to the second substrate; and a stacked active organic layer adjacent to the source/drain layer. The first plate device and the second plate device are to be independently fabricated and joined together to position the stacked active organic layer adjacent to the dielectric layer.
    Type: Application
    Filed: February 11, 2020
    Publication date: February 23, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Hsing-Hung Hsieh, Kuan-Ting Wu, Chi Hao Chang
  • Publication number: 20230034431
    Abstract: This application describes covers for electronic devices, electronic devices, and methods for making the covers. In one example, a cover comprises a substrate comprising a first metal; a second metal injection molded 10 on the surface of the substrate; a paint layer or an electrophoretic deposition layer on the second metal surface; a chamfered edge on the substrate, wherein the chamfered edge cuts through the paint layer or the electrophoretic deposition layer, the second metal, and partially through the first metal; and a hydrophobic coating.
    Type: Application
    Filed: January 8, 2020
    Publication date: February 2, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Kuan-Ting Wu, Ya-Ting Yeh, Chi Hao Chang
  • Publication number: 20230033289
    Abstract: A method includes forming a first source/drain region and a second source/drain region in a semiconductor fin; depositing a first dielectric layer over the first source/drain region and the second source/drain region; etching an opening through the first dielectric layer, wherein etching the opening comprises etching the first dielectric layer; forming first sidewall spacers on sidewalls of the opening; and forming a gate stack in the opening, wherein the gate stack is disposed between the first sidewall spacers.
    Type: Application
    Filed: February 9, 2022
    Publication date: February 2, 2023
    Inventors: Yu-Lien Huang, Tze-Liang Lee, Jr-Hung Li, Chi-Hao Chang
  • Publication number: 20230031605
    Abstract: This application describes covers for electronic devices, electronic devices, and methods for making the covers. In one example, described herein is a cover for an electronic device comprising: a substrate comprising a metal; a passivation layer or a micro-arc oxidation layer deposited on at least one surface of the substrate; a primer coating layer on the passivation layer or the micro-arc oxidation layer; an optional base coating layer on the primer coating layer; a top coating layer on the optional base coating layer or on the primer coating layer; and a hydrophobic coating layer.
    Type: Application
    Filed: January 8, 2020
    Publication date: February 2, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Kuan-Ting Wu, Chi Hao Chang, Chien-Ting Lin
  • Publication number: 20230015912
    Abstract: The present disclosure is drawn to covers for electronic devices, methods of making the covers, and electronic devices. In one example, described herein is a cover for an electronic device comprising: a substrate comprising a metal; insert molded plastic on at least one surface of the substrate; a passivation layer or a micro-arc oxidation layer applied on at least one surface of the substrate; a coating composition on the passivation layer or the micro-arc oxidation layer; an outmoid decoration layer on the mating composition; a chamfered edge on the substrate, wherein the chamfered edge cuts through the outmoid decoration layer, the coating composition, the passivation layer or the micro-arc oxidation layer, and partially through the substrate; and wherein the chamfered edge comprises; a transparent passivation layer, then an optional sealing layer, and then a transparent or color electrophoretic deposition coating layer.
    Type: Application
    Filed: January 7, 2020
    Publication date: January 19, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Kuan-Ting Wu, Chi Hao Chang, Yung Yun Chen
  • Patent number: 11553612
    Abstract: A foldable hinge is described herein that includes a plurality of interconnected sliding links, wherein each of the interconnected sliding links comprise at least one curved extruding prong and at least one curved rail. The at least one curved rail of a first interconnected sliding link can be coupled to the at least one curved extruding prong of a second interconnected sliding link to form a torque engine. Additionally, the interconnected sliding links can be rotatable based on a pressure applied to the interconnected sliding links. The foldable hinge can also include a plurality of shafts coupled to the plurality of interconnected sliding links, wherein each shaft is coupled to a separate interconnected sliding link.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: January 10, 2023
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Wei-Chung Chen, Kuan-Ting Wu, Chi-Hao Chang
  • Publication number: 20220403528
    Abstract: A coated metal alloy substrate for an electronic device, a process for producing a coated metal alloy substrate for an electronic device and a housing for an electronic device, comprising a coated metal alloy substrate wherein the coated metal alloy CA substrate comprises at least one chamfered edge (1) and comprises: a passivation layer (2) deposited on the at least one chamfered edge (1); an electrophoretic deposition layer (3) deposited on the passivation layer (2); and a hydrophobic layer (4) deposited on the electrophoretic deposition layer (3).
    Type: Application
    Filed: December 9, 2019
    Publication date: December 22, 2022
    Inventors: KUAN-TING WU, CHI HAO CHANG, QINGYONG GUO
  • Patent number: 11502389
    Abstract: In example implementations, an enclosure is provided. The enclosure includes a first layer of carbon fiber and a second layer of a carbon fiber pattern fabricated from a plastic. The first layer of carbon fiber is formed in a shape of a portable electronic device. An antenna window is formed in the first layer of the carbon fiber. The second layer of the carbon fiber pattern has a same shape and a same size as the first layer of carbon fiber.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: November 15, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Chien-Ting Lin, Chi Hao Chang, Kuan-Ting Wu
  • Publication number: 20220349452
    Abstract: An electronic device can include a first electronic component, a second electronic component, and an energy dampener positioned between and in contact with the first electronic component and the second electronic component. The energy dampener in this example includes a carbon nanotube-aerogel matrix including carbon nanotubes embedded in an aerogel with a rubber composited therewith.
    Type: Application
    Filed: June 29, 2022
    Publication date: November 3, 2022
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Kuan-Ting WU, Chung-Hua KU, Chi Hao CHANG
  • Patent number: 11490532
    Abstract: Examples of hinge assemblies are described. In an example implementation, a hinge assembly includes hinge elements which are interconnected to move the hinge assembly between a folded position and an unfolded position. The hinge assembly further includes elastic members disposed between the hinge elements at a first side and a second side thereof. When the hinge assembly is moved from the unfolded position towards the folded position, elastic members at the first side are decompressed and elastic members at the second side are stretched. When the hinge assembly is moved from the folded position towards the unfolded position, elastic members at the first side are compressed and the elastic members at the second side are destretched.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: November 1, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Wei-Chung Chen, Kuan-Ting Wu, Chi-Hao Chang