Abstract: The present disclosure is drawn to covers for electronic devices. In one example, a substrate can include a metal alloy. An acid anodizing layer can be formed on the substrate. A dye application can be applied on the acid anodizing layer. A first nickel-free sealing layer can be formed on the dye application. An alkaline anodizing layer can be formed on the first sealing layer. A second nickel-free sealing layer can be formed on the alkaline anodizing layer.

Abstract: Semiconductor devices and methods of manufacturing are presented in which inner spacers for nanostructures are manufactured. In embodiments a dielectric material is deposited for the inner spacer and then treated. The treatment may add material and cause an expansion in volume in order to close any seams that can interfere with subsequent processes.

Abstract: A coated substrate for an electronic device can include a substrate, a basecoat layer on the substrate, and an anti-fingerprint topcoat layer on the basecoat layer. The substrate can include a metal or metal alloy. The basecoat layer can include pigment particles and a first one-part thermally cured polymeric resin. The anti-fingerprint topcoat layer can include a second one-part thermally cured polymeric resin and an anti-fingerprint material. The anti-fingerprint material can include a fluoropolymer, a silane, or a combination thereof. The basecoat layer can be cured before applying the anti-fingerprint topcoat layer on the basecoat layer.

Abstract: An implantable micro-biosensor a substrate, a first electrode, a second electrode, a third electrode, and a chemical reagent layer. The first electrode is disposed on the substrate and used as a counter electrode. The second electrode is disposed on the substrate and spaced apart from the first electrode. The third electrode is disposed on the substrate and used as a working electrode. The chemical reagent layer at least covers a sensing section of the third electrode so as to permit the third electrode to selectively cooperate with the first electrode or the first and second electrodes to measure a physiological signal in response to the physiological parameter of the analyte.

Abstract: An implantable micro-biosensor a substrate, a first electrode, a second electrode, a third electrode, and a chemical reagent layer. The first electrode is disposed on the substrate and used as a counter electrode. The second electrode is disposed on the substrate and spaced apart from the first electrode. The third electrode is disposed on the substrate and used as a working electrode. The chemical reagent layer at least covers a sensing section of the third electrode so as to permit the third electrode to selectively cooperate with the first electrode or the first and second electrodes to measure a physiological signal in response to the physiological parameter of the analyte.

Abstract: Semiconductor devices and methods of forming the same are provided. In some embodiments, a method includes receiving a workpiece having a redistribution layer disposed over and electrically coupled to an interconnect structure. In some embodiments, the method further includes patterning the redistribution layer to form a recess between and separating a first conductive feature and a second conductive feature of the redistribution layer, where corners of the first conductive feature and the second conductive feature are defined adjacent to and on either side of the recess. The method further includes depositing a first dielectric layer over the first conductive feature, the second conductive feature, and within the recess. The method further includes depositing a nitride layer over the first dielectric layer. In some examples, the method further includes removing portions of the nitride layer disposed over the corners of the first conductive feature and the second conductive feature.

Abstract: Improved inner spacers for semiconductor devices and methods of forming the same are disclosed.

Abstract: The present invention provides a micro biosensor for reducing a measurement interference when measuring a target analyte in the biofluid, including: a substrate; a first working electrode configured on the surface, and including a first sensing section; a second working electrode configured on the surface, and including a second sensing section which is configured adjacent to at least one side of the first sensing section; and a chemical reagent covered on at least a portion of the first sensing section for reacting with the target analyte to produce a resultant. When the first working electrode is driven by a first working voltage, the first sensing section measures a physiological signal with respect to the target analyte. When the second working electrode is driven by a second working voltage, the second conductive material can directly consume the interferant so as to continuously reduce the measurement inference of the physiological signal.

Abstract: A coated metal alloy substrate with at least one chamfered edge, a process for producing a coating a metal alloy substrate, and an electronic device having a housing comprising a coated metal alloy substrate are described. The coated metal alloy substrate with at least one chamfered edge comprises a hydrophobic anti-fingerprint layer deposited on the metal alloy substrate, a passivation layer deposited on the at least one chamfered edge, and a water based paint layer deposited on the passivation layer.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a semiconductor protruding structure over a substrate and surrounding the semiconductor protruding structure with an insulating layer. The method also includes forming a dielectric layer over the insulating layer. The method further includes partially removing the dielectric layer and insulating layer using a planarization process. As a result, topmost surfaces of the semiconductor protruding structure, the insulating layer, and the dielectric layer are substantially level with each other. In addition, the method includes forming a protective layer to cover the topmost surfaces of the dielectric layer. The method includes recessing the insulating layer after the protective layer is formed such that the semiconductor protruding structure and a portion of the dielectric layer protrude from a top surface of a remaining portion of the insulating layer.

Abstract: A method of manufacturing a carrying substrate is provided. At least one circuit component is disposed on a first circuit structure. An encapsulation layer is formed on the first circuit structure and encapsulates the circuit component. A second circuit structure is formed on the encapsulation layer and electrically connected to the circuit component. The circuit component is embedded in the encapsulation layer via an existing packaging process. Therefore, the routing area is increased, and a package substrate requiring a large size has a high yield and low manufacturing cost.

Abstract: A method of manufacturing a semiconductor device includes forming a multi-layer stack of alternating first layers of a first semiconductor material and second layers of a second semiconductor material on a semiconductor substrate, forming a first recess through the multi-layer stack, and laterally recessing sidewalls of the second layers of the multi-layer stack. The sidewalls are adjacent to the first recess. The method further includes forming inner spacers with respective seams adjacent to the recessed second layers of the multi-layer stack and performing an anneal treatment on the inner spacers to close the respective seams.

Abstract: The application discloses examples of a device housing of an electronic device including a magnesium-alloy substrate. The device housing further including a treatment layer applied over the magnesium-alloy substrate and a metallic coating layer applied over the treatment layer to provide a metallic luster. Further, a paint coating layer is disposed over a first portion of the metallic coating layer. Further, a top coating layer is applied over the paint coating layer and a visible second portion of the metallic coating layer.

Abstract: An article includes a laminate material with an aerogel layer and a polysiloxane layer distinct from the aerogel layer and in contact with the aerogel layer either directly or through an adhesive that is in direct contact with both the aerogel layer and the polysiloxane layer; where the polysiloxane layer comprises a polysiloxane and greater than 5 weight-percent and 95 weight-percent or less based on polysiloxane layer weight of fire retarding additives selected from a group consisting of metal hydroxides, mixed metal hydroxides, hydrated metal salts, and any combinations thereof dispersed throughout the polysiloxane layer.

Abstract: Semiconductor devices and methods of manufacturing are presented in which inner spacers for nanostructures are manufactured. In embodiments a dielectric material is deposited for the inner spacer and then treated. The treatment may add material and cause an expansion in volume in order to close any seams that can interfere with subsequent processes.

Abstract: A method of forming a semiconductor device includes forming a dummy gate structure across a fin protruding from a substrate, forming gate spacers on opposite sidewalls of the dummy gate structure, forming source/drain epitaxial structures on opposite sides of the dummy gate structure, forming a first interlayer dielectric (ILD) layer on the source/drain epitaxial structures and outer sidewalls of the gate spacers, replacing the dummy gate structure with a replacement gate structure, etching back the replacement gate structure to form a first recess between the gate spacers, forming a source/drain contact in the first ILD layer, and forming a second interlayer dielectric (ILD) layer to fill in the first recess between the gate spacers and over the source/drain contact.

Abstract: A device comprises a display that includes an aperture layer, a plurality of light sources, and a piezo material. The aperture layer includes a plurality of apertures. The plurality of light sources is arranged to correspond to the plurality of the aperture. The piezo material is coupled to the light sources and is configured to alter a distance between the light sources and the corresponding apertures.

Abstract: A composition contains filler particles dispersed in a matrix material, wherein the matrix material includes: (a) a first polyorganosiloxane that comprises an average of 2 or more succinic anhydride groups per molecule; and (b) a second polyorganosiloxane other than the first polyorganosiloxane; wherein the filler particles are present at a concentration in a range of 15 to 80 volume-percent based on composition volume and wherein the first polyorganosiloxane is present at a concentration sufficient to provide succinic anhydride groups at a concentration of 0.30 to 200 micromoles per gram of matrix material.

Abstract: An electronic device can include a first electronic component, a second electronic component, and an energy dampener positioned between and in contact with the first electronic component and the second electronic component. The energy dampener in this example includes a carbon nanotube-aerogel matrix including carbon nanotubes embedded in an aerogel with a rubber composited therewith.

Abstract: Methods of forming improved dielectric layers and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a transistor structure on a semiconductor substrate; a first dielectric layer on the transistor structure; a second dielectric layer on the first dielectric layer, the second dielectric layer having a nitrogen concentration greater than a nitrogen concentration of the first dielectric layer; a first conductive structure extending through the second dielectric layer and the first dielectric layer, the first conductive structure being electrically coupled to a first source/drain region of the transistor structure, a top surface of the first conductive structure being level with a top surface of the second dielectric layer; and a second conductive structure physically and electrically coupled to the first conductive structure, a bottom surface of the second conductive structure being a first distance below the top surface of the second dielectric layer.