Patents by Inventor Chi-Hung Liao

Chi-Hung Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11980920
    Abstract: Embodiments of the present disclosure relate to apparatus and methods for cleaning an exhaust path of a semiconductor process tool. One embodiment provides an exhaust pipe section and a pipe cleaning assembly connected between a semiconductor process tool and a factory exhaust. The pipe cleaning assembly includes a residue remover disposed in the exhaust pipe section. The residue remover is operable to move in the exhaust pipe section to dislodge accumulated materials from an inner surface of the exhaust pipe section.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: May 14, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei Chang Cheng, Cheng-Kuang Chen, Chi-Hung Liao
  • Patent number: 11973164
    Abstract: A light-emitting device includes a substrate including a top surface; a semiconductor stack including a first semiconductor layer, an active layer and a second semiconductor layer formed on the substrate, wherein a portion of the top surface is exposed; a distributed Bragg reflector (DBR) formed on the semiconductor stack and contacting the portion of the top surface of the substrate; a metal layer formed on the distributed Bragg reflector (DBR), contacting the portion of the top surface of the substrate and being insulated with the semiconductor stack; and an insulation layer formed on the metal layer and contacting the portion of the top surface of the substrate.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: April 30, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Che-Hung Lin, Chien-Chih Liao, Chi-Shiang Hsu, De-Shan Kuo, Chao-Hsing Chen
  • Publication number: 20240134293
    Abstract: A semiconductor processing method includes: selecting a target state of a reticle based on a given data set, wherein the given data set comprises temperature profiles of the reticle correlated to a target overlay performance, and the target state is a state in which a deformation of the reticle is substantially unchanged; regulating the reticle to reach the target state; and performing an exposure process on a target workpiece by using the reticle.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yueh-Lin Yang, Chi-Hung Liao
  • Patent number: 11959864
    Abstract: A photolithography method includes dispensing a first liquid toward a target layer through a nozzle at a first distance from the target layer; moving the nozzle such that the nozzle is at a second distance from the target layer, wherein the second distance is different from the first distance; dispensing a second liquid toward the target layer through the nozzle at the second distance from the target layer; and patterning the target layer after dispensing the first liquid and the second liquid.
    Type: Grant
    Filed: November 22, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hung Liao, Wei Chang Cheng
  • Patent number: 11961485
    Abstract: The present invention relates to a cholesteric liquid crystal display, a liquid crystal driving unit, and a driving method for reducing the maximum driving voltage. The cholesteric liquid crystal display comprises a cholesteric liquid crystal display panel, a temperature detecting device, and a liquid crystal driving unit. If the temperature detecting device detects a temperature below the optimal range for the cholesteric liquid crystal display panel, the liquid crystal driving unit will operate the cholesteric liquid crystal display panel in DDS timing mode. When the temperature detecting device detects that the temperature of the display panel exceeds the optimal temperature range, the liquid crystal driving unit will operate the display panel in PWM timing mode, which can solve the problem of increased power consumption caused by changes in ambient temperature, and can greatly improve the better color level.
    Type: Grant
    Filed: April 11, 2023
    Date of Patent: April 16, 2024
    Assignee: IRIS OPTRONICS CO., LTD.
    Inventors: Cheng-Hung Yao, Chi-Chang Liao
  • Patent number: 11940738
    Abstract: A photolithography system utilizes tin droplets to generate extreme ultraviolet radiation for photolithography. The photolithography system irradiates the droplets with a laser. The droplets become energized and emit extreme ultraviolet radiation. A collector reflects the extreme ultraviolet radiation toward a photolithography target. The photolithography system reduces splashback of the tin droplets onto the receiver by generating a net electric charge within the droplets using a charge electrode and decelerating the droplets by applying an electric field with a counter electrode.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Ming Shih, Chi-Hung Liao
  • Patent number: 11940737
    Abstract: A method includes receiving a device design layout and a scribe line design layout surrounding the device design layout. The device design layout and the scribe line design layout are rotated in different directions. An optical proximity correction (OPC) process is performed on the rotated device design layout and the rotated scribe line design layout. A reticle includes the device design layout and the scribe line design layout is formed after performing the OPC process.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsueh-Yi Chung, Yung-Cheng Chen, Fei-Gwo Tsai, Chi-Hung Liao, Shih-Chi Fu, Wei-Ti Hsu, Jui-Ping Chuang, Tzong-Sheng Chang, Kuei-Shun Chen, Meng-Wei Chen
  • Patent number: 11923187
    Abstract: A method includes transferring a wafer to a position over a wafer chuck; lifting a lifting pin through the wafer chuck to a first position to support the wafer; holding the wafer on the lifting pin using a negative pressure source in gaseous communication with an inner gas passage of the lifting pin; introducing a gas to a region between the wafer and the wafer chuck through an outer gas passage of the lifting pin, wherein in a top view of the lifting pin, the inner gas passage has a circular profile, while the outer gas passage has a ring-shape profile; and lowering the lifting to dispose the wafer over the wafer chuck.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Min-Cheng Wu, Chi-Hung Liao
  • Patent number: 11923231
    Abstract: A substrate table is provided. The substrate table includes a main body having a surface and a plurality of burls extending from the surface. The burls are configured to support a substrate on the main body. The substrate table further includes a number of vacuum channels provided in the burls to apply a vacuum to the substrate. The vacuum channels are distributed throughout the main body and arranged in a grid pattern.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Cheng Wu, Chi-Hung Liao
  • Patent number: 11914302
    Abstract: A lithography method in semiconductor fabrication is provided. The method includes generating a plurality of drops of a target material through a plurality of nozzles, adjacent two of the plurality of nozzles having a distance less than a width of a first one of the adjacent two of the plurality of nozzles, wherein the plurality of drops are aggregated to an elongated droplet; generating a laser pulse to convert the elongated droplet into plasma that generates an extreme ultraviolet (EUV) radiation; exposing a semiconductor substrate to the EUV radiation.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hung Liao, Yueh-Lin Yang
  • Patent number: 11914288
    Abstract: A method includes forming a photoresist layer over a wafer. The photoresist layer is exposed to a pattern of radiation using a photomask. The photoresist layer is developed after the photoresist layer is exposed to the pattern of radiation. The photomask includes a substrate and at least one opaque main feature. The substrate has a recessed region recessed from a first surface of the substrate and has a first width. The at least one opaque main feature protrudes from the first surface of the substrate and has a second width greater than the first width of the recessed region of the substrate. A height of the at least one opaque main feature is greater than a depth of the recess region of the substrate.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Yu Chen, Chi-Hung Liao
  • Patent number: 11899377
    Abstract: A semiconductor processing method includes operations. An exposure process is performed on a semiconductor workpiece and includes selecting a target state of a reticle based on given data and regulating the reticle to reach the target state. A development process is performed on the semiconductor workpiece.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: February 13, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yueh-Lin Yang, Chi-Hung Liao
  • Patent number: 11899378
    Abstract: A lithography system includes a collector having a mirror surface, a laser generator aiming at an excitation zone in front of the mirror surface of the collector, a droplet generator, and a droplet deflector operative to apply a force at a position between the droplet generator and the excitation zone.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: February 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hung Liao, Min-Cheng Wu
  • Publication number: 20240012324
    Abstract: A photomask includes a substrate, an opaque filling formed embedded in the substrate, and an opaque main feature over the substrate. The opaque filling has a first width. The opaque main has a second width greater than the first width of the opaque filling. The opaque filling and the opaque main feature comprise same material.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 11, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Yu CHEN, Chi-Hung LIAO
  • Publication number: 20230386838
    Abstract: A method of fabricating a semiconductor device includes providing a first substrate and forming a resist layer over the first substrate. In some embodiments, the method further includes performing an exposure process to the resist layer. The exposure process includes exposing the resist layer to a radiation source through an intervening mask. In some examples, the intervening mask includes a second substrate, a multi-layer structure formed over the second substrate, a capping layer formed over the multi-layer structure, and an absorber layer disposed over the capping layer. In some embodiments, the absorber layer includes a first main pattern area and an opening area spaced a distance from the first main pattern area. In various examples, the method further includes, after performing the exposure process, developing the exposed resist layer to form a patterned resist layer.
    Type: Application
    Filed: August 7, 2023
    Publication date: November 30, 2023
    Inventors: Chi-Hung LIAO, Po-Ming SHIH
  • Publication number: 20230386809
    Abstract: A magnetic shield reduces external noise in a chamber including a target and at least one electromagnet for copper physical vapor deposition (PVD). The shield may have a thickness in a range from approximately 0.1 mm to approximately 10 mm to provide sufficient protection from radio frequency and other electromagnetic signals. As a result, copper atoms in the chamber undergo less re-direction from external noise. Additionally, even when hardware failure occurs during PVD (e.g., an electromagnet malfunctions, a wafer stage is not level, and/or a flow optimizer induces too much shift, among other examples), the copper atoms are less susceptible to small re-directions from external noise. As a result, back end of line (BEOL) and/or middle end of line (MEOL) conductive structures are formed in a more uniform manner, which increases conductivity and improves lifetime of an electronic device including the BEOL and/or MEOL conductive structures.
    Type: Application
    Filed: August 10, 2023
    Publication date: November 30, 2023
    Inventors: Chia-Hung TSAI, Chin-Szu LEE, Szu-Hua WU, Jui-Hung HO, Chi-Hung LIAO, Yu-Jen CHIEN
  • Patent number: 11809084
    Abstract: Embodiments described herein provide a lithographic system having two or more lithographic tools connected to a radiation source using two or more variable attenuation units. In some embodiments, the variable attenuation unit reflects a portion of the received light beam to the lithographic tool attached thereto and transmits a remaining portion of the received light beam to the lithographic tools downstream. In some embodiments, the radiation source includes two or more laser sources to provide laser beams with an enhanced power level and which can prevent operation interruption due to laser source maintenances and repair.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: November 7, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Hung Liao, Yueh Lin Yang
  • Publication number: 20230343628
    Abstract: A method includes emitting, by a first portion of an optical inspection instrument, a radiation toward a supporting surface of a chuck, wherein the chuck is configured for fixing a semiconductor workpiece on the supporting surface, and the optical inspection instrument faces the supporting surface; receiving, by a second portion of the optical inspection instrument, a reflection of the radiation reflected from the chuck; analyzing the reflection of the radiation; determining whether a particle is present on the supporting surface of the chuck based on the analyzing the reflection of the radiation; and removing the particle by using a cleaning tool comprising an exhaust duct.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yueh-Lin YANG, Chi-Hung LIAO
  • Publication number: 20230280665
    Abstract: A method comprises cleaning a surface of a reticle by irradiating the surface of the reticle in a first exposure device for a predetermined irradiation time. A layout pattern of the reticle is projected onto a photo resist layer of a wafer in a second exposure device by an EUV radiation. The photo resist layer is developed to generate a photo resist pattern on the wafer. A surface of the wafer is imaged to generate an image of the photo resist pattern on the wafer. The generated image of the photo resist pattern is analyzed to determine critical dimension uniformity (CDU) of the photo resist pattern. The predetermined irradiation time is adjusted until the determined CDU satisfies a predetermined criterion.
    Type: Application
    Filed: May 12, 2023
    Publication date: September 7, 2023
    Inventors: Chi-Hung LIAO, Po-Ming SHIH
  • Publication number: 20230260770
    Abstract: A magnetic shield reduces external noise in a chamber including a target and at least one electromagnet for copper physical vapor deposition (PVD). The shield may have a thickness in a range from approximately 0.1 mm to approximately 10 mm to provide sufficient protection from radio frequency and other electromagnetic signals. As a result, copper atoms in the chamber undergo less re-direction from external noise. Additionally, even when hardware failure occurs during PVD (e.g., an electromagnet malfunctions, a wafer stage is not level, and/or a flow optimizer induces too much shift, among other examples), the copper atoms are less susceptible to small re-directions from external noise. As a result, back end of line (BEOL) and/or middle end of line (MEOL) conductive structures are formed in a more uniform manner, which increases conductivity and improves lifetime of an electronic device including the BEOL and/or MEOL conductive structures.
    Type: Application
    Filed: February 16, 2022
    Publication date: August 17, 2023
    Inventors: Chia-Hung TSAI, Chin-Szu LEE, Szu-Hua WU, Jui-Hung HO, Chi-Hung LIAO, Yu-Jen CHIEN