Abstract: A semiconductor light emitting device includes a multi-quantum-well structure, a first capping layer, a second capping layer, and an electron barrier layer stacked in order. The multi-quantum-well structure includes a plurality of alternately-stacked potential barrier layers and potential well layers. The first capping layer is a semiconductor layer, and the second capping layer is a p-doped semiconductor layer. Each of the first and second capping layers has an aluminum mole fraction larger than that of each of the potential barrier layers, and the aluminum mole fraction of the first capping layer is larger than that of at least a portion of the electron barrier layer. A method for preparing the semiconductor light emitting device is also provided.

Abstract: A method includes receiving a pattern layout for a mask, shrinking the pattern layout to form a shrunk pattern, determining centerlines for each of a plurality of features within the shrunk pattern, and snapping the centerline for each of the plurality of features to a grid. The grid represents a minimum resolution size of a mask fabrication tool. The method further includes, after snapping the centerline for each of the plurality of features to the grid, fabricating the mask with the shrunk pattern.

Abstract: A nitride-based light-emitting diode (LED) device includes an n-type nitride semiconductor layer, an active layer disposed on the n-type nitride semiconductor layer, a p-type nitride semiconductor layer disposed on the active layer, and a defect control unit disposed between the n-type nitride semiconductor layer and the active layer. The defect control unit includes first, second and third defect control layers that are sequentially disposed on the n-type nitride semiconductor layer, and that have different doping concentrations. The third defect control layer includes one of Al-containing ternary nitride, Al-containing quaternary nitride, and a combination thereof.

Abstract: A method includes: providing a first design layout including a plurality of cells; updating a first cell of the plurality of cells using optical proximity correction to provide a first updated cell and a data set; and updating a second cell from remaining cells in the first design layout based on the data set and a model without involvement of optical proximity correction to provide a second updated cell, wherein the model includes hidden layers including nodes and is trained to obtaining converged values of the nodes of the hidden layers through providing a mapping of edge segments before lithography enhancement and edge segments after lithography enhancement using optical proximity correction, and wherein at least one of the providing, and updating is executed by one or more processors.

Abstract: Embodiments described herein relate to methods of printing features within a lithography environment. The methods include determining a mask pattern. The mask pattern includes auxiliary features to be provided with main features to a maskless lithography device in a lithography process. The auxiliary features are determined with a rule-based process flow or a lithography model process flow.

Abstract: A method includes receiving a pattern layout for a mask, shrinking the pattern layout to form a shrunk pattern, determining centerlines for each of a plurality of features within the shrunk pattern, and snapping the centerline for each of the plurality of features to a grid. The grid represents a minimum resolution size of a mask fabrication tool. The method further includes, after snapping the centerline for each of the plurality of features to the grid, fabricating the mask with the shrunk pattern.

Abstract: Embodiments described herein relate to methods of printing double exposure patterns in a lithography environment. The methods include determining a second exposure pattern to be exposed with a first exposure pattern in a lithography process. The second exposure pattern is determined with a rule-based process flow or a lithography model process flow.

Abstract: A method for forming a photomask includes following operations. A first photomask is received. The first photomask includes a first pattern and a first scattering bar. The first photomask is used to remove a first portion of a target layer to form a first opening and a second opening. The first opening corresponds to the first pattern, and the second opening corresponds to the first scattering bar. A second photomask is received. The second photomask includes a second pattern. The second photomask is used to remove a second portion of the target layer to form a third opening. The third opening corresponds to the second pattern. The second opening is widened to form the third opening using the second photomask.

Abstract: A method includes providing a first design layout including cells; updating a first cell in the plurality of cells using optical proximity correction to provide a first updated cell and a data set; training a model based on a layout-dependent parameter of a second design layout; and updating a second cell based on the data set and the model to provide a second updated cell. The model includes an input layer, a hidden layer and an output layer. Training the model includes obtaining converged values of nodes of the hidden layer. Obtaining converged values of nodes of the hidden layer includes providing information on edge segments before and after lithography enhancement to the input layer and the output layer, respectively, until values of nodes of the hidden layer attains convergence in terms of a cost function.

Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.

Abstract: A buffer module including a base, a buffer element and an elastic element is provided. The base has a groove. The buffer element includes a spherical body movably disposed in the groove. The elastic element is disposed between a bottom surface of the groove and the spherical body.

Abstract: A method for forming a photomask is provided. The method includes: receiving an initial layout, the initial layout comprising a first pattern and a second pattern; decomposing the initial layout into a first layout including the first pattern and a second layout including the second pattern; inserting a third pattern into the first layout; overlapping the first layout including the first pattern and the third pattern to the second layout including the second pattern; increasing a width of the third pattern in the first layout overlapping the second pattern in the second layout to form a fourth pattern in the first layout; and outputting the first layout comprising the first pattern, the third pattern and the fourth pattern into a first photomask.

Abstract: A semiconductor light emitting device includes a multi-quantum-well structure, a first capping layer, a second capping layer, and an electron barrier layer stacked in order. The multi-quantum-well structure includes a plurality of alternately-stacked potential barrier layers and potential well layers. The first capping layer is a semiconductor layer, and the second capping layer is a p-doped semiconductor layer. Each of the first and second capping layers has an aluminum mole fraction larger than that of each of the potential barrier layers, and the aluminum mole fraction of the first capping layer is larger than that of at least a portion of the electron barrier layer. A method for preparing the semiconductor light emitting device is also provided.

Abstract: A system, methods, and a non-transitory computer-readable medium for digital lithography to reduce mura in substrate sections. The boundary lines of the digital lithography need to be invisible. In one example, a system includes a processing unit configured to print a virtual mask file provided by a controller. The controller is configured to receive data and convert the data into a virtual mask file having an exposure pattern for a lithographic process. The exposure pattern includes a plurality of first sections, and second sections. Each first section forms a boundary with each second section along a first column of image projection systems of the processing unit. The controller patterns the substrate. The exposure pattern includes a first section pattern of each first section that crosses the eye to eye boundary with the second section making the boundary invisible.

Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.

Abstract: A nitride-based light-emitting diode (LED) device includes an n-type nitride semiconductor layer, an active layer disposed on the n-type nitride semiconductor layer, a p-type nitride semiconductor layer disposed on the active layer, and a defect control unit disposed between the n-type nitride semiconductor layer and the active layer. The defect control unit includes first, second and third defect control layers that are sequentially disposed on the n-type nitride semiconductor layer, and that have different doping concentrations. The third defect control layer includes one of Al-containing ternary nitride, Al-containing quaternary nitride, and a combination thereof.

Abstract: A positioning fixture including a shielding member and a driving member is provided. The shielding member includes a sliding part slidably connected to a functional module, a guiding part, and a shielding part. The sliding part and the shielding part respectively extend from two opposite ends of the guiding part. The driving member is movably disposed on the functional module corresponding to the shielding member. The driving member includes a base part, a driving part that contacts the guiding part, and a pillar part, which protrudes from the base part and is adapted to pass through the guiding groove. When the functional module is positioned on the circuit board, the base part of the driving member is pushed by the electronic component, and the guiding part is pushed by the driving part, so that the shielding member slides and the shielding part shields a screw hole of the circuit board.

Abstract: A semiconductor light emitting device includes a multi-quantum-well structure, a first capping layer, a second capping layer, and an electron barrier layer stacked in order. The multi-quantum-well structure includes a plurality of alternately-stacked potential barrier layers and potential well layers. The first capping layer is a semiconductor layer, and the second capping layer is a p-doped semiconductor layer. Each of the first and second capping layers has an aluminum mole fraction larger than that of each of the potential barrier layers, and the aluminum mole fraction of the first capping layer is larger than that of at least a portion of the electron barrier layer. A method for preparing the semiconductor light emitting device is also provided.

Abstract: A nitride-based light-emitting diode (LED) device includes an n-type nitride semiconductor layer, an active layer that is disposed on the n-type nitride semiconductor layer, a p-type nitride semiconductor layer disposed on the active layer, and a defect control unit disposed between the n-type nitride semiconductor layer and the active layer. The defect control unit includes first, second and third defect control layers that are sequentially disposed on the n-type nitride semiconductor layer in such order, and that have different doping concentrations. The third defect control layer includes one of Al-containing ternary nitride, Al-containing quaternary nitride, and a combination thereof.

Abstract: A semiconductor device including: a first formation site and a second formation site for forming a first conductive bump and a second conductive bump; when a first environmental density corresponding to the first formation site is greater than a second environmental density corresponding to the second formation site, a cross sectional area of the second formation site is greater than a cross sectional area of the first formation site; wherein the first environmental density is determined by a number of formation sites around the first formation site in a predetermined range and the second environmental density is determined by a number of formation sites around the second formation site in the predetermined range; wherein a first area having the first environmental density forms an ellipse layout while a second area having the second environmental density forms a strip layout surrounding the ellipse layout.