Patents by Inventor Chi-Ming Yang

Chi-Ming Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200035524
    Abstract: A method of manufacturing a semiconductor structure includes loading the substrate from a first load lock chamber into a first processing chamber; disposing a conductive layer over the substrate in the first processing chamber; loading the substrate from the first processing chamber into the first load lock chamber; loading the substrate from the first load lock chamber into an enclosure filled with an inert gas and disposed between the first load lock chamber and a second load lock chamber; loading the substrate from the enclosure into the second load lock chamber; loading the substrate from the second load lock chamber into a second processing chamber; disposing a conductive member over the conductive layer in the second processing chamber; loading the substrate from the second processing chamber into the second load lock chamber; and loading the substrate from the second load lock chamber into a second load port.
    Type: Application
    Filed: June 21, 2019
    Publication date: January 30, 2020
    Inventors: JYH-SHIOU HSU, CHI-MING YANG, TZU JENG HSU
  • Patent number: 10541164
    Abstract: The present disclosure, in some embodiments, relates to a substrate metrology system. The substrate metrology system includes a substrate warpage measurement module configured to determine one or more substrate warpage parameters of a substrate by taking a plurality of separate measurements at a plurality of different positions over a substrate. The substrate has a plurality of conductive interconnect layers within a dielectric structure over a semiconductor substrate and a conductive bump disposed over the dielectric structure and configured to be coupled to an additional substrate of a multi-dimensional chip. A substrate metrology module has an optical component and is configured to measure one or more dimensions of the conductive bump. A position control element is configured to move the optical component. A feed-forward path is coupled between an output of the substrate warpage measurement module and an input of the position control element.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: January 21, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Nai-Han Cheng, Chi-Ming Yang
  • Patent number: 10513006
    Abstract: A chemical-mechanical polishing system has a first polishing apparatus configured to perform a first chemical-mechanical polish on a workpiece and a second polishing apparatus configured to perform a second chemical-mechanical polish on the workpiece. A rework polishing apparatus comprising a rework platen and a rework CMP head is configured to perform an auxiliary chemical-mechanical polish on the workpiece when the workpiece is positioned on the rework platen. A measurement apparatus measures one or more parameters of the workpiece, and a transport apparatus transports the workpiece between the first polishing apparatus, second polishing apparatus, rework polishing apparatus, and measurement apparatus. A controller determines a selective transport of the workpiece to the rework polishing apparatus by the transport apparatus only when the one or more parameters are unsatisfactory.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jiann Lih Wu, Jason Shen, Soon-Kang Huang, James Jeng-Jyi Hwang, Chi-Ming Yang
  • Patent number: 10512946
    Abstract: The present disclosure provides a semiconductor cleaning system. The cleaning system includes a chamber to retain a cleaning solution, and a gigasonic frequency generator. The gigasonic frequency generator is configured to generate an electrical signal corresponding to a range of gigahertz frequencies. A transducer is configured to transform the electrical signal to a mechanical wave of pressure and displacement that propagates through the cleaning solution with oscillations within the range of gigahertz frequencies.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ying-Hsueh Chang Chien, Chi-Ming Yang
  • Patent number: 10507498
    Abstract: The present disclosure provides a particle cleaning apparatus. The apparatus comprises an acoustic wave generator configured to apply an acoustic wave to particles external to the acoustic wave generator. The apparatus also includes a removing module configured to remove the applied particles.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: December 17, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ying-Hsueh Chang Chien, James Jeng-Jyi Hwang, Chi-Ming Yang
  • Patent number: 10510655
    Abstract: A semiconductor device includes providing a workpiece including an insulating material layer disposed thereon. The insulating material layer includes a trench formed therein. A barrier layer on the sidewalls of the trench is formed using a surface modification process and a surface treatment process.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Ying-Hsueh Chang Chien, Yu-Ming Lee, Man-Kit Leung, Chi-Ming Yang
  • Patent number: 10509311
    Abstract: A method for generating an electromagnetic radiation includes the following operations. A target material is introduced in a chamber. A light beam is irradiated on the target material in the chamber to generate plasma and an electromagnetic radiation. The electromagnetic radiation is collected with an optical device. A gas mixture is introduced in the chamber. The gas mixture includes a first buffer gas reactive to the target material, and a second buffer gas to slow down debris of the target material and/or plasma by-product, so as to increase an reaction efficiency of the target material and the first buffer gas, and to reduce deposition of the debris of the target material and/or the plasma by-product on the optical device.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: December 17, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chung-Chieh Lee, Feng Yuan Hsu, Chyi Shyuan Chern, Chi-Ming Yang, Tsiao-Chen Wu, Chun-Lin Chang
  • Publication number: 20190375071
    Abstract: An apparatus for CMP includes a wafer carrier retaining a semiconductor wafer during a polishing operation, a slurry dispenser dispensing an abrasive slurry, and a temperature control system monitoring and controlling a temperature variation during the polishing operation. The temperature control system includes a temperature sensor detecting a temperature during the polishing operation and providing a signal corresponding to the temperature, a temperature controller coupled to the temperature sensor and receiving the signal from the temperature sensor, and a cooling device coupled to the temperature controller and providing a coolant to the apparatus for CMP.
    Type: Application
    Filed: June 8, 2018
    Publication date: December 12, 2019
    Inventors: HE HUI PENG, JAMES JENG-JYI HWANG, CHI-MING YANG, YUNG-YAO LEE, YEN-DI TSEN
  • Publication number: 20190369481
    Abstract: A method for generating an electromagnetic radiation includes the following operations. A target material is introduced in a chamber. A light beam is irradiated on the target material in the chamber to generate plasma and an electromagnetic radiation. The electromagnetic radiation is collected with an optical device. A gas mixture is introduced in the chamber. The gas mixture includes a first buffer gas reactive to the target material, and a second buffer gas to slow down debris of the target material and/or plasma by-product, so as to increase an reaction efficiency of the target material and the first buffer gas, and to reduce deposition of the debris of the target material and/or the plasma by-product on the optical device.
    Type: Application
    Filed: May 29, 2018
    Publication date: December 5, 2019
    Inventors: CHUNG-CHIEH LEE, FENG YUAN HSU, CHYI SHYUAN CHERN, CHI-MING YANG, TSIAO-CHEN WU, CHUN-LIN CHANG
  • Publication number: 20190364029
    Abstract: A flexible and extensible architecture allows for secure searching across an enterprise. Such an architecture can provide a simple Internet-like search experience to users searching secure content inside (and outside) the enterprise. The architecture allows for the crawling and searching of a variety of sources across an enterprise, regardless of whether any of these sources conform to a conventional user role model. The architecture further allows for security attributes to be received at query time, for example, in order to provide real-time secure access to enterprise resources. The user query also can be transformed to provide for dynamic querying that provides for a more current result list than can be obtained for static queries.
    Type: Application
    Filed: August 12, 2019
    Publication date: November 28, 2019
    Applicant: Oracle International Corporation
    Inventors: Muralidhar Krishnaprasad, Mark Davis, Mark Ture, Cindy Hsin, Meeten Bhavsar, Hiroshi Koide, Joaquin Delgado, Chi-Ming Yang, Visar Nimani, Hui Ouyang, Sachin Bhatkar, Thomas Chang
  • Patent number: 10460999
    Abstract: A metrology device includes a light source and an image sensor. The light source is configured for providing an X-ray illuminating a wafer. The image sensor is configured for detecting a spatial domain pattern produced when the X-ray illuminating the wafer.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: October 29, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Su-Horng Lin, Chi-Ming Yang
  • Patent number: 10382421
    Abstract: A flexible and extensible architecture allows for secure searching across an enterprise. Such an architecture can provide a simple Internet-like search experience to users searching secure content inside (and outside) the enterprise. The architecture allows for the crawling and searching of a variety of sources across an enterprise, regardless of whether any of these sources conform to a conventional user role model. The architecture further allows for security attributes to be received at query time, for example, in order to provide real-time secure access to enterprise resources. The user query also can be transformed to provide for dynamic querying that provides for a more current result list than can be obtained for static queries.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: August 13, 2019
    Assignee: Oracle International Corporation
    Inventors: Muralidhar Krishnaprasad, Mark Davis, Mark Ture, Cindy Hsin, Meeten Bhavsar, Hiroshi Koide, Joaquin Delgado, Chi-Ming Yang, Visar Nimani, Hui Ouyang, Sachin Bhatkar, Thomas Chang
  • Publication number: 20190139800
    Abstract: The present disclosure, in some embodiments, relates to a substrate metrology system. The substrate metrology system includes a substrate warpage measurement module configured to determine one or more substrate warpage parameters of a substrate by taking a plurality of separate measurements at a plurality of different positions over a substrate. The substrate has a plurality of conductive interconnect layers within a dielectric structure over a semiconductor substrate and a conductive bump disposed over the dielectric structure and configured to be coupled to an additional substrate of a multi-dimensional chip. A substrate metrology module has an optical component and is configured to measure one or more dimensions of the conductive bump. A position control element is configured to move the optical component. A feed-forward path is coupled between an output of the substrate warpage measurement module and an input of the position control element.
    Type: Application
    Filed: December 28, 2018
    Publication date: May 9, 2019
    Inventors: Nai-Han Cheng, Chi-Ming Yang
  • Patent number: 10269591
    Abstract: A method of selectively removing silicon nitride is provided. The method includes: providing a wafer having silicon nitride on a surface of the wafer; providing a mixture of phosphoric acid and a silicon-containing material; and delivering the mixture to the surface of the wafer to remove the silicon nitride. Single wafer etching apparatuses of selectively removing silicon nitride are also provided.
    Type: Grant
    Filed: October 23, 2013
    Date of Patent: April 23, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ying-Hsueh Changchien, Yu-Ming Lee, Chi-Ming Yang
  • Patent number: 10181415
    Abstract: In some embodiments, the present disclosure relates to a method of bump metrology The method is performed by forming a through-substrate-via within a substrate, forming a plurality of metal interconnect layers within a dielectric structure over the substrate, and forming a bump on the plurality of metal interconnect layers. One or more substrate warpage parameters of the substrate are measured and an initial position of a lens within a substrate metrology module is calculated based upon the one or more substrate warpage parameters. The lens is then moved to the initial position, and a height and a width of the bump are measured using the substrate metrology module after moving the lens to the initial position.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: January 15, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Nai-Han Cheng, Chi-Ming Yang
  • Patent number: 10121653
    Abstract: The present disclosure relates to a method and apparatus for performing a plasma enhanced ALD (PEALD) process that provides for improved step coverage. The process introduces a precursor gas into a processing chamber comprising a semiconductor workpiece. The first gas is ionized to form a plurality of ionized precursor molecules. A bias voltage is subsequently applied to the workpiece. The bias voltage attracts the ionized precursor molecules to the workpiece, so as to provide anisotropic coverage of the workpiece with the precursor gas. A reactant gas is introduced into the processing chamber. A plasma is subsequently ignited from the reactant gas, causing the reactant gas to react with the ionized precursor molecules that have been deposited onto the substrate to form a deposited layer on the workpiece.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: November 6, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Lin-Jung Wu, Su-Horng Lin, Chi-Ming Yang
  • Patent number: 10113233
    Abstract: An apparatus and a method for controlling critical dimension (CD) of a circuit is provided. An apparatus includes a controller for receiving CD measurements at respective locations in a circuit pattern in an etched film on a first substrate and a single wafer chamber for forming a second film of the film material on a second substrate. The single wafer chamber is responsive to a signal from the controller to locally adjust a thickness of the second film based on the measured CD's. A method provides for etching a circuit pattern of a film on a first substrate, measuring CD's of the circuit pattern, adjusting a single wafer chamber to form a second film on a second semiconductor substrate based on the measured CD. The second film thickness is locally adjusted based on the measured CD's.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: October 30, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Lin Chang, Hsin-Hsien Wu, Zin-Chang Wei, Chi-Ming Yang, Chyi Shyuan Chern, Jun-Lin Yeh, Jih-Jse Lin, Jo Fei Wang, Ming-Yu Fan, Jong-I Mou
  • Patent number: 10090207
    Abstract: A wafer polishing system including a platen configured to rotate in a first direction, and a polishing head configured to hold a wafer, the polishing head configured to rotate in a second direction. The wafer polishing system further includes an optical sensing system configured to detect a thickness of the wafer at a first location on the platen and a second location on the platen. A first distance from a center of the platen to the first location is different than a second distance from the center of the platen to the second location.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: October 2, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jiann Lih Wu, Jeng-Jyi Hwang, Soon-Kang Huang, Chi-Ming Yang
  • Patent number: 10065288
    Abstract: A localized chemical mechanical polishing (CMP) platform is provided. A table is configured to support a workpiece with a to-be-polished surface. A polishing pad is spaced from the table with a width less than about half that of the table. The polishing pad is configured to individually polish rough regions of hillocks or valleys on the to-be-polished surface. A slurry distribution system is configured to apply slurry to an interface between the polishing pad and the workpiece. A cleaning system is configured to clean the workpiece in situ on the table. A drying system is configured to dry the workpiece in situ on the table. A method for CMP with local profile control and a system with local profile control are also provided.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: September 4, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jiann Lih Wu, Chi-Ming Yang, James Jeng-Jyi Hwang
  • Patent number: 10066127
    Abstract: The present disclosure provides chemical mechanical polishing (CMP) slurry, including an abrasive, a chelator, an oxidizing agent, and a surface modificator. The surface modificator is configured to modify a surface from hydrophobic to hydrophilic. The present disclosure also provides a method for reducing chemical mechanical polishing (CMP) surface defects. The method includes adding an additive into CMP slurry by at least 0.0001 wt %, wherein the additive modifies a surface to be polished from hydrophobic to hydrophilic.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: September 4, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: An-Dih Yu, Chi-Ming Yang