Patents by Inventor Chieh Wu

Chieh Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240008201
    Abstract: A thermal dissipation holder for a handheld electronic device is provided. The thermal dissipation holder includes a main structure, a movable element, an elastic element, and a locker. The main structure has a front surface and a rear surface. The movable element is movably connected to the main structure along a first direction and has a clamp portion at a side away from the carrier. One end of the elastic element is connected to the main structure. The other end of the elastic element is connected to the movable element. The elastic element drives the movable element to move along the first direction. The locker is disposed in the main structure and has a locking portion, where a position of the locking portion corresponds to that of the clamp portion, and the locker is selectively engaged with the clamp portion through the locking portion to lock the movable element.
    Type: Application
    Filed: January 13, 2023
    Publication date: January 4, 2024
    Inventors: Jhih-Wei RAO, Zih-Siang HUANG, Hung-Chieh WU, Liang-Jen LIN
  • Patent number: 11819800
    Abstract: A system and method for recovering a sterilization agent from waste gaseous mixture, comprising a gas separator to wash waste gas comprising a gaseous mixture of a sterilization agent, insert dilution gases, and water vapor, from plurality sterilization chambers, with water, thereby producing a water-gaseous sterilization agent mixture collected at bottom section of the gas separator, and inert dilution gases exhausted at top section of the gas separator; a pressure reducing valve; a first tank or gas evaporator to produce gaseous sterilization agent and water vapor; a first condenser to produce condensed water vapor and separate the gaseous sterilization agent from the condensed water vapor; a water tank to receive the condensed water vapor; a separation pump for raising pressure of the gaseous sterilization agent; a second condenser to cool the gaseous sterilization agent causing the sterilization agent to condense into liquid; and a second tank for storing the liquid sterilization agent.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: November 21, 2023
    Assignee: TAIWAN ADVANCED STERILIZATION TECHNOLOGIES INC.
    Inventors: Peng-Chieh Wu, Enchi Lin
  • Patent number: 11819801
    Abstract: A method and system for recovering a sterilization agent and nitrogen from a waste gaseous mixture, comprising: pressure reducing valve for reducing pressure of waste gas from sterilization chambers to a first predefined pressure; a first condenser to receive the gaseous mixture and cool it to a temperature below boiling point and above freezing point of the water vapor at the first predefined pressure, to produce condensed water vapor; a first tank for storing the condensed water vapor; a separation pump for raising pressure of the gaseous mixture to a second predefined pressure; a second condenser to cool the gaseous mixture to a temperature below boiling point and above freezing point of the sterilization agent at the second predefined pressure, to condense the sterilization agent into liquid, and to discharge the nitrogen gas remaining in the gaseous mixture; a second tank for storing the sterilization agent; a compressor to compress the discharged nitrogen gas and increase pressure of the discharged nitr
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: November 21, 2023
    Assignee: TAIWAN ADVANCED STERILIZATION TECHNOLOGIES INC.
    Inventors: Peng-Chieh Wu, Enchi Lin
  • Publication number: 20230367942
    Abstract: Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 16, 2023
    Inventors: Chia-Ping CHIANG, Ming-Hui CHIH, Chih-Wei HSU, Ping-Chieh WU, Ya-Ting CHANG, Tsung-Yu WANG, Wen-Li CHENG, Hui En YIN, Wen-Chun HUANG, Ru-Gun LIU, Tsai-Sheng GAU
  • Publication number: 20230359280
    Abstract: A method of customizing a hand gesture provides a touch screen, a computing unit connected with the touch screen, and a hand gesture database connected with the computing unit, and the method includes the following steps: recording a hand gesture trajectory data input of an input hand gesture on the touch screen; converting the hand gesture trajectory data input into a 2D trajectory graph of the input hand gesture; the computing unit sequentially reads a 2D hand gesture reference graph from the hand gesture database, and correspondingly generates a 2D hand gesture reference graph set for the 2D hand gesture reference graph read, and then the computing unit compares the similarity between the 2D trajectory graph of the input hand gesture and each reference graph in the 2D hand gesture reference graph set to determine whether the input hand gesture is already in the hand gesture database.
    Type: Application
    Filed: May 9, 2022
    Publication date: November 9, 2023
    Inventors: MIKE CHUN-HUNG WANG, GUAN-SIAN WU, CHIEH WU, YU-FENG WU, WEI-CHI LI, TSUNG-MING TAI, WEN-JYI HWANG, SIMON ANDREAS, DELLA FITRAYANI BUDIONO, FANG LI, CHING-CHIN KUO
  • Patent number: 11804077
    Abstract: A generic gesture detecting method executed by a generic gesture detecting device includes steps of: receiving a current sensing signal from a sensing unit; generating a current image according to the current sensing signal; determining whether the current image is similar with a stored image stored in a memory unit; when the current image is similar with the stored image, detecting the current image and the stored image to be a gesture signal; when the current image is different from the stored image, storing the current image into the memory unit, and returning to the step of receiving a current sensing signal. Since the generic gesture detecting device can automatically detect the gesture signal, the user may not need to enable a detecting time period before implementing a command motion. Therefore, the user can make the command motion without enabling the detecting time period, and the convenience can be increased.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: October 31, 2023
    Assignee: KaiKuTek Inc.
    Inventors: Yu Feng Wu, Chieh Wu, Ling Ya Huang, Fang Li, Guan-Sian Wu, Wen-Yen Chou, Wen-Jyi Hwang, Chun-Hsuan Kuo, Mike Chun-Hung Wang
  • Publication number: 20230330817
    Abstract: A locking pliers includes a first plier and a second plier. The first plier includes a first handle, a first jaw, and an adjusting member. The second plier includes a second jaw, a first connecting member, a toggle link, and a second handle. The second jaw has a first pivoting portion and a second pivoting portion. The first pivoting portion is pivotally connected to the first handle. The first connecting member is pivotally connected to the second pivoting portion. The toggle link is abutted against the adjusting member and has a third pivoting portion pivotally connected to the first connecting member. The second handle is connected to the first connecting member. A first length defined between the first pivoting portion and the second pivoting portion is less than a second length defined between the second pivoting portion and the third pivoting portion.
    Type: Application
    Filed: May 4, 2022
    Publication date: October 19, 2023
    Inventor: Ming Chieh WU
  • Patent number: 11790145
    Abstract: Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: October 17, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Ping Chiang, Ming-Hui Chih, Chih-Wei Hsu, Ping-Chieh Wu, Ya-Ting Chang, Tsung-Yu Wang, Wen-Li Cheng, Hui En Yin, Wen-Chun Huang, Ru-Gun Liu, Tsai-Sheng Gau
  • Publication number: 20230326766
    Abstract: A semiconductor structure includes a first die; a second die disposed over the first die; a plurality of first conductive vias adjacent to the first die. The semiconductor structure further includes a plurality of second conductive vias disposed over the first conductive vias, each of the second conductive vias corresponding to one of the first conductive vias; a plurality of third conductive vias disposed over the first die and adjacent to the second die; and a molding material encapsulating the first die, the second die, the first conductive vias, the second conductive vias and the third conductive vias. A stepped shape is formed around an interface between each of the first conductive vias and the corresponding one of the second conductive vias.
    Type: Application
    Filed: June 9, 2023
    Publication date: October 12, 2023
    Inventors: JEN-FU LIU, MING HUNG TSENG, YEN-LIANG LIN, LI-KO YEH, HUI-CHUN CHIANG, CHENG-CHIEH WU
  • Publication number: 20230326804
    Abstract: In an embodiment, a method includes: forming a first fin extending from a substrate; forming a second fin extending from the substrate, the second fin being spaced apart from the first fin by a first distance; forming a metal gate stack over the first fin and the second fin; depositing a first inter-layer dielectric over the metal gate stack; and forming a gate contact extending through the first inter-layer dielectric to physically contact the metal gate stack, the gate contact being laterally disposed between the first fin and the second fin, the gate contact being spaced apart from the first fin by a second distance, where the second distance is less than a second predetermined threshold when the first distance is greater than or equal to a first predetermined threshold.
    Type: Application
    Filed: June 15, 2023
    Publication date: October 12, 2023
    Inventors: Shih-Chieh Wu, Pang-Chi Wu, Kuo-Yi Chao, Mei-Yun Wang, Hsien-Huang Liao, Tung-Heng Hsieh, Bao-Ru Young
  • Publication number: 20230325579
    Abstract: A method includes generating a diffraction map from a plurality of target patterns, generating a favorable zone and an unfavorable zone from the diffraction map, placing a plurality of sub-resolution patterns in the favorable zone, and performing a plurality of geometric operations on the plurality of sub-resolution patterns to generate modified sub-resolution patterns. The modified sub-resolution patterns extend into the favorable zone, and are away from the unfavorable zone.
    Type: Application
    Filed: June 14, 2023
    Publication date: October 12, 2023
    Inventors: Shih-Ming Chang, Shinn-Sheng Yu, Jue-Chin Yu, Ping-Chieh Wu
  • Publication number: 20230317519
    Abstract: The present disclosure provides methods for forming conductive features in a dielectric layer without using adhesion layers or barrier layers and devices formed thereby. In some embodiments, a structure comprising a dielectric layer over a substrate, and a conductive feature disposed through the dielectric layer. The dielectric layer has a lower surface near the substrate and a top surface distal from the substrate. The conductive feature is in direct contact with the dielectric layer, and the dielectric layer comprises an implant species. A concentration of the implant species in the dielectric layer has a peak concentration proximate the top surface of the dielectric layer, and the concentration of the implant species decreases from the peak concentration in a direction towards the lower surface of the dielectric layer.
    Type: Application
    Filed: June 7, 2023
    Publication date: October 5, 2023
    Inventors: Li-Chieh Wu, Tang-Kuei Chang, Kuo-Hsiu Wei, Kei-Wei Chen, Ying-Lang Wang, Su-Hao Liu, Kuo-Ju Chen, Liang-Yin Chen, Huicheng Chang, Ting-Kui Chang, Chia Hsuan Lee
  • Patent number: 11747667
    Abstract: The present invention discloses a light redirecting film, a polarizer with the light redirecting film, and a display comprising the polarizer. The light redirecting film includes a light redistribution layer, and a light guide layer disposed on the light redistribution layer. The light redistribution layer includes a plurality of strip-shaped micro prisms extending along a first direction and arranged at intervals and a plurality of diffraction gratings arranged at bottoms of the intervals between the adjacent strip-shaped micro prisms, wherein each of the strip-shaped micro prisms has at least one inclined light-guide surface, and the bottom of each interval has at least one set of diffraction gratings, and the light guide layer is in contact with the strip-shaped micro prisms and the diffraction gratings.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: September 5, 2023
    Assignee: BenQ Materials Corporation
    Inventors: Cyun-Tai Hong, Yu-Da Chen, Hsu-Cheng Cheng, Meng-Chieh Wu, Chuen-Nan Shen, Kuo-Jung Huang
  • Publication number: 20230270816
    Abstract: Acute myelogenous leukaemia (AML) often bear a mutation in the NPM1 nucleolar chaperone, but the transforming properties of the NPM1c oncoprotein remain incompletely understood. Here the inventors show that NPM1c binding to PML, a key senescence gene, disrupts PML nuclear bodies (NB) yielding proliferation, mitochondrial alterations and intracellular stress. Actinomycin-D (ActD), an anticancer antibiotic with clinical efficacy in NPM1c-AMLs, targets these dysfunctional mitochondria to induce ROS. The later disrupt disulphide-linked NPM1c/PML complex, restoring PML NBs and initiating senescence. An ActD-responsive patient displayed features of mitochondria-initiated senescence. These studies highlight unexpected mitochondrial involvement both downstream of the NPM1c/PML axis and as a key feature of ActD therapy.
    Type: Application
    Filed: July 5, 2021
    Publication date: August 31, 2023
    Inventors: Hugues BLAUDIN DE THE, Hsin Chieh WU
  • Publication number: 20230268411
    Abstract: A semiconductor structure includes a substrate, nanostructures over the substrate, and a gate structure wrapping around the nanostructures. The gate structure includes a gate dielectric layer and a gate electrode wrapping around the gate dielectric layer. The semiconductor structure further includes a source/drain feature in contact with the nanostructures, a contact etch stop layer over the source/drain feature, and a seal layer over the air spacer and the gate structure, and on a sidewall of the contact etch stop layer. The contact etch stop layer is separated from the gate structure by an air spacer.
    Type: Application
    Filed: February 23, 2022
    Publication date: August 24, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Hsuan LEE, Shih-Che LIN, Po-Yu HUANG, Shih-Chieh WU, I-Wen WU, Chen-Ming LEE, Fu-Kai YANG, Mei-Yun WANG
  • Publication number: 20230261068
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a source/drain region formed in a semiconductor substrate, a source/drain contact structure formed over the source/drain region, and a gate electrode layer formed adjacent to the source/drain contact structure. The semiconductor device structure also includes a first spacer and a second spacer laterally and successively arranged from the sidewall of the gate electrode layer to the sidewall of the source/drain contact structure. The semiconductor device structure further includes a silicide region formed in the source/drain region. The top width of the silicide region is greater than the bottom width of the source/drain contact structure and less than the top width of the source/drain region.
    Type: Application
    Filed: February 15, 2022
    Publication date: August 17, 2023
    Inventors: Kai-Hsuan LEE, Shih-Che LIN, Po-Yu HUANG, Shih-Chieh WU, I-Wen WU, Chen-Ming LEE, Fu-Kai YANG, Mei-Yun WANG
  • Publication number: 20230249320
    Abstract: A locking pliers includes a pliers-body, a rotating shaft and an operating and pivoting unit. The pliers-body includes a fixed jaw, a movable jaw and a jaw end member disposed on the movable jaw. The rotating shaft is rotatably connected with the fixed jaw about a pivot axis and is movable along the pivot axis, and has clamp and insert ends. A clamp member is disposed on the clamp end. A pivot member extends through the fixed jaw and connected with the rotating shaft and is operable to move the rotating shaft close to or away from the fixed jaw. A retaining member extends through the fixed jaw and the rotating shaft to retain the rotating shaft to a first or second position. With the rotating shaft rotated between first and second positions, the locking pliers can be shifted to two types of use.
    Type: Application
    Filed: January 15, 2023
    Publication date: August 10, 2023
    Inventor: Ming-Chieh WU
  • Patent number: 11721590
    Abstract: In an embodiment, a method includes: forming a first fin extending from a substrate; forming a second fin extending from the substrate, the second fin being spaced apart from the first fin by a first distance; forming a metal gate stack over the first fin and the second fin; depositing a first inter-layer dielectric over the metal gate stack; and forming a gate contact extending through the first inter-layer dielectric to physically contact the metal gate stack, the gate contact being laterally disposed between the first fin and the second fin, the gate contact being spaced apart from the first fin by a second distance, where the second distance is less than a second predetermined threshold when the first distance is greater than or equal to a first predetermined threshold.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: August 8, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Chieh Wu, Pang-Chi Wu, Kuo-Yi Chao, Mei-Yun Wang, Hsien-Huang Liao, Tung-Heng Hsieh, Bao-Ru Young
  • Patent number: 11715646
    Abstract: A method includes forming a plurality of first conductive vias over a redistribution layer (RDL); disposing a first die over the RDL and adjacent to the first vias; and forming a plurality of second conductive vias over and electrically connected to the first conductive vias, each of the second conductive vias corresponding to one of the first conductive vias. The method further includes forming a plurality of third conductive vias over the first die; disposing a second die over the first die and adjacent to the third conductive vias; and encapsulating the first die, the second die, the first conductive vias, the second conductive vias and the third conductive vias with a molding material.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: August 1, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jen-Fu Liu, Ming Hung Tseng, Yen-Liang Lin, Li-Ko Yeh, Hui-Chun Chiang, Cheng-Chieh Wu
  • Patent number: 11714951
    Abstract: A method includes generating a diffraction map from a plurality of target patterns, generating a favorable zone and an unfavorable zone from the diffraction map, placing a plurality of sub-resolution patterns in the favorable zone, and performing a plurality of geometric operations on the plurality of sub-resolution patterns to generate modified sub-resolution patterns. The modified sub-resolution patterns extend into the favorable zone, and are away from the unfavorable zone.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: August 1, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Ming Chang, Shinn-Sheng Yu, Jue-Chin Yu, Ping-Chieh Wu