Patents by Inventor Chieh Wu

Chieh Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11710659
    Abstract: The present disclosure provides methods for forming conductive features in a dielectric layer without using adhesion layers or barrier layers and devices formed thereby. In some embodiments, a structure comprising a dielectric layer over a substrate, and a conductive feature disposed through the dielectric layer. The dielectric layer has a lower surface near the substrate and a top surface distal from the substrate. The conductive feature is in direct contact with the dielectric layer, and the dielectric layer comprises an implant species. A concentration of the implant species in the dielectric layer has a peak concentration proximate the top surface of the dielectric layer, and the concentration of the implant species decreases from the peak concentration in a direction towards the lower surface of the dielectric layer.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: July 25, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Li-Chieh Wu, Tang-Kuei Chang, Kuo-Hsiu Wei, Kei-Wei Chen, Ying-Lang Wang, Su-Hao Liu, Kuo-Ju Chen, Liang-Yin Chen, Huicheng Chang, Ting-Kui Chang, Chia Hsuan Lee
  • Publication number: 20230223218
    Abstract: A button module is provided. The button module comprises a base, a pressing part, and an elastic part. The pressing part includes a fixed end and a free end. The fixed end is pivotally connected to the base in a first axial direction. The elastic part is disposed on a side of the pressing part facing the base. The elastic part includes a first damping portion and a second damping portion selectively pressing against the base, where a hardness of the first damping portion is different from a hardness of the second damping portion.
    Type: Application
    Filed: August 30, 2022
    Publication date: July 13, 2023
    Inventors: Te-Wei HUANG, Zih-Siang HUANG, Jhih-Wei RAO, Hung-Chieh WU, Liang-Jen LIN
  • Patent number: 11686885
    Abstract: Compound eyes of insects are great optical system for imaging and sensing by the nature creator, which is an unsurpassed challenge due to its precision and small size. Here, we use meta-lens consisting of GaN nano-antenna to open the fascinating doorway to full-color achromatic light field imaging and sensing. A 60×60 multi-channels meta-lens array is used for effectively capturing multi-dimensional optical information including image and depth. Based on this, the multi-dimensional light field imaging and sensing of a moving object is capable to be experimentally implemented. Our system presents a diffraction-limit resolution of 1.95 micrometer via observing the standard resolution test chart under white light illumination. This is the first mimic optical light field imaging and sensing system of insect compound eye, which has potential applications in micro robotic vision, non-men vehicle sensing, virtual and augmented reality, etc.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: June 27, 2023
    Assignee: ACADEMIA SINICA
    Inventors: Din-Ping Tsai, Cheng-Hung Chu, Ren-Jie Lin, Mu-Ku Chen, Pin-Chieh Wu
  • Patent number: 11678764
    Abstract: A sandwich maker includes a base, a first hot-pressing module, a connecting rod set, a second hot-pressing module, a driving motor, and a control module. The first hot-pressing module is assembled to the base. The connecting rod set is pivotally disposed on the base and pivots between a standby position and a heating position. The second hot-pressing module is assembled to the connecting rod set, and is moved between the standby position and the heating position driven by the connecting rod set. At the standby position, the second hot-pressing module is far away from the first hot-pressing module. At the heating position, the second hot-pressing module correspondingly covers the first hot-pressing module. The driving motor is connected to and drives the connecting rod set. The control module is electrically connected to and controls the first hot-pressing module, the second hot-pressing module, and the driving motor.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: June 20, 2023
    Assignee: PRESIDENT CHAIN STORE CORP
    Inventors: Yu-Chieh Wu, I-Ting Chang
  • Patent number: 11670853
    Abstract: An antenna structure includes a ground element, a dielectric substrate, a first radiation element, a second radiation element, a third radiation element, a fourth radiation element, a fifth radiation element, a sixth radiation element, and a seventh radiation element. The dielectric substrate has a first surface and a second surface. The first radiation element and the third radiation element are coupled to a first feeding point. The second radiation element and the fourth radiation element are coupled to the ground element. The first radiation element, the second radiation element, the third radiation element, and the fourth radiation element are on the first surface. The fifth radiation element is coupled to a second feeding point. The sixth radiation element and the seventh radiation element are coupled to the fifth radiation element. The fifth radiation element, the sixth radiation element, and the seventh radiation element are on the second surface.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: June 6, 2023
    Assignee: WISTRON CORP.
    Inventors: Yu-Liang Wang, Yu-Chia Chang, Jung-Chin Hsieh, Wen-Chieh Wu
  • Publication number: 20230168533
    Abstract: The present invention discloses a light redirecting film, a polarizer with the light redirecting film, and a display comprising the polarizer. The light redirecting film includes a light redistribution layer, and a light guide layer disposed on the light redistribution layer. The light redistribution layer includes a plurality of strip-shaped micro prisms extending along a first direction and arranged at intervals and a plurality of diffraction gratings arranged at bottoms of the intervals between the adjacent strip-shaped micro prisms, wherein each of the strip-shaped micro prisms has at least one inclined light-guide surface, and the bottom of each interval has at least one set of diffraction gratings, and the light guide layer is in contact with the strip-shaped micro prisms and the diffraction gratings.
    Type: Application
    Filed: March 29, 2022
    Publication date: June 1, 2023
    Applicant: BenQ Materials Corporation
    Inventors: Cyun-Tai Hong, Yu-Da Chen, Hsu-Cheng Cheng, Meng-Chieh Wu, Chuen-Nan Shen, Kuo-Jung Huang
  • Publication number: 20230168446
    Abstract: The present invention discloses a display including a display panel and a light redirecting film disposed on the viewing side of the display panel. The light redirecting film comprises a light redistribution layer, and a light guide layer disposed on the light redistribution layer. The light redistribution layer includes a plurality of strip-shaped micro prisms extending along a first direction and arranged at intervals and a plurality of diffraction gratings arranged at the bottom of the intervals between the adjacent strip-shaped micro prisms, wherein each of the strip-shaped micro prisms has at least one inclined lightguide surface, and the bottom of each interval has at least one set of diffraction gratings, and the light guide layer is in contact with the strip-shaped micro prisms and the diffraction gratings.
    Type: Application
    Filed: March 29, 2022
    Publication date: June 1, 2023
    Applicant: BenQ Materials Corporation
    Inventors: Cyun-Tai Hong, Yu-Da Chen, Hsu-Cheng Cheng, Meng-Chieh Wu, Chuen-Nan Shen, Kuo-Jung Huang, Wei-Jyun Chen, Yu-Jyuan Dai
  • Patent number: 11662504
    Abstract: Electrically tunable metasurfaces including an array of subwavelength metasurface unit elements are presented. The unit elements include a stacked metal-insulator-metal structure within which an active phase change layer is included. A purely insulator, metal, or coexisting metal-insulator phase of the active layer can be electrically controlled to tune an amplitude and phase response of the metasurfaces. In combination with the subwavelengths dimensions of the unit elements, the phase and amplitude response can be controlled in a range from optical wavelengths to millimeter wavelength of incident light. Electrical control of the unit elements can be provided via resistive heating produced by flow of current though a top metal layer of the unit elements. Alternatively, electrical control of the unit elements can be provided via electrical field effect produced by applying a voltage differential between the top and bottom metal layers of the unit elements.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: May 30, 2023
    Assignee: CALIFORNIA INSTITUTE OF TECHNOLOGY
    Inventors: Yonghwi Kim, Pin Chieh Wu, Ruzan Sokhoyan, Kelly W Mauser, Rebecca D Glaudell, Ghazaleh Kafaie Shirmanesh, Harry A Atwater
  • Patent number: 11658065
    Abstract: A method for CMP includes following operations. A metal layer is received. A CMP slurry composition is provided in a CMP apparatus. The CMP slurry composition includes at least a first oxidizer and a second oxidizer different from each other. The first oxidizer is oxidized to form a peroxidant by the second oxidizer. A portion of the metal layer is oxidized to form a first metal oxide by the peroxidant. The first metal oxide is re-oxidized to form a second metal oxide by the second oxidizer.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: May 23, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ji Cui, Fu-Ming Huang, Ting-Kui Chang, Tang-Kuei Chang, Chun-Chieh Lin, Wei-Wei Liang, Chi-Hsiang Shen, Ting-Hsun Chang, Li-Chieh Wu, Hung Yen, Chi-Jen Liu, Liang-Guang Chen, Kei-Wei Chen
  • Patent number: 11646195
    Abstract: The present application discloses a method for fabricating the semiconductor device including providing a substrate in a reaction chamber, forming an untreated silicon nitride film on the substrate, and forming a treated silicon nitride film on the untreated silicon nitride film. Forming the untreated silicon nitride film includes the steps of: (a) supplying a first silicon precursor into the reaction chamber, thereby allowing chemical species from the first silicon precursor to be adsorbed on the substrate, and (b) supplying a first nitrogen precursor into the reaction chamber, thereby nitriding the chemical species to deposit resultant silicon nitride. The step (a) and the step (b) are sequentially and repeatedly performed to form the untreated silicon nitride film.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: May 9, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Shih-En Lin, Wei-Zeng Wu, Wei-Lun Zeng, Wen-Chieh Wu
  • Publication number: 20230082084
    Abstract: A method for CMP includes following operations. A metal stack is received. The metal layer stack includes at least a first metal layer and a second metal layer, and a top surface of the first metal layer and a top surface of the second metal layer are exposed. A protecting layer is formed over the second metal layer. A portion of the first metal layer is etched. The protecting layer protects the second metal layer during the etching of the portion of the first metal layer. A top surface of the etched first metal layer is lower than a top surface of the protecting layer. The protecting layer is removed from the second metal layer.
    Type: Application
    Filed: November 21, 2022
    Publication date: March 16, 2023
    Inventors: JI CUI, FU-MING HUANG, TING-KUI CHANG, TANG-KUEI CHANG, CHUN-CHIEH LIN, WEI-WEI LIANG, LIANG-GUANG CHEN, KEI-WEI CHEN, HUNG YEN, TING-HSUN CHANG, CHI-HSIANG SHEN, LI-CHIEH WU, CHI-JEN LIU
  • Publication number: 20230063605
    Abstract: A pair of locking pliers with an indicatable adjustment device includes a main body which includes a first and a second gripping jaw cooperatively for clamping a workpiece and an indicatory adjustment device configured to fine tune the clamping pressure between the first and the second gripping jaws and having an auxiliary sign which shows different indications in response to the operation of the adjustment device.
    Type: Application
    Filed: January 27, 2022
    Publication date: March 2, 2023
    Inventor: Ming Chieh WU
  • Publication number: 20230048829
    Abstract: Semiconductor structures and methods are provided. An exemplary method according to the present disclosure includes receiving a fin-shaped structure comprising a first channel region and a second channel region, a first and a second dummy gate structures disposed over the first and the second channel regions, respectively. The method also includes removing a portion of the first dummy gate structure, a portion of the first channel region and a portion of the substrate under the first dummy gate structure to form a trench, forming a hybrid dielectric feature in the trench, removing a portion of the hybrid dielectric feature to form an air gap, sealing the air gap, and replacing the second dummy gate structure with a gate stack after sealing the air gap.
    Type: Application
    Filed: August 13, 2021
    Publication date: February 16, 2023
    Inventors: Kai-Hsuan Lee, Shih-Che Lin, Po-Yu Huang, Shih-Chieh Wu, I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
  • Publication number: 20230033570
    Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a metal gate stack over a substrate and an epitaxial structure over the substrate. The semiconductor device structure also includes a conductive contact electrically connected to the epitaxial structure. A topmost surface of the metal gate stack is vertically disposed between a topmost surface of the conductive contact and a bottommost surface of the conductive contact. The semiconductor device structure further includes a first conductive via electrically connected to the metal gate stack. The topmost surface of the conductive contact is vertically disposed between a topmost surface of the first conductive via and a bottommost surface of the first conductive via. In addition, the semiconductor device structure includes a second conductive via electrically connected to the conductive contact.
    Type: Application
    Filed: July 30, 2021
    Publication date: February 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Chieh WU, Pang-Chi Wu, Wang-Jung Hsueh, Chao-Hsun Wang, Kuo-Yi Chao, Mei-Yun Wang, Yi-Chun Chang, Yuan-Tien Tu
  • Publication number: 20230015970
    Abstract: A method includes forming a plurality of first conductive vias over a redistribution layer (RDL); disposing a first die over the RDL and adjacent to the first vias; and forming a plurality of second conductive vias over and electrically connected to the first conductive vias, each of the second conductive vias corresponding to one of the first conductive vias. The method further includes forming a plurality of third conductive vias over the first die; disposing a second die over the first die and adjacent to the third conductive vias; and encapsulating the first die, the second die, the first conductive vias, the second conductive vias and the third conductive vias with a molding material.
    Type: Application
    Filed: July 16, 2021
    Publication date: January 19, 2023
    Inventors: JEN-FU LIU, MING HUNG TSENG, YEN-LIANG LIN, LI-KO YEH, HUI-CHUN CHIANG, CHENG-CHIEH WU
  • Patent number: 11550210
    Abstract: A projecting apparatus is provided, and includes a frame, a light source module, and a microelectromechanical systems (MEMS) module. The frame includes two lateral boards respectively arranged on two opposite sides thereof, and a transverse beam that connects the two lateral boards. Each of the two lateral boards has a guiding slot recessed in a portion thereof. The MEMS module is configured to transmit light emitted from the light source module, and includes a flexible circuit board, a first MEMS unit, and a second MEMS unit, the latter two of which are connected to the flexible circuit board. The first MEMS unit is inserted into the guiding slots of the two lateral boards. The second MEMS unit abuts against the two lateral boards and/or the transverse beam. The first MEMS unit and the second MEMS unit have a predetermined angle there-between by the second frame portion.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: January 10, 2023
    Assignee: MEGA1 COMPANY LTD.
    Inventors: Makoto Masuda, Wen-Chieh Wu, Chang-Wei Huang, Chia-Yu Chang, Chih-Han Yen, Chih-Yu Yang
  • Publication number: 20230005738
    Abstract: In a pattern formation method for a semiconductor device fabrication, an original pattern for manufacturing a photomask is acquired, a modified original pattern is obtained by performing an optical proximity correction on the original pattern, a sub-resolution assist feature (SRAF) seed map with respect to the modified original pattern indicating locations where an image quality is improved by an SRAF pattern is obtained, SRAF patterns are placed around the original pattern, the SRAF patterns and the modified original pattern are output as mask data, and the photo mask is manufactured using the mask data.
    Type: Application
    Filed: March 31, 2022
    Publication date: January 5, 2023
    Inventors: Kenji YAMAZOE, Ping-Chieh WU, Hoi-Tou NG, Kenneth Lik Kin HO
  • Publication number: 20220415737
    Abstract: A semiconductor device includes semiconductor dies and a redistribution structure. The semiconductor dies are encapsulated in an encapsulant. The redistribution structure extends on the encapsulant and electrically connects the semiconductor dies. The redistribution structure includes dielectric layers and redistribution conductive layers alternately stacked. An outermost dielectric layer of the dielectric layers further away from the semiconductor dies is made of a first material. A first dielectric layer of the dielectric layers on which the outermost dielectric layer extends is made of a second material different from the first material. The first material includes at least one material selected from the group consisting of an epoxy resin, a phenolic resin, a polybenzooxazole, and a polyimide having a curing temperature lower than 250° C.
    Type: Application
    Filed: June 25, 2021
    Publication date: December 29, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chieh Wu, Ting Hao Kuo, Kuo-Lung Pan, Po-Yuan Teng, Yu-Chia Lai, Shu-Rong Chun, Mao-Yen Chang, Wei-Kang Hsieh, Pavithra Sriram, Hao-Yi Tsai, Po-Han Wang, Yu-Hsiang Hu, Hung-Jui Kuo
  • Patent number: 11532514
    Abstract: A structure and a formation method of a semiconductor device are provided. The method includes forming a conductive feature over a semiconductor substrate and forming a dielectric layer over the conductive feature. The method also includes forming an opening in the dielectric layer to expose the conductive feature. The method further includes forming a conductive material to overfill the opening. In addition, the method includes thinning the conductive material using a chemical mechanical polishing process. A slurry used in the chemical mechanical polishing process includes an iron-containing oxidizer that oxidizes a portion of the conductive material.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: December 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Chieh Wu, Kuo-Hsiu Wei, Kei-Wei Chen, Tang-Kuei Chang, Chia Hsuan Lee, Jian-Ci Lin
  • Patent number: D991762
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: July 11, 2023
    Inventor: Ming-Chieh Wu