Patents by Inventor Ching-Wen Chiang

Ching-Wen Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145327
    Abstract: A semiconductor device includes a substrate, an interconnect structure, and conductive vias. The substrate has a first side, a second side and a sidewall connecting the first side and the second side, wherein the sidewall includes a first planar sidewall of a first portion of the substrate, a second planar sidewall of a second portion of the substrate and a curved sidewall of a third portion of the substrate, where the first planar sidewall is connected to the second planar sidewall through the curved sidewall. The interconnect structure is located on the first side of the substrate, where a sidewall of the interconnect structure is offset from the second planar sidewall. The conductive vias are located on the interconnect structure, where the interconnect structure is located between the conductive vias and the substrate.
    Type: Application
    Filed: December 27, 2023
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chang-Jung Hsueh, Cheng-Nan Lin, Wan-Yu Chiang, Wei-Hung Lin, Ching-Wen Hsiao, Ming-Da Cheng
  • Patent number: 11956421
    Abstract: Method and apparatus of video coding are disclosed. According to one method, in the decoder side, a predefined Intra mode is assigned to a neighboring block adjacent to the current luma block when the neighboring block satisfies one or more conditions. An MPM (Most Probable Mode) list is derived based on information comprising at least one of neighboring Intra modes. A current Intra mode is derived utilizing the MPM list. The current luma block is decoded according to the current Intra mode According to another method, a predefined Intra mode is assigned to a neighboring block adjacent to the current luma block if the neighboring block is coded in BDPCM (Block-based Delta Pulse Code Modulation) mode, where the predefined Intra mode is set to horizontal mode or vertical mode depending on prediction direction used by the BDPCM mode.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: April 9, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Man-Shu Chiang, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang, Shih-Ta Hsiang
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Patent number: 11929319
    Abstract: Integrated fan-out packages and methods of forming the same are disclosed. An integrated fan-out package includes two dies, an encapsulant, a first metal line and a plurality of dummy vias. The encapsulant is disposed between the two dies. The first metal line is disposed over the two dies and the encapsulant, and electrically connected to the two dies. The plurality of dummy vias is disposed over the encapsulant and aside the first metal line.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu Huang, Han-Ping Pu, Ming-Kai Liu, Ting-Chu Ko, Yung-Ping Chiang, Chang-Wen Huang, Yu-Sheng Hsieh
  • Patent number: 11917185
    Abstract: A method and apparatus of Inter prediction for video coding using Multi-hypothesis (MH) are disclosed. If an MH mode is used for the current block: at least one MH candidate is derived using reduced reference data by adjusting at least one coding-control setting; an Inter candidate list is generated, where the Inter candidate list comprises said at least one MH candidate; and current motion information associated with the current block is encoded using the Inter candidate list at the video encoder side or the current motion information associated with the current block is decoded at the video decoder side using the Merge candidate list. The coding control setting may correspond to prediction direction setting, filter tap setting, block size of reference block to be fetched, reference picture setting or motion limitation setting.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: February 27, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Man-Shu Chiang, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Patent number: 10886593
    Abstract: An antenna package structure comprises a substrate with a first surface and a second surface; a dielectric layer, disposed on the first surface of the substrate comprises at least a impedance matching structure and an interconnection structure; a molding layer, disposed on the dielectric layer comprises a plurality of chips wherein a control chip electrically connects to the impedance matching structure and a plurality of conducting structures; an antenna layer, disposed on the second surface of the substrate comprising at least an antenna electrically connects to the substrate; and a protection layer covers the antenna layer.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: January 5, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ching-Wen Chiang, Yen-Cheng Kuan, Chia-Jen Liang
  • Patent number: 10707835
    Abstract: A wireless receiving device is provided. The wireless receiving device includes a first passive mixer and a common gate amplifier. The first passive mixer receives an oscillation signal. The common gate amplifier is coupled to the first passive mixer, and automatically adjusts the input impedance of the common gate amplifier according to the oscillation frequency of the oscillation signal.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: July 7, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chia-Jen Liang, Yen-Cheng Kuan, Ching-Wen Chiang, Mau-Chung Chang
  • Publication number: 20200203817
    Abstract: An antenna package structure comprises a substrate with a first surface and a second surface; a dielectric layer, disposed on the first surface of the substrate comprises at least a impedance matching structure and an interconnection structure; a molding layer, disposed on the dielectric layer comprises a plurality of chips wherein a control chip electrically connects to the impedance matching structure and a plurality of conducting structures; an antenna layer, disposed on the second surface of the substrate comprising at least an antenna electrically connects to the substrate; and a protection layer covers the antenna layer.
    Type: Application
    Filed: December 26, 2018
    Publication date: June 25, 2020
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ching-Wen CHIANG, Yen-Cheng KUAN, Chia-Jen LIANG
  • Publication number: 20200195231
    Abstract: A wireless receiving device is provided. The wireless receiving device includes a first passive mixer and a common gate amplifier. The first passive mixer receives an oscillation signal. The common gate amplifier is coupled to the first passive mixer, and automatically adjusts the input impedance of the common gate amplifier according to the oscillation frequency of the oscillation signal.
    Type: Application
    Filed: December 26, 2018
    Publication date: June 18, 2020
    Inventors: Chia-Jen LIANG, Yen-Cheng KUAN, Ching-Wen CHIANG, Mau-Chung CHANG
  • Patent number: 10566299
    Abstract: Method for manufacturing a multi-band antenna package structure includes providing a first temporary substrate; forming a first dielectric material layer, and first metal patterns; forming at least one metal via; forming at least one metal pillar, and disposing an integrated circuit chip; forming a molding layer; thinning down the molding layer thus forming an integrated circuit chip layer; forming a first redistribution layer; forming a first antenna unit layer; forming a first protection layer, thus a first stacked structure formed; removing the first temporary substrate, and facing down the first stacked structure to adhere it on a second temporary substrate with a second glue layer; forming a second redistribution layer; forming a second protection layer; forming bump balls, thus a second stacked structure formed; removing the second temporary substrate with the second glue layer, facing down and mounting the second stacked structure on a substrate through the bump balls.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: February 18, 2020
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Ching-Wen Chiang, Yen-Cheng Kuan, Chia-Jen Liang, Chien-Te Yu
  • Publication number: 20190333883
    Abstract: Method for manufacturing a multi-band antenna package structure includes providing a first temporary substrate; forming a first dielectric material layer, and first metal patterns; forming at least one metal via; forming at least one metal pillar, and disposing an integrated circuit chip; forming a molding layer; thinning down the molding layer thus forming an integrated circuit chip layer; forming a first redistribution layer; forming a first antenna unit layer; forming a first protection layer, thus a first stacked structure formed; removing the first temporary substrate, and facing down the first stacked structure to adhere it on a second temporary substrate with a second glue layer; forming a second redistribution layer; forming a second protection layer; forming bump balls, thus a second stacked structure formed; removing the second temporary substrate with the second glue layer, facing down and mounting the second stacked structure on a substrate through the bump balls.
    Type: Application
    Filed: July 8, 2019
    Publication date: October 31, 2019
    Inventors: CHING-WEN CHIANG, YEN-CHENG KUAN, CHIA-JEN LIANG, CHIEN-TE YU
  • Patent number: 10424550
    Abstract: A multi-band antenna package structure includes a first redistribution layer; an integrated circuit layer, formed on the first redistribution layer, comprising at least one metal via, at least one metal pillar, an integrated circuit chip, and a molding layer, wherein the molding layer is used to fill openings formed by the metal via, the metal pillar and the integrated circuit chip which are disposed on the first redistribution layer, the metal via is electrically connected to one of the first metal patterns of the first redistribution layer; a second redistribution layer, formed on the integrated circuit layer; and a first antenna unit layer, comprising a first dielectric layer and third metal patterns formed in openings of the first dielectric layer, wherein at least one of the third metal patterns is electrically connected to one of the second metal patterns, and the third metal patterns form a first antenna unit.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: September 24, 2019
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Ching-Wen Chiang, Yen-Cheng Kuan, Chia-Jen Liang, Chien-Te Yu
  • Patent number: 10361154
    Abstract: A variable inductor which comprises a primary conductor, first and second secondary conductors and one or more switch. The primary conductor has a first node and a second node, wherein the first node is used to connect a first external component and the second node is used to connect a second external component. The first and second secondary conductors magnetically couple to the primary conductor. The one or more switch has two sides connected to the first or second secondary conductor, respectively. The first and second secondary conductors are formed a single-loop structure with two or more changeable current paths which are operated by the states of the one or more switch. An integrated circuit using the variable inductor is also introduced.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: July 23, 2019
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Chia-Jen Liang, Yen-Cheng Kuan, Ching-Wen Chiang, Chien-Te Yu
  • Publication number: 20190189572
    Abstract: A multi-band antenna package structure includes a first redistribution layer; an integrated circuit layer, formed on the first redistribution layer, comprising at least one metal via, at least one metal pillar, an integrated circuit chip, and a molding layer, wherein the molding layer is used to fill openings formed by the metal via, the metal pillar and the integrated circuit chip which are disposed on the first redistribution layer, the metal via is electrically connected to one of the first metal patterns of the first redistribution layer; a second redistribution layer, formed on the integrated circuit layer; and a first antenna unit layer, comprising a first dielectric layer and third metal patterns formed in openings of the first dielectric layer, wherein at least one of the third metal patterns is electrically connected to one of the second metal patterns, and the third metal patterns form a first antenna unit.
    Type: Application
    Filed: December 19, 2017
    Publication date: June 20, 2019
    Inventors: CHING-WEN CHIANG, YEN-CHENG KUAN, CHIA-JEN LIANG, CHIEN-TE YU
  • Publication number: 20190189342
    Abstract: A variable inductor comprises a primary conductor, a first secondary conductor and one or more switch. The primary conductor has a first node and a second node, wherein the first node is used to connect a first external component and the second node is used to connect a second external component. The first secondary conductor magnetically couples to the primary conductor. The one or more switch has two sides connected to the first secondary conductor, respectively. The first secondary conductor is formed a single-loop structure with two or more changeable current paths which are operated by the states of the one or more switch. An integrated circuit using the variable inductor is also introduced.
    Type: Application
    Filed: December 20, 2017
    Publication date: June 20, 2019
    Inventors: CHIA-JEN LIANG, YEN-CHENG KUAN, CHING-WEN CHIANG, CHIEN-TE YU
  • Publication number: 20190189556
    Abstract: A variable inductor which comprises a primary conductor, first and second secondary conductors and one or more switch. The primary conductor has a first node and a second node, wherein the first node is used to connect a first external component and the second node is used to connect a second external component. The first and second secondary conductors magnetically couple to the primary conductor. The one or more switch has two sides connected to the first or second secondary conductor, respectively. The first and second secondary conductors are formed a single-loop structure with two or more changeable current paths which are operated by the states of the one or more switch. An integrated circuit using the variable inductor is also introduced.
    Type: Application
    Filed: December 20, 2017
    Publication date: June 20, 2019
    Inventors: CHIA-JEN LIANG, YEN-CHENG KUAN, CHING-WEN CHIANG, CHIEN-TE YU
  • Patent number: 10298182
    Abstract: A radio frequency amplifier comprises a transistor, a transformer and a variable capacitor. The transistor has an input terminal, an output terminal and a control terminal. The transformer has a first coil conductor and a second coil conductor. The first coil conductor magnetically couples to the second coil conductor. The second coil conductor connects to the control terminal. The first coil conductor connects to the input terminal. The variable capacitor connects in parallel with the second coil conductor. An integrated circuit using the radio frequency amplifier is also introduced.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: May 21, 2019
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Chia-Jen Liang, Yen-Cheng Kuan, Ching-Wen Chiang, Hung-Ting Chou
  • Patent number: 10277170
    Abstract: A radio frequency amplifier comprises a transistor, a transformer and a variable capacitor. The transistor has an input terminal, an output terminal and a control terminal. The transformer has a first coil conductor and a second coil conductor. The first coil conductor magnetically couples to the second coil conductor. The second coil conductor connects to the control terminal. The first coil conductor connects to the input terminal. The variable capacitor connects in parallel with the second coil conductor. The radio frequency amplifier is configured to be an input or output stage of an integrated circuit. An integrated circuit using the radio frequency amplifier is also introduced.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: April 30, 2019
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Chia-Jen Liang, Yen-Cheng Kuan, Ching-Wen Chiang, Hung-Ting Chou
  • Patent number: 10249562
    Abstract: A method for fabricating a package structure is provided, which includes the steps of: providing a carrier having a recess; disposing an electronic element in the recess of the carrier; forming an insulating layer in the recess to encapsulate the electronic element; forming a circuit structure on the carrier, wherein the circuit structure is electrically connected to the electronic element; forming a plurality of through holes penetrating the carrier; and forming a conductive material in the through holes to form a plurality of conductors, wherein the conductors are electrically connected to the circuit structure. By using the carrier as a substrate body, the present invention avoids warping of the package structure.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: April 2, 2019
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Ching-Wen Chiang, Kuang-Hsin Chen, Hsien-Wen Chen
  • Patent number: 10236227
    Abstract: An electronic package is provided, including a circuit portion, an electronic element disposed on the circuit portion and a lid member disposed on the circuit portion to cover the electronic element. A separation portion is formed between the lid member and the electronic element. The lid member facilitates to prevent warping of the overall package structure. The invention further provides a method for fabricating the electronic package.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: March 19, 2019
    Assignee: Siliconware Prescision Industries Co., Ltd.
    Inventors: Lung-Shan Chuang, Ching-Wen Chiang, Tzung-Yen Wu, Chun-Hung Lu