Abstract: An electronic package is provided, including a circuit portion, an electronic element disposed on the circuit portion and a lid member disposed on the circuit portion to cover the electronic element. A separation portion is formed between the lid member and the electronic element. The lid member facilitates to prevent warping of the overall package structure. The invention further provides a method for fabricating the electronic package.

Abstract: A method of fabricating an electronic package is provided, including: providing a carrier body having a first surface formed with a plurality of recessed portions, and a second surface opposing the first surface and interconnecting with the recessed portions; forming on the first surface of the carrier body an electronic structure that has a plurality of conductive elements received in the recessed portions correspondingly; and removing portion of the carrier body, with the conductive elements exposed from the second surface of the carrier body. Therefore, the carrier body is retained, and the fabrication cost is reduced since temporary material is required. The present invention further provides the electronic package thus fabricated.

Abstract: A substrate structure is provided, which includes: a substrate body having a plurality of conductive pads; an insulating layer formed on the substrate body and exposing the conductive pads; a plurality of conductive vias formed in the insulating layer and electrically connected to the conductive pads; a plurality of circuits formed on the conductive vias and in the insulating layer, wherein the circuits are greater in width than the conductive vias; and a plurality of conductive posts formed on the circuits and the insulating layer, wherein each of the conductive posts has a width greater than or equal to that of each of the circuits. The conductive vias, the circuits and the conductive posts are integrally formed. As such, micro-chips or fine-pitch conductive pads can be electrically connected to the substrate structure in a flip-chip manner.

Abstract: A substrate structure is provided, which includes: a substrate body having a first surface and a second surface opposite to the first surface; and a plurality of conductive posts disposed on the first surface of the substrate body and electrically connected to the substrate body. By replacing conventional through silicon vias (TSVs) with the conductive posts, the present disclosure greatly reduces the fabrication cost. The present disclosure further provides an electronic package having the substrate structure and a method for fabricating the electronic package.

Abstract: A multi-band antenna package structure includes a first redistribution layer; an integrated circuit layer, formed on the first redistribution layer, comprising at least one metal via, at least one metal pillar, an integrated circuit chip, and a molding layer, wherein the molding layer is used to fill openings formed by the metal via, the metal pillar and the integrated circuit chip which are disposed on the first redistribution layer, the metal via is electrically connected to one of the first metal patterns of the first redistribution layer; a second redistribution layer, formed on the integrated circuit layer; and a first antenna unit layer, comprising a first dielectric layer and third metal patterns formed in openings of the first dielectric layer, wherein at least one of the third metal patterns is electrically connected to one of the second metal patterns, and the third metal patterns form a first antenna unit.

Abstract: A substrate structure is provided, which includes: a substrate body having opposite first and second surfaces; a plurality of conductive posts formed on the first surface of the substrate body and electrically connected to the substrate body; and a dielectric layer formed on the first surface of the substrate body for encapsulating the conductive posts, wherein one end surfaces of the conductive posts are exposed from the dielectric layer. Therefore, the present invention replaces the conventional silicon substrate with the dielectric layer so as to eliminate the need to fabricate the conventional TSVs (Through Silicon Vias) and thereby greatly reduce the fabrication cost. The present invention further provides an electronic package having the substrate structure and a fabrication method thereof.

Abstract: A substrate structure is provided, which includes: a substrate body having a plurality of conductive pads; an insulating layer formed on the substrate body and exposing the conductive pads; a plurality of conductive vias formed in the insulating layer and electrically connected to the conductive pads; a plurality of circuits formed on the conductive vias and in the insulating layer, wherein the circuits are greater in width than the conductive vias; and a plurality of conductive posts formed on the circuits and the insulating layer, wherein each of the conductive posts has a width greater than or equal to that of each of the circuits. The conductive vias, the circuits and the conductive posts are integrally formed. As such, micro-chips or fine-pitch conductive pads can be electrically connected to the substrate structure in a flip-chip manner.

Abstract: A substrate structure is provided, which includes: a substrate body having a plurality of conductive pads; an insulating layer formed on the substrate body and exposing the conductive pads; a plurality of conductive vias formed in the insulating layer and electrically connected to the conductive pads; a plurality of circuits formed on the conductive vias and in the insulating layer, wherein the circuits are greater in width than the conductive vias; and a plurality of conductive posts formed on the circuits and the insulating layer, wherein each of the conductive posts has a width greater than or equal to that of each of the circuits. The conductive vias, the circuits and the conductive posts are integrally formed. As such, micro-chips or fine-pitch conductive pads can be electrically connected to the substrate structure in a flip-chip manner.

Abstract: A method of fabricating an electronic package is provided, including: providing a carrier body having a first surface formed with a plurality of recessed portions, and a second surface opposing the first surface and interconnecting with the recessed portions; forming on the first surface of the carrier body an electronic structure that has a plurality of conductive elements received in the recessed portions correspondingly; and removing portion of the carrier body, with the conductive elements exposed from the second surface of the carrier body. Therefore, the carrier body is retained, and the fabrication cost is reduced since temporary material is required. The present invention further provides the electronic package thus fabricated.

Abstract: A substrate structure is provided, which includes: a substrate body having a first surface and a second surface opposite to the first surface; and a plurality of conductive posts disposed on the first surface of the substrate body and electrically connected to the substrate body. By replacing conventional through silicon vias (TSVs) with the conductive posts, the present disclosure greatly reduces the fabrication cost. The present disclosure further provides an electronic package having the substrate structure and a method for fabricating the electronic package.

Abstract: A met of fabricating an electronic package is provided, including: providing a carrier body haying a first surface formed with a plurality of recessed portions, and a second surface opposing the first surface and interconnecting with the recessed portions; forming on the first surface of the carrier body an electronic structure that has a plurality of conductive elements received in the recessed portions correspondingly; and removing a portion of the carrier body, with the conductive elements exposed from the second surface of the carrier body. Therefore, the carrier body is retained, and the fabrication cost is reduced since no temporary material is required. The present invention further provides the electronic package thus fabricated.

Abstract: A substrate structure is provided, which includes: a substrate body having a first surface and a second surface opposite to the first surface; and a plurality of conductive posts disposed on the first surface of the substrate body and electrically connected to the substrate body. By replacing conventional through silicon vias (TSVs) with the conductive posts, the present disclosure greatly reduces the fabrication cost. The present disclosure further provides an electronic package having the substrate structure and a method for fabricating the electronic package.

Abstract: A semiconductor package is provided, including: an insulating base body having a first surface with an opening and a second surface opposite to the first surface; an insulating extending body extending outward from an edge of the first surface of the insulating base body, wherein the insulating extending body is less in thickness than the insulating base body; an electronic element having opposite active and inactive surfaces and disposed in the opening with its inactive surface facing the insulating base body; a dielectric layer formed in the opening of the insulating base body and on the first surface of the insulating base body, the insulating extending body and the active surface of the electronic element; and a circuit layer formed on the dielectric layer and electrically connected to the electronic element. The configuration of the insulating layer of the invention facilitates to enhance the overall structural rigidity of the package.

Abstract: A substrate structure is provided, which includes: a substrate body having a first surface and a second surface opposite to the first surface; and a plurality of conductive posts disposed on the first surface of the substrate body and electrically connected to the substrate body. By replacing conventional through silicon vias (TSVs) with the conductive posts, the present disclosure greatly reduces the fabrication cost. The present disclosure further provides an electronic package having the substrate structure and a method for fabricating the electronic package.

Abstract: A semiconductor package is provided, including: an insulating base body having a first surface with an opening and a second surface opposite to the first surface; an insulating extending body extending outward from an edge of the first surface of the insulating base body, wherein the insulating extending body is less in thickness than the insulating base body; an electronic element having opposite active and inactive surfaces and disposed in the opening with its inactive surface facing the insulating base body; a dielectric layer formed in the opening of the insulating base body and on the first surface of the insulating base body, the insulating extending body and the active surface of the electronic element; and a circuit layer formed on the dielectric layer and electrically connected to the electronic element. The configuration of the insulating layer of the invention facilitates to enhance the overall structural rigidity of the package.

Abstract: A met of fabricating an electronic package is provided, g: providing a carrier body haying a first surface formed with a plurality of recessed portions, and a second surface opposing the first surface and interconnecting with the recessed portions; forming on the first surface of the carrier body an electronic structure that has a plurality of conductive elements received in the recessed portions correspondingly; and removing a portion of the carrier body, with the conductive elements exposed from the second surface of the carrier body. Therefore, the carrier body is retained, and the fabrication cost is reduced since no temporary material is required. The present invention further provides the electronic package thus fabricated.

Abstract: A semiconductor package is provided, including: an insulating base body having a first surface with an opening and a second surface opposite to the first surface; an insulating extending body extending outward from an edge of the first surface of the insulating base body, wherein the insulating extending body is less in thickness than the insulating base body; an electronic element having opposite active and inactive surfaces and disposed in the opening with its inactive surface facing the insulating base body; a dielectric layer formed in the opening of the insulating base body and on the first surface of the insulating base body, the insulating extending body and the active surface of the electronic element; and a circuit layer formed on the dielectric layer and electrically connected to the electronic element. The configuration of the insulating layer of the invention facilitates to enhance the overall structural rigidity of the package.

Abstract: A met of fabricating an electronic package is provided, g: providing a carrier body haying a first surface formed with a plurality of recessed portions, and a second surface opposing the first surface and interconnecting with the recessed portions; forming on the first surface of the carrier body an electronic structure that has a plurality of conductive elements received in the recessed portions correspondingly; and removing a portion of the carrier body, with the conductive elements exposed from the second surface of the carrier body. Therefore, the carrier body is retained, and the fabrication cost is reduced since no temporary material is required. The present invention further provides the electronic package thus fabricated.

Abstract: A substrate structure is provided, which includes: a substrate body having a plurality of conductive pads; an insulating layer formed on the substrate body and exposing the conductive pads; a plurality of conductive vias formed in the insulating layer and electrically connected to the conductive pads; a plurality of circuits formed on the conductive vias and in the insulating layer, wherein the circuits are greater in width than the conductive vias; and a plurality of conductive posts formed on the circuits and the insulating layer, wherein each of the conductive posts has a width greater than or equal to that of each of the circuits. The conductive vias, the circuits and the conductive posts are integrally formed. As such, micro-chips or fine-pitch conductive pads can be electrically connected to the substrate structure in a flip-chip manner.

Abstract: A substrate structure is provided, which includes: a substrate body having opposite first and second surfaces; a plurality of conductive posts formed on the first surface of the substrate body and electrically connected to the substrate body; and a dielectric layer formed on the first surface of the substrate body for encapsulating the conductive posts, wherein one end surfaces of the conductive posts are exposed from the dielectric layer. Therefore, the present invention replaces the conventional silicon substrate with the dielectric layer so as to eliminate the need to fabricate the conventional TSVs (Through Silicon Vias) and thereby greatly reduce the fabrication cost. The present invention further provides an electronic package having the substrate structure and a fabrication method thereof.