Patents by Inventor Ching-Yu Chen

Ching-Yu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220130670
    Abstract: Strain relief trenches may be formed in a substrate prior to growth of an epitaxial layer on the substrate. The trenches may reduce the stresses and strains on the epitaxial layer that occur during the epitaxial growth process due to differences in material properties (e.g., lattice mismatches, differences in thermal expansion coefficients, and/or the like) between the epitaxial layer material and the substrate material. The stress and strain relief provided by the trenches may reduce or eliminate cracks and/or other types of defects in the epitaxial layer and the substrate, may reduce and/or eliminate bowing and warping of the substrate, may reduce breakage of the substrate, and/or the like. This may increase the center-to-edge quality of the epitaxial layer, may permit epitaxial layers to be grown on larger substrates, and/or the like.
    Type: Application
    Filed: October 27, 2020
    Publication date: April 28, 2022
    Inventors: Yi-Chuan LO, Pravanshu MOHANTA, Jiang-He XIE, Ching Yu CHEN, Ming-Tsung CHEN, Chia-Ling YEH
  • Publication number: 20210376118
    Abstract: Structures and methods for controlling dopant diffusion and activation are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a channel layer; a barrier layer over the channel layer; a gate electrode over the barrier layer; and a doped layer formed between the barrier layer and the gate electrode. The doped layer includes (a) an interface layer in contact with the barrier layer and (b) a main layer between the interface layer and the gate electrode. The doped layer comprises a dopant whose doping concentration in the interface layer is lower than that in the main layer.
    Type: Application
    Filed: August 18, 2021
    Publication date: December 2, 2021
    Inventors: Ching-Yu CHEN, Wei-Ting CHANG, Yu-Shine LIN, Jiang-He XIE
  • Publication number: 20210376308
    Abstract: An electrode plate includes a metal foil, a first active material layer directly disposed on the top surface of the metal foil, and a second active material layer directly disposed on the bottom surface of the metal foil. The crystalline system of the first active material layer is different from that of the second active material layer.
    Type: Application
    Filed: May 27, 2021
    Publication date: December 2, 2021
    Inventors: Sheng-Fa YEH, Deng-Tswen SHIEH, Ching-Yu CHEN, Shih-Chieh LIAO, Hao-Tzu HUANG
  • Patent number: 11121230
    Abstract: Structures and methods for controlling dopant diffusion and activation are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a channel layer; a barrier layer over the channel layer; a gate electrode over the barrier layer; and a doped layer formed between the barrier layer and the gate electrode. The doped layer includes (a) an interface layer in contact with the barrier layer and (b) a main layer between the interface layer and the gate electrode. The doped layer comprises a dopant whose doping concentration in the interface layer is lower than that in the main layer.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: September 14, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ching-Yu Chen, Wei-Ting Chang, Yu-Shine Lin, Jiang-He Xie
  • Publication number: 20210242337
    Abstract: Various embodiments of the present disclosure are directed toward an integrated chip including an undoped layer overlying a substrate. A first barrier layer overlies the undoped layer. A doped layer overlies the first barrier layer. Further, a second barrier layer overlies the first barrier layer, where the second barrier layer is laterally offset from a perimeter of the doped layer by a non-zero distance. The first and second barrier layers comprise a same III-V semiconductor material. A first atomic percentage of a first element within the first barrier layer is less than a second atomic percentage of the first element within the second barrier layer.
    Type: Application
    Filed: May 12, 2020
    Publication date: August 5, 2021
    Inventors: Yun-Hsiang Wang, Chun Lin Tsai, Jiun-Lei Jerry Yu, Po-Chih Chen, Chia-Ling Yeh, Ching Yu Chen
  • Publication number: 20210226040
    Abstract: A high electron mobility transistor (HEMT) device and a method of forming the same are provided. The method includes forming a first III-V compound layer over a substrate. A second III-V compound layer is formed over the first III-V compound layer. The second III-V compound layer has a greater band gap than the first III-V compound layer. A third III-V compound layer is formed over the second III-V compound layer. The third III-V compound layer and the first III-V compound layer comprise a same III-V compound. A passivation layer is formed along a topmost surface and sidewalls of the third III-V compound layer. A fourth III-V compound layer is formed over the second III-V compound layer. The fourth III-V compound layer has a greater band gap than the first III-V compound layer.
    Type: Application
    Filed: April 8, 2021
    Publication date: July 22, 2021
    Inventors: Chia-Ling Yeh, Ching Yu Chen
  • Patent number: 11011614
    Abstract: A high electron mobility transistor (HEMT) device and a method of forming the same are provided. The method includes forming a first III-V compound layer over a substrate. A second III-V compound layer is formed over the first III-V compound layer. The second III-V compound layer has a greater band gap than the first III-V compound layer. A third III-V compound layer is formed over the second III-V compound layer. The third III-V compound layer and the first III-V compound layer comprise a same III-V compound. A passivation layer is formed along a topmost surface and sidewalls of the third III-V compound layer. A fourth III-V compound layer is formed over the second III-V compound layer. The fourth III-V compound layer has a greater band gap than the first III-V compound layer.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: May 18, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Ling Yeh, Ching Yu Chen
  • Patent number: 10989221
    Abstract: A cooling system includes a fan and a system component. The fan includes a plurality of fan blades and configured to rotate in a fan direction. The system component is located downstream of the fan, and includes a cutout for passing of airflow from the fan, and a bridge spanning the cutout. The bridge includes a center section and at least one arm section extending from the center section to an edge of the cutout along a curved path offset towards the fan direction.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: April 27, 2021
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chao-Jung Chen, Yu-Nien Huang, Ching-Yu Chen, Tsung-Ta Li
  • Publication number: 20210099818
    Abstract: A system and a method for evaluating noise cancelling capability are provided, and the system and method are configured to evaluate a noise cancelling capability of an external device. The system includes a mixer, a player, a recorder and a comparator. The mixer receives and mixes a target audio file and a noise audio file and outputs a mix audio file. The player is connected to the mixer for receiving the mix audio file. The player outputs a first audio signal to the external device. The external device cancels the noise of the first audio signal and outputs a second audio signal. The recorder receives the second audio signal and outputs a noise-cancelled audio file. The comparator is connected to the recorder for receiving the noise-cancelled audio file. The comparator compares the noise-cancelled audio file and the target audio file and outputs an evaluation report according to a comparing result.
    Type: Application
    Filed: November 18, 2019
    Publication date: April 1, 2021
    Inventors: Yi-Ching Chen, Ching-Yu Chen, Yun-Chiu Ching
  • Publication number: 20210083279
    Abstract: A fast charging lithium-ion battery includes a positive electrode plate, a negative electrode plate, a separator, and an electrolyte. The positive electrode plate includes a positive current collector and a positive active material layers. The negative electrode plate includes a negative current collector and negative active material layers. The negative active material layers include titanium niobium oxide, lithium titanate, or a combination thereof. The separator is disposed between the positive electrode plate and the negative electrode plate. The electrolyte contacts the positive electrode plate and the negative electrode plate. The negative active material layers have an effective area corresponding to the positive electrode plate. The negative active material layers have a thickness on one surface of the negative current collector. A ratio of the effective area to the thickness is greater than 2×105 mm.
    Type: Application
    Filed: September 18, 2020
    Publication date: March 18, 2021
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Deng-Tswen SHIEH, Sheng-Fa YEH, Shih-Chieh LIAO, Ching-Yu CHEN, Hao-Tzu HUANG
  • Patent number: 10874030
    Abstract: A cold plate base is provided. The cold plate includes a fluid intake region located at a distal end of the cold plate, and a fluid outtake region located at a proximal end of the cold plate that is opposite the distal end. The cold plate also includes a fin region positioned between the fluid intake region and the fluid outtake region. The fin region extends from a base surface of the cold plate base. The cold plate also includes a plurality of protrusions at the fluid intake region. Each of the plurality of protrusions radiates from the fluid intake region to create flow paths across the fin region.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: December 22, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chao-Jung Chen, Yu-Nien Huang, Ching-Yu Chen, Kuo-Wei Lee
  • Patent number: 10856447
    Abstract: A server includes an inner housing disposed within an outer housing such that a channel is defined between them. The inner housing includes a low-power electronic component and a high-power electronic component, and is sealed to protect the components. A first heat sink extends through the inner housing. Heat generated by the low-power electronic component is transferred through an inner portion of the first heat sink to an outer portion of the first heat sink. A second heat sink disposed in the channel is coupled to the high-power electronic component via heat pipes that extend through the inner housing. Heat generated by the high-power electronic component is transferred through the heat pipes to the second heat sink. A fan positioned in the channel causes air to enter the channel through a first vent, flow through the channel, and exit the channel via a second vent to remove the generated heat.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: December 1, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chao-Jung Chen, Yu-Nien Huang, Ching-Yu Chen, Kuo-Wei Lee
  • Patent number: 10782750
    Abstract: The present disclosure describes an intake system for a fan module within a computer system. The intake system includes a cowling positioned in line with an intake path of the fan module. The cowling is configured to direct air into the fan module. The system further includes a remote intake that has a remote inlet, a remote outlet, and a remote conduit. The remote inlet is configured to intake air from around an element that is within the computer system and outside of the intake path of the fan module. The remote outlet is configured to discharge the air from the remote inlet into the intake path of the fan module. The remote conduit is configured to transport the air from the remote inlet to the remote outlet.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: September 22, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chao-Jung Chen, Yu-Nien Huang, Ching-Yu Chen, Yu-Jou Ho
  • Patent number: 10779439
    Abstract: An apparatus for cooling an electronic component is provided. The apparatus includes a heat-absorbing base configured to contact the electronic component within a server device and a heat-dissipating body connected to the heat-absorbing base. The heat-dissipating body includes a heat-dissipating static feature and at least one heat-dissipating dynamic feature. The at least one heat-dissipating dynamic feature is configured to be repositioned about the heat-dissipating static feature to increase a surface area of the heat-dissipating body. Using hinge device and flexible metal conduit connect and transfer heat to them (dynamic and static feature). This apparatus will follow currently assembly process and also not impact the other device assembly method. The more space we have inside the product the more heat we can solve.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: September 15, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chao-Jung Chen, Yu-Nien Huang, Ching-Yu Chen, Erh-Kai Fang
  • Publication number: 20200214177
    Abstract: A dynamic air impedance mechanism is provided which has particular utility in changing the impedance of air flow within servers. The mechanism comprises an air duct having a plurality of vent holes, a control plate defining a plurality of openings, and relative movement between the openings in the control plate and the corresponding vent holes in the air duct to change the impedance of air flow through the server.
    Type: Application
    Filed: May 15, 2019
    Publication date: July 2, 2020
    Inventors: Chao-Jung CHEN, Yu-Nien Huang, Ching-Yu CHEN, Tsung-Ta LI
  • Publication number: 20200214172
    Abstract: A cold plate base is provided. The cold plate includes a fluid intake region located at a distal end of the cold plate, and a fluid outtake region located at a proximal end of the cold plate that is opposite the distal end. The cold plate also includes a fin region positioned between the fluid intake region and the fluid outtake region. The fin region extends from a base surface of the cold plate base. The cold plate also includes a plurality of protrusions at the fluid intake region. Each of the plurality of protrusions radiates from the fluid intake region to create flow paths across the fin region.
    Type: Application
    Filed: April 24, 2019
    Publication date: July 2, 2020
    Inventors: Chao-Jung CHEN, Yu-Nien HUANG, Ching-Yu CHEN, Kuo-Wei LEE
  • Patent number: 10694640
    Abstract: This disclosure relates to connecting a metal hose between a radiator and a cold plate that cools a CPU, or similar electronic heat generating component, whereby the metal hose is connected to the radiator with silicon casings. Waterproof spray plates are also provided to direct any water spray away from the electronic components. A water tray beneath the waterproof spray plates collects any water and directs it to a location outside the chassis.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: June 23, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chao-Jung Chen, Yu-Nien Huang, Ching-Yu Chen, Tsung-Ta Li
  • Publication number: 20200111891
    Abstract: Structures and methods for controlling dopant diffusion and activation are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a channel layer; a barrier layer over the channel layer; a gate electrode over the barrier layer; and a doped layer formed between the barrier layer and the gate electrode. The doped layer includes (a) an interface layer in contact with the barrier layer and (b) a main layer between the interface layer and the gate electrode. The doped layer comprises a dopant whose doping concentration in the interface layer is lower than that in the main layer.
    Type: Application
    Filed: September 19, 2019
    Publication date: April 9, 2020
    Inventors: Ching-Yu Chen, Wei-Ting Chang
  • Publication number: 20200077543
    Abstract: A server includes an inner housing disposed within an outer housing such that a channel is defined between them. The inner housing includes a low-power electronic component and a high-power electronic component, and is sealed to protect the components. A first heat sink extends through the inner housing. Heat generated by the low-power electronic component is transferred through an inner portion of the first heat sink to an outer portion of the first heat sink. A second heat sink disposed in the channel is coupled to the high-power electronic component via heat pipes that extend through the inner housing. Heat generated by the high-power electronic component is transferred through the heat pipes to the second heat sink. A fan positioned in the channel causes air to enter the channel through a first vent, flow through the channel, and exit the channel via a second vent to remove the generated heat.
    Type: Application
    Filed: January 11, 2019
    Publication date: March 5, 2020
    Inventors: Chao-Jung CHEN, Yu-Nien HUANG, Ching-Yu CHEN, Kuo-Wei LEE
  • Publication number: 20200006522
    Abstract: A high electron mobility transistor (HEMT) device and a method of forming the same are provided. The method includes forming a first III-V compound layer over a substrate. A second III-V compound layer is formed over the first III-V compound layer. The second III-V compound layer has a greater band gap than the first III-V compound layer. A third III-V compound layer is formed over the second III-V compound layer. The third III-V compound layer and the first III-V compound layer comprise a same III-V compound. A passivation layer is formed along a topmost surface and sidewalls of the third III-V compound layer. A fourth III-V compound layer is formed over the second III-V compound layer. The fourth III-V compound layer has a greater band gap than the first III-V compound layer.
    Type: Application
    Filed: May 17, 2019
    Publication date: January 2, 2020
    Inventors: Chia-Ling Yeh, Ching Yu Chen