Patents by Inventor Chong Zhang

Chong Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11557579
    Abstract: Microelectronic assemblies, related devices, and methods are disclosed herein. In some embodiments, a microelectronic assembly may include a die having a first surface and an opposing second surface; a capacitor having a surface, wherein the surface of the capacitor is coupled to the first surface of the die; and a conductive pillar coupled to the first surface of the die. In some embodiments, a microelectronic assembly may include a capacitor in a first dielectric layer; a conductive pillar in the first dielectric layer; a first die having a surface in the first dielectric layer; and a second die having a surface in a second dielectric layer, wherein the second dielectric layer is on the first dielectric layer, and wherein the surface of the second die is coupled to the capacitor, to the surface of the first die, and to the conductive pillar.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: January 17, 2023
    Assignee: Intel Corporation
    Inventors: Chong Zhang, Cheng Xu, Junnan Zhao, Ying Wang, Meizi Jiao
  • Patent number: 11552008
    Abstract: Disclosed herein are asymmetric cored integrated circuit (IC) package supports, and related devices and methods. For example, in some embodiments, an IC package support may include a core region having a first face and an opposing second face, a first buildup region at the first face of the core region, and a second buildup region at the second face of the core region. A thickness of the first buildup region may be different than a thickness of the second buildup region. In some embodiments, an inductor may be included in the core region.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: January 10, 2023
    Assignee: Intel Corporation
    Inventors: Lauren Ashley Link, Andrew James Brown, Prithwish Chatterjee, Sai Vadlamani, Ying Wang, Chong Zhang
  • Publication number: 20220402798
    Abstract: A large-flow precious metal channel is provided, which comprises a molten glass mixed-flow stirring section, at least two molten glass heating, clarifying and cooling sections are connected in parallel at one end of the molten glass mixed-flow stirring section, the other end of which is communicated with a liquid supply tank. The channel is mainly used for the clarification and homogenization of large-flow high-temperature molten glass in the production process of 8.5-generation and higher-generation TFT glass, and provides bubble-free and streak-free high-quality molten glass for subsequent float forming or overflow forming processes.
    Type: Application
    Filed: April 19, 2021
    Publication date: December 22, 2022
    Inventors: Shou Peng, Chong Zhang, Yang Jiang, Liangmao Jin, Zhiqiang Cao, Longyue Jiang, Min Guan, Mingliu Zhu, Yuguo Shen
  • Patent number: 11527483
    Abstract: Embodiments herein relate to integrating FIVR switching circuitry into a substrate that has a first side and a second side opposite the first side, where the first side of the substrate to electrically couple with a die and to provide voltage to the die and the second side of the substrate is to couple with an input voltage source. In embodiments, the FIVR switching circuitry may be printed onto the substrate using OFET, CNT, or other transistor technology, or may be included in a separate die that is incorporated within the substrate.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: December 13, 2022
    Assignee: Intel Corporation
    Inventors: Chong Zhang, Krishna Bharath
  • Publication number: 20220390691
    Abstract: A substrate includes a first area in which a laser array chip is disposed. The substrate includes a second area in which a planar lightwave circuit is disposed. The second area is elevated relative to the first area. A trench is formed in the substrate between the first area and the second area. The substrate includes a third area in which an optical fiber alignment device is disposed. The third area is located next to and at a lower elevation than the second area within the substrate. The planar lightwave circuit has optical inputs facing toward and aligned with respective optical outputs of the laser array chip. The planar lightwave circuit has optical outputs facing toward the third area. The optical fiber alignment device is configured to receive optical fibers such that optical cores of the optical fibers respectively align with the optical outputs of the planar lightwave circuit.
    Type: Application
    Filed: August 22, 2022
    Publication date: December 8, 2022
    Inventors: Michael Davenport, Mark Wade, Chong Zhang
  • Patent number: 11521914
    Abstract: Microelectronic assemblies that include a cooling channel, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a surface, a die having a surface, and a fluidic channel between the surface of the die and the surface of the package substrate, wherein a top surface of the fluidic channel is defined by the surface of the die and a bottom surface of the fluidic channel is defined by the surface of the package substrate. In some embodiments, a microelectronic assembly may include a package substrate having a surface; a die having a surface; and an interposer having a fluidic channel between the surface of the die and the surface of the package substrate.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: December 6, 2022
    Assignee: Intel Corporation
    Inventors: Zhimin Wan, Cheng Xu, Yikang Deng, Junnan Zhao, Ying Wang, Chong Zhang, Kyu Oh Lee, Chandra Mohan Jha, Chia-Pin Chiu
  • Publication number: 20220380247
    Abstract: Provided is alkali-free aluminoborosilicate glass. The glass is prepared by the following raw materials in percentage by weight: 60-72% SiO2, 13-18% of Al2O3, 8.5-10% of B2O3, 1-4.5% of MgO, 3-8% of CaO, 1-5% of SrO, 0.5-2% of ZrO2, 1-5% of P2O5, and 0.1-0.5% of SnO2, wherein SiO2+Al2O3 is 76-85%; (MgO+CaO+SrO)/Al2O3 is 0.4-0.7; the total amount of alkaline earth metal oxide is 5-11.5%; B2O3/(B2O3+ZrO2+P2O5) is 0.6-0.9; and (ZrO2+P2O5)/(MgO+CaO+SrO) is 0.15-0.8. The glass has the characteristics such as higher strain point, high Young modulus, high hardness, high specific modulus, proper thermal expansion coefficient, and low thermal shrinkage; the boron volatilization rate is as low as 5.6-10.
    Type: Application
    Filed: April 23, 2021
    Publication date: December 1, 2022
    Inventors: Shou Peng, Chong Zhang, Yuguo Shen, Zhiqiang Cao, Liangmao Jin, Mingliu Zhu
  • Patent number: 11507340
    Abstract: An audio output method applied to an electronic device having a proximity sensor, where the method includes obtaining proximity data of the proximity sensor when the electronic device is coupled to an audio output device and has an audio signal to output, outputting, by an earpiece of the electronic device, the audio signal when the proximity data meets a preset condition, determining a type of the audio output device, and selecting, based on the type of the audio output device, whether to output the audio signal using the audio output device. Hence, an earpiece is enabled to output an audio signal under a specific condition when an electronic device including a mobile phone is coupled to another audio output device, thereby improving user experience.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: November 22, 2022
    Assignee: Honor Device Co., Ltd.
    Inventors: Ning Ding, Chong Zhang, Zhen Liu
  • Patent number: 11500153
    Abstract: A multi-chip package assembly includes a substrate, a first semiconductor chip attached to the substrate, and a second semiconductor chip attached to the substrate, such that a portion of the second semiconductor chip overhangs an edge of the substrate. A first v-groove array for receiving a plurality of optical fibers is present within the portion of the second semiconductor chip that overhangs the edge of the substrate. An optical fiber assembly including the plurality of optical fibers is positioned and secured within the first v-groove array of the second semiconductor chip. The optical fiber assembly includes a second v-groove array configured to align the plurality of optical fibers to the first v-groove array of the second semiconductor chip. An end of each of the plurality of optical fibers is exposed for optical coupling within an optical fiber connector located at a distal end of the optical fiber assembly.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: November 15, 2022
    Assignee: Ayar Labs, Inc.
    Inventors: Roy Edward Meade, Chong Zhang, Haiwei Lu, Chen Li
  • Patent number: 11493663
    Abstract: An aerial-and-ground data combined gravity conversion method includes the following steps: calculate the first estimated ground gravity by the Runge-Kutta format 1, and calculate the first error between the first estimated ground gravity and the measured ground gravity; calculate the second estimated ground gravity by the Runge-Kutta format 2, and calculate the second error between the second estimated ground gravity and the measured ground gravity; and select the smaller one from the first and second errors, use the corresponding Runge-Kutta format as the Runge-Kutta format for gravity conversion, and finish the gravity data conversion using the mentioned Runge-Kutta format.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: November 8, 2022
    Assignee: Chinese Academy of Geological Sciences
    Inventors: Chong Zhang, Qingtian Lyu, Jiayong Yan, Guixiang Meng, Yitao Pu, Hanging Qiao
  • Patent number: 11485238
    Abstract: A vehicle can include a battery architecture configured to provide electrical power to motors, accessories, and other components of the vehicle. The architecture can include a controller coupled to multiple battery units. Each battery unit can include a battery and a battery management system. Additionally, each battery unit can be coupled to a controller and to other battery units. Through the use of redundant coupling and redundant data transmitted to and from the controller, battery units, and other components, the architecture can detect a fault and continue to operate while providing an indication of the fault.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: November 1, 2022
    Assignee: Zoox, Inc.
    Inventors: Kyle Matthew Foley, Robert Alan Ng, Moritz Boecker, Chong Zhang Tao, Vincent Richard Tannahill, Efren Alonzo Cabebe, Derek Redfern
  • Patent number: 11480734
    Abstract: A device providing efficient transformation between an initial optical mode and a second optical mode includes first, second and third elements fabricated on a common substrate. The first element includes first and second active sub-layers supporting initial and final optical modes with efficient mode transformation therebetween. The second element includes a passive waveguide structure supporting a second optical mode. The third element, at least partly butt-coupled to the first element, includes an intermediate waveguide structure supporting an intermediate optical mode. If the final optical mode differs from the second optical mode by more than a predetermined amount, a tapered waveguide structure in the second or third elements facilitates efficient transformation between the intermediate optical mode and the second optical mode. Precise alignment of sub-elements formed in one of the elements, relative to sub-elements formed in another one of the elements, is defined using lithographic alignment marks.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: October 25, 2022
    Assignee: Nexus Photonics, Inc
    Inventors: Hyundai Park, Tin Komljenovic, Chong Zhang, Minh Tran
  • Patent number: 11482471
    Abstract: An integrated circuit package may be formed having a heat transfer fluid chamber, wherein the heat transfer fluid chamber may be positioned to allow a heat transfer fluid to directly contact an integrated circuit device within the integrated circuit package. In one embodiment, a first surface of the integrated circuit device may be electrically attached to a first substrate. The first substrate may then may be electrically attached to a second substrate, such that the integrated circuit device is between the first substrate and the second substrate. The second substrate may include a cavity, wherein the heat transfer fluid chamber may be formed between a second surface of the integrated circuit device and the cavity of the second substrate. Thus, at least a portion of a second surface of the integrated circuit device is exposed to the heat transfer fluid which flows into the heat transfer fluid chamber.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: October 25, 2022
    Assignee: Intel Corporation
    Inventors: Cheng Xu, Junnan Zhao, Zhimin Wan, Ying Wang, Yikang Deng, Chong Zhang, Jiwei Sun, Zhenguo Jiang, Kyu-Oh Lee
  • Publication number: 20220317734
    Abstract: The present disclosure relates to the field of display technology, and proposes an adjustable frame and a foldable display device. The adjustable frame includes a central shaft part, a rotatable frame part, a movable frame part, and an adjustment mechanism. The rotatable frame part is rotatably connected to the central shaft part. The movable frame part is arranged on a side of the rotatable frame part away from the central shaft part. An end of the adjustment mechanism is connected to the central shaft part, and an opposite end of the adjustment mechanism is connected to the movable frame part. The adjusting mechanism is configured to adjust the spacing between the movable frame part and the rotatable frame part with rotation of the rotatable frame part and the movable frame part.
    Type: Application
    Filed: August 28, 2020
    Publication date: October 6, 2022
    Inventors: Chong ZHANG, Baofeng SUN, Yonghong ZHOU, Yanyan YANG, Shangchieh CHU, Pengfei ZHOU, Yanli WANG, Wei LIU, Bo WANG
  • Patent number: 11444042
    Abstract: Disclosed herein are magnetic structures in integrated circuit (IC) package supports, as well as related methods and devices. For example, in some embodiments, an IC package support may include a conductive line and a magnetic structure around a top surface of the conductive line and side surfaces of the conductive line. The magnetic structure may have a tapered shape that narrows toward the conductive line.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: September 13, 2022
    Assignee: Intel Corporation
    Inventors: Andrew James Brown, Ying Wang, Chong Zhang, Lauren Ashley Link, Yikang Deng
  • Patent number: 11439122
    Abstract: A pet water bottle includes a shell, a triggering member, a transmission member and a first sealing member. A cavity for water storage is formed inside the shell, a first recessed region is formed on an outer surface of the shell, and a first through hole communicating with the cavity is arranged on an inner wall of the first recessed region; the first sealing member is arranged in the cavity, at least part of the transmission member is fixed inside the cavity, and the first sealing member is fixed onto the transmission member; the first through hole is in contact with and fully covered by the first sealing member; at least part of the triggering member is fixed outside the shell, and the triggering member and the transmission member are spaced apart from each other; the triggering member is capable of moving in a direction close to the transmission member.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: September 13, 2022
    Assignee: Shanghai Mimeng Network Technology Co., Ltd.
    Inventors: Chong Zhang, Lin Jin, Tao Tong
  • Patent number: 11433419
    Abstract: The present invention provides a draw device. The draw device includes a draw head, a draw opening, a draw tube, at least one pressure hole, and at least one flow guiding channel. The at least one flow guiding channel is respectively arranged corresponding to the at least one pressure hole. Each flow guiding channel communicates with the corresponding pressure hole to take out a drawn liquid inside the pressure hole.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: September 6, 2022
    Assignee: TCL China Star Optoelectronics Technology Co., Ltd.
    Inventor: Chong Zhang
  • Patent number: 11422322
    Abstract: A substrate includes a first area in which a laser array chip is disposed. The substrate includes a second area in which a planar lightwave circuit is disposed. The second area is elevated relative to the first area. A trench is formed in the substrate between the first area and the second area. The substrate includes a third area in which an optical fiber alignment device is disposed. The third area is located next to and at a lower elevation than the second area within the substrate. The planar lightwave circuit has optical inputs facing toward and aligned with respective optical outputs of the laser array chip. The planar lightwave circuit has optical outputs facing toward the third area. The optical fiber alignment device is configured to receive optical fibers such that optical cores of the optical fibers respectively align with the optical outputs of the planar lightwave circuit.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: August 23, 2022
    Assignee: Ayar Labs, Inc.
    Inventors: Michael Davenport, Mark Wade, Chong Zhang
  • Publication number: 20220230800
    Abstract: Techniques are provided for an inductor at a first level interface between a first die and a second die. In an example, the inductor can include a winding and a core disposed inside the winding. The winding can include first conductive traces of a first die, second conductive traces of a second die, and a plurality of connectors configured to connect the first die with the second die. Each connector of the plurality of connecters can be located between a trace of the first conductive traces and a corresponding trace of the second conductive traces.
    Type: Application
    Filed: April 5, 2022
    Publication date: July 21, 2022
    Inventors: Cheng Xu, Yikang Deng, Kyu Oh Lee, Ji Yong Park, Srinivas Venkata Ramanuja Pietambaram, Ying Wang, Chong Zhang, Rui Zhang, Junnan Zhao
  • Patent number: D965209
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: September 27, 2022
    Inventors: Chaoqun Zhou, Chong Zhang