Abstract: Methods, materials and apparatus are described for synthesizing a monolayer or few-layers of graphene. Depositing the graphene can include, in some implementations, flowing hydrogen and carbon feedstock over a catalytic layer formed on a substrate.

Abstract: An electrode includes a first free-standing carbon network, an active material deposited above the first free-standing carbon network, and a second free-standing carbon network covering the active material. The first and second carbon networks are a binder, a conductive additive and a current collector to the electrode.

Abstract: The subject technology relates to a method including steps for disposing a first electrically conductive material on a substrate to form a first layer of electrodes on the substrate, wherein the first layer includes a source electrode and a drain electrode, and printing a film including carbon nanotubes between the source electrode and the drain electrode, thereby defining at least a first interface between the carbon nanotube film and the source electrode and a second interface between the carbon nanotube film and drain electrode. In certain aspects, the method can further include steps for disposing a second electrically conductive material over the first interface between the carbon nanotube film and the source electrode and the second interface between the carbon nanotube film and the drain electrode. In certain aspects, a transistor device is also provided.

Abstract: A method includes combining a coating material and an uncoated particulate core material in a solution having a selected ionic strength. The selected ionic strength promotes coating of the uncoated particulate core material with the coating material to form coated particles; and the coated particles can be collected after formation. The coating material has a higher electrical conductivity than the core material.

Abstract: A method for growing a graphene layer on a metal foil includes placing a vessel into a chemical vapor deposition chamber, the vessel having a metal foil positioned therein. The method includes evacuating the chemical vapor deposition chamber, introducing hydrogen gas into the chamber to achieve a first pressure less than atmospheric pressure, heating the atmosphere in the chamber to anneal the metal foil, introducing methane and hydrogen into the chamber to achieve a second pressure less than atmospheric pressure.

Abstract: RF transistors are fabricated at complete wafer scale using a nanotube deposition technique capable of forming high-density, uniform semiconducting nanotube thin films at complete wafer scale, and electrical characterization reveals that such devices exhibit gigahertz operation, linearity, and large transconductance and current drive.

Abstract: Methods and devices for transparent electronics are disclosed. According to an embodiment, transparent electronics are provided based on transfer printed carbon nanotubes that can be disposed on both rigid and flexible substrates. Methods are provided to enable highly aligned single-walled carbon nanotubes (SWNTs) to be used in transparent electronics for achieving high carrier mobility while using low-temperature processing. According to one method, highly aligned nanotubes can be grown on a first substrate. Then, the aligned nanotubes can be transferred to a rigid or flexible substrate having pre-patterned gate electrodes. Source and drain electrodes can be formed on the transferred nanotubes. The subject devices can be integrated to provide logic gates and analog circuitry for a variety of applications.

Abstract: An electrode for use in an organic optoelectronic device is provided. The electrode includes a thin film of single-wall carbon nanotubes. The film may be deposited on a substrate of the device by using an elastomeric stamp. The film may be enhanced by spin-coating a smoothing layer on the film and/or doping the film to enhance conductivity. Electrodes according to the present invention may have conductivities, transparencies, and other features comparable to other materials typically used as electrodes in optoelectronic devices.

Abstract: Techniques, apparatus and systems are described for wafer-scale processing of aligned nanotube devices and integrated circuits. In one aspect, a method can include growing aligned nanotubes on at least one of a wafer-scale quartz substrate or a wafer-scale sapphire substrate. The method can include transferring the grown aligned nanotubes onto a target substrate. Also, the method can include fabricating at least one device based on the transferred nanotubes.

Abstract: A high performance field-effect transistor includes a substrate, a nanomaterial thin film disposed on the substrate, a source electrode and a drain electrode formed on the nanomaterial thin film, and a channel area defined between the source electrode and the drain electrode. A unitary self-aligned gate electrode extends from the nanomaterial thin film in the channel area between the source electrode and the drain electrode, the gate electrode having an outer dielectric layer and including a foot region and a head region, the foot region in contact with a portion of the nanomaterial thin film in the channel area. A metal layer is disposed over the source electrode, the drain electrode, the head region of the gate electrode, and portions of the nanomaterial thin film proximate the source electrode and the drain electrode in the channel area.

Abstract: A separated carbon nanotube-based active matrix organic light-emitting diode (AMOLED) device including a substrate and transistors. Each transistor includes an individual back gate patterned on the substrate and a gate dielectric layer disposed over the substrate. An active channel including a network of separated semiconducting nanotubes is disposed over a functionalized surface of the gate dielectric layer. A source contact and a drain contact are formed on two ends of the active channel, with the network of separated nanotubes between the source contact and the drain contact. An organic light-emitting diode (OLED) display device is coupled to the drain of one of the transistors. A system includes a display control circuit having a substrate, with scan lines, data lines, and AMOLED devices formed on the substrate, with each AMOLED device coupled to one of the scan lines and one of the data lines.

Abstract: Techniques, apparatus and systems are described for wafer-scale processing of aligned nanotube devices and integrated circuits. In one aspect, a method can include growing aligned nanotubes on at least one of a wafer-scale quartz substrate or a wafer-scale sapphire substrate. The method can include transferring the grown aligned nanotubes onto a target substrate. Also, the method can include fabricating at least one device based on the transferred nanotubes.

Abstract: The present invention relates to various methods of detecting DNA methylation and defected DNA. In one embodiment, the invention provides a nanosensor bound to a probe that is complementary to a DNA methylation sequence.

Abstract: An electrode for a lithium ion battery, the electrode including nanoporous silicon structures, each nanoporous silicon structure defining a multiplicity of pores, a binder, and a conductive substrate. The nanoporous silicon structures are mixed with the binder to form a composition, and the composition is adhered to the conductive substrate to form the electrode. The nanoporous silicon may be, for example, nanoporous silicon nanowires or nanoporous silicon formed by etching a silicon wafer, metallurgical grade silicon, silicon nanoparticles, or silicon prepared from silicon precursors in a plasma or chemical vapor deposition process. The nanoporous silicon structures may be coated or combined with a carbon-containing compound, such as reduced graphene oxide. The electrode has a high specific capacity (e.g., above 1000 mAh/g at current rate of 0.4 A/g, above 1000 mAh/g at a current rate of 2.0 A/g, or above 1400 mAh/g at a current rate of 1.0 A/g).

Abstract: Methods, materials, apparatus and systems are described for implementing high-performance arsenic (As)-doped indium oxide (In2O3) nanowires for transparent electronics, including their implementation in transparent thin-film transistors (TTFTs) and transparent active-matrix organic light-emitting diodes (AMOLED) displays. In one implementation, a method of fabricating n-type dopant-doped metal oxide nanowires includes dispersing nanoparticle catalysts on a Si/SiO2 substrate. n-type dopant-doped metal oxide nanowires are grown on the Si/SiO2 substrate using a laser ablation process.

Abstract: RF transistors are fabricated at complete wafer scale using a nanotube deposition technique capable of forming high-density, uniform semiconducting nanotube thin films at complete wafer scale, and electrical characterization reveals that such devices exhibit gigahertz operation, linearity, and large transconductance and current drive.

Abstract: Techniques, apparatus and systems are described for wafer-scale processing of aligned nanotube devices and integrated circuits. In one aspect, a method can include growing aligned nanotubes on at least one of a wafer-scale quartz substrate or a wafer-scale sapphire substrate. The method can include transferring the grown aligned nanotubes onto a target substrate. Also, the method can include fabricating at least one device based on the transferred nanotubes.

Abstract: Among others, techniques are described for forming nanotubes. In one aspect, a method includes forming a base layer of a transition metal on a substrate. The method also includes heating the substrate with the base layer in a mixture of gases to grow nanotubes on the base layer.

Abstract: Techniques, apparatus and systems are described for wafer-scale processing of aligned nanotube devices and integrated circuits one. In one aspect, a method can include growing aligned nanotubes on at least one of a wafer-scale quartz substrate or a wafer-scale sapphire substrate. The method can include transferring the grown aligned nanotubes onto a target substrate. Also, the method can include fabricating at least one device based on the transferred nanotubes.

Abstract: A high performance field-effect transistor includes a substrate, a nanomaterial thin film disposed on the substrate, a source electrode and a drain electrode formed on the nanomaterial thin film, and a channel area defined between the source electrode and the drain electrode. A unitary self-aligned gate electrode extends from the nanomaterial thin film in the channel area between the source electrode and the drain electrode, the gate electrode having an outer dielectric layer and including a foot region and a head region, the foot region in contact with a portion of the nanomaterial thin film in the channel area. A metal layer is disposed over the source electrode, the drain electrode, the head region of the gate electrode, and portions of the nanomaterial thin film proximate the source electrode and the drain electrode in the channel area.