Patents by Inventor Chun-Chieh Wang

Chun-Chieh Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11545363
    Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: January 3, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yu Lin, Chi-Yu Chou, Hsien-Ming Lee, Huai-Tei Yang, Chun-Chieh Wang, Yueh-Ching Pai, Chi-Jen Yang, Tsung-Ta Tang, Yi-Ting Wang
  • Publication number: 20220415781
    Abstract: A method for forming a semiconductor memory structure includes forming a plurality of conductive wire structures over a semiconductor substrate, and forming a plurality of spacer structures along the sidewalls of the conductive wire structures. Each of the spacer structures includes a first spacer. The method also includes forming a plurality of dielectric strips across the conductive wire structures, forming a plurality of conductive strips over the conductive wire structures and the dielectric strips, performing a patterning process on the conductive strips to form a plurality of conductive pads, and removing the first spacer of each of the spacer structures to form a gap in each of the spacer structures.
    Type: Application
    Filed: June 25, 2021
    Publication date: December 29, 2022
    Inventors: Hung-Jung YAN, Ling-Chun TSENG, Chun-Chieh WANG, Tzu-Ming OU YANG
  • Publication number: 20220400581
    Abstract: A portable electronic device including a first body, a second body, a heat source, a first heat pipe, a second heat pipe, and a heat conducting element is provided. The second body is pivotally connected to the first body. The heat source is disposed in the first body and thermally coupled to the heat source. The second heat pipe is disposed in the first body and thermally coupled to the first heat pipe. The heat conducting element is connected to and thermally coupled to the second body, and the heat conducting element slidably contacts the second heat pipe and is thermally coupled to the second heat pipe.
    Type: Application
    Filed: June 6, 2022
    Publication date: December 15, 2022
    Applicant: Acer Incorporated
    Inventors: Chun-Chieh Wang, Wen-Neng Liao, Cheng-Wen Hsieh, Tsung-Ting Chen
  • Patent number: 11527655
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure formed over a fin structure, and a source/drain (S/D) epitaxial layer formed in the fin structure and adjacent to the gate structure. The S/D epitaxial layer includes a first S/D epitaxial layer and a second epitaxial layer. The semiconductor structure includes a gate spacer formed on a sidewall surface of the gate structure, and the gate spacer is directly over the first S/D epitaxial layer. The semiconductor structure includes a dielectric spacer formed adjacent to the gate spacer, and the dielectric spacer is directly over the second epitaxial layer.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: December 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Chieh Wang, Yu-Ting Lin, Yueh-Ching Pai, Shih-Chieh Chang, Huai-Tei Yang
  • Patent number: 11502601
    Abstract: A control circuit of a power converter is coupled to an output stage and controls it to convert an input voltage into an output voltage and generate an output current. The control circuit includes a ripple generation circuit, a synthesis circuit, an error amplifier, a comparator and a PWM circuit. The ripple generation circuit generates a ripple signal according to an input voltage, an output voltage and output current. The synthesis circuit receives the ripple signal and a first feedback signal related to output voltage to provide a second feedback signal. The error amplifier receives the second feedback signal and a reference voltage to generate an error signal. The comparator receives a ramp signal and error signal to generate a comparison signal. The PWM circuit generates a PWM signal to control output stage according to the comparison signal. A slope of ripple signal is changed with the output current.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: November 15, 2022
    Assignee: UPI SEMICONDUCTOR CORP.
    Inventors: Chih-Lien Chang, Chun-Chieh Wang
  • Publication number: 20220352035
    Abstract: In a method of manufacturing a semiconductor device, semiconductor layers, which are vertically arranged with a space between adjacent semiconductor layers, are provided over a substrate, an interfacial layer is formed around each of the semiconductor layers, a dielectric layer is formed on the interfacial layer around each of the semiconductor layers, a first conductive layer is formed on the dielectric layer, the first conductive layer is removed so that the dielectric layer is exposed, a second conductive layer is formed on the exposed dielectric layer so that the space between adjacent semiconductor layers is not fully filled by the second conductive layer, a third conductive layer is formed on the second conductive layer so that the space between adjacent semiconductor layers is filled by the third conductive layer, and the semiconductor layers are semiconductor wires or sheets.
    Type: Application
    Filed: July 19, 2022
    Publication date: November 3, 2022
    Inventors: Chun Chieh WANG, Yueh-Ching PAI
  • Publication number: 20220342455
    Abstract: A portable electronic device including a first body, a second body, a pivot element, a heat source, a first flexible heat conductive element, and a flip cover is provided. The pivot element is connected to the second body, and the second body is pivotally connected to the first body through the pivot element. The heat source is disposed in the first body. The first flexible heat conductive element is thermally coupled to the heat source and extends toward the pivot element from the heat source. The first flexible heat conductive element passes through the pivot element and extends into the inside of the second body and is thus thermally coupled to the second body. The flip cover is pivotally connected to the first body and located on a moving path of the pivot element.
    Type: Application
    Filed: April 19, 2022
    Publication date: October 27, 2022
    Applicant: Acer Incorporated
    Inventors: Chun-Chieh Wang, Wen-Neng Liao, Cheng-Wen Hsieh, Chuan-Hua Wang, Yi-Ta Huang
  • Publication number: 20220336653
    Abstract: Provided are a gate structure and a method of forming the same. The gate structure includes a gate dielectric layer, a metal layer, and a cluster layer. The metal layer is disposed over the gate dielectric layer. The cluster layer is sandwiched between the metal layer and the gate dielectric layer, wherein the cluster layer at least includes an amorphous silicon layer, an amorphous carbon layer, or an amorphous germanium layer. In addition, a semiconductor device including the gate structure is provided.
    Type: Application
    Filed: June 23, 2022
    Publication date: October 20, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh Wang, Sheng-Wei Yeh, Yueh-Ching Pai, Chi-Jen Yang
  • Publication number: 20220325962
    Abstract: A multi-loop cycling heat dissipation module including a first tank, a first pipe, a second tank, and a second pipe is provided. The first pipe is connected to the first tank to form a first loop, a first working fluid fills the first loop to transfer heat via phase transformation, and a first high-temperature section and a first low-temperature section are formed on the first pipe. The second pipe is connected to the second tank to form a second loop, a second working fluid fills the second loop to transfer heat via phase transformation, and a second high-temperature section and a second low-temperature section are formed on the second pipe. The first high-temperature section is in thermal contact with the second low-temperature section, and the first low-temperature section is in thermal contact with the second high-temperature section.
    Type: Application
    Filed: April 1, 2022
    Publication date: October 13, 2022
    Applicant: Acer Incorporated
    Inventors: Yu-Ming Lin, Wen-Neng Liao, Cheng-Wen Hsieh, Chun-Chieh Wang, Tsung-Ting Chen, Chi-Tai Ho, Kuan-Lin Chen, Jau-Han Ke
  • Patent number: 11454243
    Abstract: A data processing method is proposed, including: sensing, via at least one sensing portion, target information of a target device; receiving and processing, via an electronic device, the target information of the sensing portion to form feature information; processing, via the electronic device, the feature information into a label matrix, and establishing, via an artificial intelligence training method, a target model based on the label matrix; and after the electronic device captures real-time information of the target device, predicting, via the target model, a life limit of the target device, wherein a content of the target information is corresponding to a content of the real-time information. Thus, a good target model is constituted and is advantageous in training artificial intelligence by processing the feature information into the label matrix.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: September 27, 2022
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ming-Hsiang Hsu, Chun-Chieh Wang, Hung-Tsai Wu
  • Publication number: 20220302116
    Abstract: A semiconductor device including a cap layer and a method for forming the same are disclosed. In an embodiment, a method includes epitaxially growing a first semiconductor layer over an N-well; etching the first semiconductor layer to form a first recess; epitaxially growing a second semiconductor layer filling the first recess; etching the second semiconductor layer, the first semiconductor layer, and the N-well to form a first fin; forming a shallow trench isolation region adjacent the first fin; and forming a cap layer over the first fin, the cap layer contacting the second semiconductor layer, forming the cap layer including performing a pre-clean process to remove a native oxide from exposed surfaces of the second semiconductor layer; performing a sublimation process to produce a first precursor; and performing a deposition process wherein material from the first precursor is deposited on the second semiconductor layer to form the cap layer.
    Type: Application
    Filed: June 8, 2022
    Publication date: September 22, 2022
    Inventors: Chun-Chieh Wang, Yueh-Ching Pai, Huai-Tei Yang
  • FAN
    Publication number: 20220290684
    Abstract: A fan adapted for being disposed in an electronic device is provided. The fan includes a hub and a plurality of metal blades respectively extending from the hub. Each of the metal blades has a root portion connected to the hub and an end portion away from the hub, and a mass of the end portion is greater than a mass of the root portion, such that the metal blade is elongated while the fan is rotated.
    Type: Application
    Filed: March 8, 2022
    Publication date: September 15, 2022
    Applicant: Acer Incorporated
    Inventors: Yu-Ming Lin, Wen-Neng Liao, Cheng-Wen Hsieh, Chun-Chieh Wang, Han-Liang Huang, Sheng-Yan Chen, Tsung-Ting Chen
  • Patent number: 11414553
    Abstract: A fouling-proof structure is applicable to synthetic leather or fabric and it includes an alcohol-resistant layer; and a water-based fouling-proof layer disposed on the alcohol-resistant layer, wherein the alcohol-resistant layer is formed by curing an alcohol-resistant combination, and the alcohol-resistant combination comprises polyurethane resin, wherein the water-based fouling-proof layer is formed by curing a water-based fouling-proof combination, and the water-based fouling-proof combination comprises polyurethane resin, water, polymerized siloxanes, water-based PTFE and silicone oil.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: August 16, 2022
    Assignee: JANTEC CORP.
    Inventors: Ching-Hsiang Chang, Kuo-Hsing Yeh, Chun-Chieh Wang
  • Patent number: 11411112
    Abstract: Provided are a gate structure and a method of forming the same. The gate structure includes a gate dielectric layer, a metal layer, and a cluster layer. The metal layer is disposed over the gate dielectric layer. The cluster layer is sandwiched between the metal layer and the gate dielectric layer, wherein the cluster layer at least includes an amorphous silicon layer, an amorphous carbon layer, or an amorphous germanium layer. In addition, a semiconductor device including the gate structure is provided.
    Type: Grant
    Filed: May 31, 2020
    Date of Patent: August 9, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh Wang, Sheng-Wei Yeh, Yueh-Ching Pai, Chi-Jen Yang
  • Patent number: 11410889
    Abstract: In a method of manufacturing a semiconductor device, semiconductor layers, which are vertically arranged with a space between adjacent semiconductor layers, are provided over a substrate, an interfacial layer is formed around each of the semiconductor layers, a dielectric layer is formed on the interfacial layer around each of the semiconductor layers, a first conductive layer is formed on the dielectric layer, the first conductive layer is removed so that the dielectric layer is exposed, a second conductive layer is formed on the exposed dielectric layer so that the space between adjacent semiconductor layers is not fully filled by the second conductive layer, a third conductive layer is formed on the second conductive layer so that the space between adjacent semiconductor layers is filled by the third conductive layer, and the semiconductor layers are semiconductor wires or sheets.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: August 9, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Chieh Wang, Yueh-Ching Pai
  • Patent number: 11398482
    Abstract: A semiconductor device including a cap layer and a method for forming the same are disclosed. In an embodiment, a method includes epitaxially growing a first semiconductor layer over an N-well; etching the first semiconductor layer to form a first recess; epitaxially growing a second semiconductor layer filling the first recess; etching the second semiconductor layer, the first semiconductor layer, and the N-well to form a first fin; forming a shallow trench isolation region adjacent the first fin; and forming a cap layer over the first fin, the cap layer contacting the second semiconductor layer, forming the cap layer including performing a pre-clean process to remove a native oxide from exposed surfaces of the second semiconductor layer; performing a sublimation process to produce a first precursor; and performing a deposition process wherein material from the first precursor is deposited on the second semiconductor layer to form the cap layer.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: July 26, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh Wang, Yueh-Ching Pai, Huai-Tei Yang
  • Publication number: 20220229477
    Abstract: A heat dissipation system of a portable electronic device is provided. The heat dissipation system includes a body and at least one fan. A heat source of the portable electronic device is disposed in the body. The fan is a centrifugal fan disposed in the body. The fan has at least one flow inlet, at least one flow outlet, and at least one spacing portion. The flow outlet faces toward the heat source, and the spacing portion surrounds the flow inlet and abuts against the body, so as to isolate the flow inlet and the heat source in two spaces independent of each other in the body.
    Type: Application
    Filed: January 11, 2022
    Publication date: July 21, 2022
    Applicant: Acer Incorporated
    Inventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Kuang-Hua Lin, Chun-Chieh Wang, Shu-Hao Kuo
  • Publication number: 20220223598
    Abstract: A semiconductor structure and its manufacturing method are provided. A semiconductor structure includes a substrate and several bit lines on the substrate. Each of the bit lines includes a first conductive layer on the substrate, a second conductive layer on the first conductive layer, and a hardmask layer on the second conductive layer. The semiconductor structure further includes several contacts disposed on the substrate and positioned between two adjacent bit lines, wherein the bottom surfaces of the contacts physically contact the substrate. The top surfaces of the contacts are not higher than the top surfaces of the hardmask layers. Each of the contacts includes a bottom contact part on the substrate and a top contact part on the bottom contact part, and a width of a top surface of the top contact part is greater than a width of a top surface of the bottom contact part.
    Type: Application
    Filed: January 11, 2022
    Publication date: July 14, 2022
    Inventors: Tzu-Ming OU YANG, Chun-Chieh WANG, Shu-Ming LEE
  • Publication number: 20220176677
    Abstract: The present invention relates to a composite laminate plate, a housing and a mobile communication device. The composite laminate includes a top metal layer with a through hole and an array antenna, and an area ratio of the array antenna to the through hole meets a specific range, thereby enhancing wave transmissivity of a millimeter wave. Moreover, the composite laminate has a specific material structure, such that it has good mechanical properties and low density. The housing and the mobile communication device made by the composite laminate have advantages of metallic texture, high signal intensity and excellent effect for light weight tendency.
    Type: Application
    Filed: October 8, 2021
    Publication date: June 9, 2022
    Inventors: Yen-Lin HUANG, Pei-Jung TSAI, Li-De WANG, Chun-Chieh WANG
  • Fan
    Patent number: 11339796
    Abstract: A fan blade includes an arch-shaped body, a connecting portion, at least one sheet and at least one reinforcement component. The arch-shaped body has a pressure bearing surface and a negative pressure surface opposite to the pressure bearing surface. The connecting portion is connected to a first end portion of the arch-shaped body. The sheet is connected to the pressure bearing surface or the negative pressure surface. The reinforcement component is connected to the pressure bearing surface. An orthogonal projection of the sheet on the arch-shaped body and an orthogonal projection of the reinforcement component on the arch-shaped body are not overlapped with each other. A fan is also provided.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: May 24, 2022
    Assignee: Acer Incorporated
    Inventors: Chun-Chieh Wang, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin