Abstract: A rotation device includes a base seat, an axle unit and a restoring unit. The axle unit includes an upper axle that extends into the base seat. The restoring unit permits the upper axle to extend therein. The restoring unit is for restoring the upper axle to its original position after the upper axle is rotated.

Abstract: A rotation device includes a base seat, an axle unit, a lower rotating module and an upper rotating module. The axle unit includes an upper axle and a lower axle. The lower rotating module includes a lock unit, and an outer barrel that is disposed in the base seat and that is penetrated by the lower axle. The lock unit includes a lock plate that is sleeved on the lower axle, and a lock member that is mounted to the base seat. The lock plate is formed with a first lock groove. The lock member has a lock portion that is operable to move into the first lock groove. The upper rotating module is disposed in the base seat and is co-rotatably sleeved on the upper axle. The upper rotating module is able to be driven by the upper axle to rotate relative to the lower rotating module.

Abstract: A rotation device includes a base seat, an axle unit and a lock unit. The axle unit extends into the base seat. The lock unit includes a lock plate that is sleeved on the axle unit, and a lock member that is disposed on the base seat. The lock plate is formed with a first lock groove. The lock member has a lock portion that is operable to move into the first lock groove. The lock plate is locked by the lock portion of the lock member when the lock portion moves into the first lock groove, so that the axle unit and the lock plate are not rotatable relative to the base seat.

Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.

Abstract: A semiconductor may include an active region, an epitaxial source/drain formed in and extending above the active region, and a first dielectric layer formed over a portion of the active region. The semiconductor may include a first metal gate and a second metal gate formed in the first dielectric layer, a second dielectric layer formed over the first dielectric layer and the second metal gate, and a titanium layer, without an intervening fluorine residual layer, formed on the metal gate and the epitaxial source/drain. The semiconductor may include a first metal layer formed on top of the titanium on the first metal gate, a second metal layer formed on top of the titanium layer on the epitaxial source/drain, and a third dielectric layer formed on the second dielectric layer. The semiconductor may include first and second vias formed in the third dielectric layer.

Abstract: A multi-shield plate includes a plurality of windows and a plurality of vapor shields mounted to the plurality of windows, wherein each window of the plurality of windows is formed in the plate and extends through an entirety of the plate in a thickness direction. The multi-shield plate further includes a plurality of apertures in the plate, wherein each of the plurality of apertures extends through the entirety of the plate in the thickness direction and, an aperture of the plurality of apertures is aligned with a corresponding window of the plurality of windows along radius of the multi-shield plate.

Abstract: A storage server management system includes a management database for storing rack data and storage server data, wherein the rack data includes rack identifications and coordinates of multiple storage servers and the storage server data includes media access control addresses, model name and rail identifications of the multiple storage servers, multiple racks for containing the multiple storage servers, a dynamic host configuration protocol server for configuring the internet protocol addresses to the multiple storage servers, and a management console for generating a rack location map according to the rack data and the storage server data.

Abstract: A nozzle assembly for use in liquid-dispensing system, the nozzle assembly includes a pipe having lumens; a body, an end of the pipe being mounted to the body; the pipe having a wall and a septum, the wall enclosing a space, the septum dividing the space enclosed by the wall into the lumens; each of the lumens being correspondingly terminated in an orifice such that a liquid is escapable from each lumen through the corresponding orifice and is thereby dispensable from the nozzle assembly.

Abstract: A nozzle assembly for use in liquid-dispensing system, the nozzle assembly including: a body configured to receive a pipe; and the pipe, an end of the pipe being mounted on the body. The pipe includes multiple lumens correspondingly terminated in multiple orifices such that a liquid is escapable from each lumen through the corresponding orifice and is thereby dispensable from the nozzle assembly. The pipe has a first flow-capacity to supply a first volume of the liquid at a first flow-rate and at a first pressure. Each orifice and corresponding lumen has a second flow-capacity to supply a second volume of the liquid at a second flow-rate and at a second pressure.

Abstract: The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.

Abstract: Methods of forming a semiconductor device structure are described. The method includes forming a first conductive feature including a conductive fill material over a substrate, forming an etch stop layer on the conductive fill material, forming an intermetallization dielectric on the etch stop layer, forming an opening in the etch stop layer and the intermetallization dielectric to expose a portion of the conductive fill material, forming a recess in the exposed portion of the conductive fill material, and the opening and the recess together form a rivet-shaped space. The method further includes forming a second conductive feature in the rivet-shaped space and forming a metal nitride layer over the intermetallization dielectric and the second conductive feature. The forming the metal nitride layer includes depositing the metal nitride layer and treating the metal nitride layer with a plasma treatment process.

Abstract: A semiconductor may include an active region, an epitaxial source/drain formed in and extending above the active region, and a first dielectric layer formed over a portion of the active region. The semiconductor may include a first metal gate and a second metal gate formed in the first dielectric layer, a second dielectric layer formed over the first dielectric layer and the second metal gate, and a titanium layer, without an intervening fluorine residual layer, formed on the metal gate and the epitaxial source/drain. The semiconductor may include a first metal layer formed on top of the titanium on the first metal gate, a second metal layer formed on top of the titanium layer on the epitaxial source/drain, and a third dielectric layer formed on the second dielectric layer. The semiconductor may include first and second vias formed in the third dielectric layer.

Abstract: The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.

Abstract: A multi-shield plate includes a plurality of windows and a plurality of vapor shields mounted to the plurality of windows, wherein each window of the plurality of windows is formed in the plate and extends through an entirety of the plate in a thickness direction. The multi-shield plate further includes a plurality of apertures in the plate, wherein each of the plurality of apertures extends through the entirety of the plate in the thickness direction and, an aperture of the plurality of apertures is aligned with a corresponding window of the plurality of windows along radius of the multi-shield plate.

Abstract: An exhaust structure includes a piping section, wherein the piping section has a first inner diameter in a central region of the piping section, the piping section has a second diameter in at least one of an inlet or an outlet, and the second diameter has a same value as the first inner diameter. The exhaust structure further includes a plurality of smoothing layers configured to resist turbulence and condensation produced by a flow of one or more gasses in the piping section.

Abstract: A semiconductor may include an active region, an epitaxial source/drain formed in and extending above the active region, and a first dielectric layer formed over a portion of the active region. The semiconductor may include a first metal gate and a second metal gate formed in the first dielectric layer, a second dielectric layer formed over the first dielectric layer and the second metal gate, and a titanium layer, without an intervening fluorine residual layer, formed on the metal gate and the epitaxial source/drain. The semiconductor may include a first metal layer formed on top of the titanium layer on the first metal gate, a second metal layer formed on top of the titanium layer on the epitaxial source/drain, and a third dielectric layer formed on the second dielectric layer. The semiconductor may include first and second vias formed in the third dielectric layer.

Abstract: Sputtering systems and methods are provided. In an embodiment, a sputtering system includes a chamber configured to receive a substrate, a sputtering target positioned within the chamber, and an electromagnet array over the sputtering target. The electromagnet array includes a plurality of electromagnets.

Abstract: A multi-shield plate includes a plate having a substantially flat upper surface and a substantially flat lower surface, a plurality of first windows formed in the plate and extending through the plate from the upper surface to the lower surface, and a plurality of vapor shields mounted to the plate, each vapor shield of the plurality of vapor shields configured to prevent passage of a vapor through a corresponding window of the plurality of windows. The multi-shield plate includes an aperture formed in the plate, the aperture aligned with a first window of the plurality of windows along an axis corresponding to the upper surface.

Abstract: A method for fault detection in a fabrication facility is provided. The method includes moving a wafer carrier along a predetermined path multiple times using a transportation apparatus. The method also includes collecting data associated with an environmental condition within the wafer carrier or around the wafer carrier using a metrology tool on the predetermined path in a previous movement of the transportation apparatus. The method further includes measuring the environmental condition within the wafer carrier or around the wafer carrier using the metrology tool during the movement of the wafer carrier. In addition, the method includes issuing a warning when the measured environmental condition is outside a range of acceptable values. The range of acceptable values is derived from the data collected in the previous movement of the transportation apparatus.

Abstract: A motor stator has a core and first, second and third hairpin wires. The core has slots, an insertion side and an extension side. Each first hairpin wire has its first hairpin first leg inserted into a third layer of the slots and its first hairpin second leg inserted into a sixth layer of the slots. Each second hairpin wire has its second hairpin first leg inserted into a fourth layer of the slots and its second hairpin second leg inserted into a fifth layer of the slots. Each third hairpin wire has its third hairpin first leg inserted into a first layer of the slots and its third hairpin second leg inserted into a second layer of the slots. At the extension side, a plurality of immediately-adjacent hairpin legs are connected to form first and second winding sets.