Patents by Inventor Chun-Chih Lin

Chun-Chih Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190163070
    Abstract: A method for fault detection in a fabrication system is provided. The method includes transferring a reticle carrier containing a reticle from an original position to a destination position. The method further includes detecting environmental condition in the reticle carrier during the transfer of the reticle carrier using a metrology tool that is positioned at the reticle carrier. The method also includes issuing a warning when the detected environmental condition is outside a range of acceptable values.
    Type: Application
    Filed: January 23, 2018
    Publication date: May 30, 2019
    Inventors: Yao-Yuan SHANG, Kuo-Shu TSENG, Yen-Yu CHEN, Chun-Chih LIN, Yi-Ming DAI
  • Publication number: 20190136369
    Abstract: Sputtering systems and methods are provided. In an embodiment, a sputtering system includes a chamber configured to receive a substrate, a sputtering target positioned within the chamber, and an electromagnet array over the sputtering target. The electromagnet array includes a plurality of electromagnets.
    Type: Application
    Filed: November 8, 2017
    Publication date: May 9, 2019
    Inventors: Hsuan-Chih Chu, Chien-Hsun Pan, Yen-Yu Chen, Chun-Chih Lin
  • Publication number: 20190096834
    Abstract: The present disclosure describes an bonding pad formation method that incorporates an tantalum (Ta) conductive layer to block mobile ionic charges generated during the aluminum-copper (AlCu) metal fill deposition. For example, the method includes forming one or more interconnect layers over a substrate and forming a dielectric over a top interconnect layer of the one or more interconnect layers. A first recess is formed in the dielectric to expose a line or a via from the top interconnect layer. A conductive layer is formed in the first recess to form a second recess that is smaller than the first recess. A barrier metal layer is formed in the second recess to form a third recess that is smaller than the second recess. A metal is formed to fill the third recess.
    Type: Application
    Filed: September 28, 2017
    Publication date: March 28, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih Wei BIH, Chun-Chih LIN, Sheng-Wei YEH, Yen-Yu CHEN, Chih-Wei LIN, Wen-Hao CHENG
  • Publication number: 20190088692
    Abstract: An image sensor includes a substrate having a first region and a second region. The image sensor further includes a dielectric layer over the substrate. The image sensor further includes a conductive layer over the dielectric layer, wherein in the first region the conductive layer has a grid shape and in the second region a portion of the conductive layer is concave toward the substrate. The image sensor further includes a protective layer, wherein the protective layer is over the conductive layer in the first region, and over a top surface and along sidewalls of the conductive layer in the second region.
    Type: Application
    Filed: November 19, 2018
    Publication date: March 21, 2019
    Inventors: Cheng-Yi WU, Chun-Chih LIN, Jian-Shin TSAI, Min-Hui LIN, Wen-Shan CHANG, Yi-Ming LIN, Chao-Ching CHANG, C. H. CHEN, Chin-Szu LEE, Y. T. TSAI
  • Publication number: 20190035653
    Abstract: An exhaust structure includes an intake section including a first high thermal conductivity material, the intake section having an inlet, an output section including a second high thermal conductivity material, the output section having an outlet, and a piping section including a third high thermal conductivity material, the piping section being configured to communicatively couple the intake section with the output section. The exhaust structure provides a high thermal conductivity path from the inlet to the outlet, the high thermal conductivity path including the first high thermal conductivity material, the second high thermal conductivity material, and the third high thermal conductivity material.
    Type: Application
    Filed: September 1, 2017
    Publication date: January 31, 2019
    Inventors: Hsien-Chang HSIEH, Chun-Chih LIN, Tah-te SHIH, Wen-Hsong WU, Chune-Te YANG, Yu-Jen SU
  • Publication number: 20180369836
    Abstract: A nozzle assembly for use in liquid-dispensing system, the nozzle assembly including: a body configured to receive a pipe; and the pipe, an end of the pipe being mounted on the body. The pipe includes multiple lumens correspondingly terminated in multiple orifices such that a liquid is escapable from each lumen through the corresponding orifice and is thereby dispensable from the nozzle assembly. The pipe has a first flow-capacity to supply a first volume of the liquid at a first flow-rate and at a first pressure. Each orifice and corresponding lumen has a second flow-capacity to supply a second volume of the liquid at a second flow-rate and at a second pressure.
    Type: Application
    Filed: February 26, 2018
    Publication date: December 27, 2018
    Inventors: Channing CHAN, Chun-Chih LIN, Kuo-Shu TSENG
  • Publication number: 20180372665
    Abstract: Detection methods for an electroplating process are provided. A detection method includes immersing a substrate into an electrolyte solution to perform an electroplating process. The electrolyte solution includes an additive agent. The detection method also includes immersing a detection device into the electrolyte solution. The detection method further includes applying a first alternating current (AC) or direct current (DC) to the detection device to detect the concentration of the additive agent. In addition, the detection method includes applying a combination of a second AC and a second DC to the detection device to inspect the electrolyte solution. An impurity is detected in the electrolyte solution. The detection method also includes replacing the electrolyte solution containing the impurity with another electrolyte solution.
    Type: Application
    Filed: August 29, 2017
    Publication date: December 27, 2018
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yung-Chang HUANG, Jui-Mu CHO, Chien-Hsun PAN, Chun-Chih LIN
  • Publication number: 20180350614
    Abstract: Methods for enhancing a surface topography of a structure formed on a substrate are provided. In one example, the method includes performing a polishing process on a substrate having a shallow trench isolation structure and a diffusion region, performing a surface topography enhancing process to enlarge a defect in at least one of the shallow trench isolation structure and the diffusion region, inspecting at least one of the shallow trench isolation structure and the diffusion region to detect the enlarged defect, and adjusting a parameter of the polishing process in response to detecting the enlarged defect.
    Type: Application
    Filed: August 25, 2017
    Publication date: December 6, 2018
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Han-Wen Liao, Jun Xiu Liu, Chun-Chih Lin
  • Publication number: 20180350946
    Abstract: A method of fabricating a semiconductor structure includes depositing a dielectric layer over a gate stack, removing a portion of the gate stack to form a trench in the dielectric layer, depositing an insulating layer in the trench, depositing an adhesion layer over the insulating layer, and performing a hydrogen-containing plasma treatment on the adhesion layer.
    Type: Application
    Filed: September 19, 2017
    Publication date: December 6, 2018
    Inventors: Shih Wei BIH, Chun-Chih LIN, Yen-Yu CHEN
  • Publication number: 20180350948
    Abstract: A polysilicon layer is formed over a substrate. The polysilicon layer is etched to form a dummy gate electrode having a top portion with a first lateral dimension and a bottom portion with a second lateral dimension. The first lateral dimension is greater than, or equal to, the second lateral dimension. The dummy gate electrode is replaced with a metal gate electrode.
    Type: Application
    Filed: July 31, 2018
    Publication date: December 6, 2018
    Inventors: Shih Wei Bih, Han-Wen Liao, Xuan-You Yan, Yen-Yu Chen, Chun-Chih Lin
  • Publication number: 20180350640
    Abstract: A multi-shield plate includes a plate having a substantially flat upper surface and a substantially flat lower surface, a plurality of first windows formed in the plate and extending through the plate from the upper surface to the lower surface, and a plurality of vapor shields mounted to the plate, each vapor shield of the plurality of vapor shields configured to prevent passage of a vapor through a corresponding window of the plurality of windows. The multi-shield plate includes an aperture formed in the plate, the aperture aligned with a first window of the plurality of windows along an axis corresponding to the upper surface.
    Type: Application
    Filed: October 31, 2017
    Publication date: December 6, 2018
    Inventors: Ping-Tse LIN, Chun-Chih LIN, Wen-Cheng LIEN, Monica HO
  • Publication number: 20180337203
    Abstract: A method of fabricating an image sensor includes depositing a first dielectric layer over a substrate, removing a portion of the first dielectric layer from the substrate to form a trench, depositing a conductive layer over the first dielectric layer and in the trench, forming a protective layer lining a top surface of the conductive layer and sidewalls and a bottom surface of the groove in the conductive layer, and removing a portion of the conductive layer to form a grid structure. A groove corresponding to the trench is formed in the conductive layer.
    Type: Application
    Filed: May 17, 2017
    Publication date: November 22, 2018
    Inventors: Cheng-Yi WU, Chun-Chih LIN, Jian-Shin TSAI, Min-Hui LIN, Wen-Shan CHANG, Yi-Ming LIN, Chao-Ching CHANG, C. H. CHEN, Chin-Szu LEE, Y. T. TSAI
  • Publication number: 20180333738
    Abstract: A drippage prevention system including: a first automatic control valve (ACV), an input of the first ACV fluidically connected to a source of fluid to be dispensed, the first ACV having a position ranging from fully closed to fully open; a second ACV, an input of the second ACV being fluidically connected to the output of the first ACV, and an output of the second ACV being fluidically connected to a nozzle, the second ACV having positions ranging from fully closed to fully open; a proxy sensor configured to generate a proxy signal representing an indirect measure of a position of the first ACV; and a controller electrically connected to the first and second ACVs and the proxy sensor, the controller being configured to cause the second ACV to close based on the proxy signal and thereby stop flow of the liquid to the nozzle.
    Type: Application
    Filed: May 17, 2017
    Publication date: November 22, 2018
    Inventors: Chien-Hung WANG, Chun-Chih LIN, Chi-Hung LIAO, Yung-Yao LEE, Wei Chang CHENG
  • Patent number: 10134790
    Abstract: A method of fabricating an image sensor includes depositing a first dielectric layer over a substrate, removing a portion of the first dielectric layer from the substrate to form a trench, depositing a conductive layer over the first dielectric layer and in the trench, forming a protective layer lining a top surface of the conductive layer and sidewalls and a bottom surface of the groove in the conductive layer, and removing a portion of the conductive layer to form a grid structure. A groove corresponding to the trench is formed in the conductive layer.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: November 20, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Yi Wu, Chun-Chih Lin, Jian-Shin Tsai, Min-Hui Lin, Wen-Shan Chang, Yi-Ming Lin, Chao-Ching Chang, C. H. Chen, Chin-Szu Lee, Y. T. Tsai
  • Patent number: 10068693
    Abstract: A multi-layer wiring structure includes a first conductive structure, a second conductive structure and an insulating layer. To manufacturing the multi-layer wiring structure, a first conductive structure and a second conductive structure are provided. The first conductive structure and the second conductive structure include a plurality of wiring patterns. Then, the insulating layer is disposed between the first conductive structure and the second conductive structure. The insulting layer is thinner than the first conductive structure or the second conductive structure. The first conductive structure, the insulating layer and the second conductive structure are laminated to form the multi-layer wiring structure. A planar magnetic element having a compact coil manufactured by the method is also provided.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: September 4, 2018
    Assignee: CYNTEC CO., LTD.
    Inventors: Chun-Chih Lin, Yi-Wei Chen, Yi-Ting Lai, Chu-keng Lin, Cheng-Chang Lee
  • Publication number: 20180102418
    Abstract: A polysilicon layer is formed over a substrate. The polysilicon layer is etched to form a dummy gate electrode having a top portion with a first lateral dimension and a bottom portion with a second lateral dimension. The first lateral dimension is greater than, or equal to, the second lateral dimension. The dummy gate electrode is replaced with a metal gate electrode.
    Type: Application
    Filed: January 31, 2017
    Publication date: April 12, 2018
    Inventors: Shih Wei Bih, Han-Wen Liao, Xuan-You Yan, Yen-Yu Chen, Chun-Chih Lin
  • Publication number: 20170287569
    Abstract: An electronic apparatus and a data verification method using the same are provided. The electronic apparatus includes a first read-only memory having first data, a second read-only memory having second data and a controller. A correspondence relation exists between the first data and the second data. The controller is coupled to the first read-only memory and the second read-only memory. The controller reads first sub-data of the first data from the first read-only memory, and reads second sub-data of the second data corresponding to the first sub-data from the second read-only memory according to the correspondence relation. The first sub-data includes to-be-verified data. The controller performs a verification operation to the to-be-verified data according to the first sub-data, the second sub-data and the correspondence relation.
    Type: Application
    Filed: June 29, 2016
    Publication date: October 5, 2017
    Inventors: Jeng-Shiun Liu, Chun-Chih Lin, Tung-Lin Lu
  • Patent number: 9779831
    Abstract: An electronic apparatus and a data verification method using the same are provided. The electronic apparatus includes a first read-only memory having first data, a second read-only memory having second data and a controller. A correspondence relation exists between the first data and the second data. The controller is coupled to the first read-only memory and the second read-only memory. The controller reads first sub-data of the first data from the first read-only memory, and reads second sub-data of the second data corresponding to the first sub-data from the second read-only memory according to the correspondence relation. The first sub-data includes to-be-verified data. The controller perfoi ins a verification operation to the to-be-verified data according to the first sub-data, the second sub-data and the correspondence relation.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: October 3, 2017
    Assignee: Wistron Corporation
    Inventors: Jeng-Shiun Liu, Chun-Chih Lin, Tung-Lin Lu
  • Publication number: 20170277649
    Abstract: An electronic apparatus and a detection method using the same are provided. The electronic apparatus includes a processor, a platform controller, and an auxiliary controller. The processor includes a first bus compatible with a first standard. The platform controller is coupled to the processor, and the processor is connected to peripheral devices of the electronic apparatus through the platform controller or the first bus according to the first standard. The auxiliary controller is coupled to the processor through the first bus, and the processor controls the auxiliary controller through a second bus and the platform controller. The auxiliary controller receives a detection signal to detect the processor, the platform controller, or at least one of the peripheral devices in the electronic apparatus through the first bus compatible with the first standard according to the detection signal.
    Type: Application
    Filed: July 15, 2016
    Publication date: September 28, 2017
    Inventors: Chun-Chih Lin, Tung-Lin Lu
  • Publication number: 20170027061
    Abstract: A multi-layer wiring structure includes a first conductive structure, a second conductive structure and an insulating layer. To manufacturing the multi-layer wiring structure, a first conductive structure and a second conductive structure are provided. The first conductive structure and the second conductive structure include a plurality of wiring patterns. Then, the insulating layer is disposed between the first conductive structure and the second conductive structure. The insulting layer is thinner than the first conductive structure or the second conductive structure. The first conductive structure, the insulating layer and the second conductive structure are laminated to form the multi-layer wiring structure. A planar magnetic element having a compact coil manufactured by the method is also provided.
    Type: Application
    Filed: November 3, 2015
    Publication date: January 26, 2017
    Inventors: Chun-Chih LIN, Yi-Wei CHEN, Yi-Ting LAI, Chu-keng LIN, Cheng-Chang LEE