Abstract: An electronic device is capable of determining a radio communications configuration. The electronic device includes a GPS module arranged for receiving an updated GPS coordinate. A controller is electronically coupled to the GPS module, and arranged for controlling the GPS module to receive the updated GPS coordinate and for determining the radio communications configuration based on the updated GPS coordinate received from the GPS module. A transmitter is electronically coupled to the controller and arranged for transmitting a message from the controller according to the determined radio communications configuration.

Abstract: A method includes etching a gate structure to form a trench extending into the gate structure, wherein sidewalls of the trench comprise a metal oxide material, applying a sidewall treatment process to the sidewalls of the trench, wherein the metal oxide material has been removed as a result of applying the sidewall treatment process and filling the trench with a first dielectric material to form a dielectric region, wherein the dielectric region is in contact with the sidewall of the gate structure.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip has a plurality of gate structures disposed over a substrate. A plurality of metal structures continuously extend from lower surfaces contacting the plurality of gate structures to upper surfaces contacting one or more interconnects within an overlying conductive interconnect layer. The plurality of metal structures are arranged at a first pitch that is larger than a second pitch of the plurality of gate structures.

Abstract: A method for measuring a hole provided in a workpiece is provided and the method comprises: obtaining a three-dimensional point cloud model of the workpiece and a two-dimensional image of the workpiece, defining a first contour in the three-dimensional point cloud model based on an intensity difference of the two-dimensional image, defining a second contour and a third contour respectively based in the first contour, bounding a data point testing region between the second contour and the third contour, respectively defining data point sampling regions along a plurality of cross-section directions of the data point testing region, respectively sampling data points in the data point sampling regions to obtain a turning point set comprising turning points, wherein each of the turning points has the largest turning margin, connecting the turning points which are distributed in the turning point set along a ring direction to obtain an edge of the hole.

Abstract: A method for measuring a hole provided in a workpiece is provided and the method comprises: obtaining a three-dimensional point cloud model of the workpiece and a two-dimensional image of the workpiece, defining a first contour in the three-dimensional point cloud model based on an intensity difference of the two-dimensional image, defining a second contour and a third contour respectively based in the first contour, bounding a data point testing region between the second contour and the third contour, respectively defining data point sampling regions along a plurality of cross-section directions of the data point testing region, respectively sampling data points in the data point sampling regions to obtain a turning point set comprising turning points, wherein each of the turning points has the largest turning margin, connecting the turning points which are distributed in the turning point set along a ring direction to obtain an edge of the hole.

Abstract: A method includes etching a gate structure to form a trench extending into the gate structure, wherein sidewalls of the trench comprise a metal oxide material, applying a sidewall treatment process to the sidewalls of the trench, wherein the metal oxide material has been removed as a result of applying the sidewall treatment process and filling the trench with a first dielectric material to form a dielectric region, wherein the dielectric region is in contact with the sidewall of the gate structure.

Abstract: An etch stop layer is formed over a semiconductor fin and gate stack. The etch stop layer is formed utilizing a series of pulses of precursor materials. A first pulse introduces a first precursor material to the semiconductor fin and gate stack. A second pulse introduces a second precursor material, which is turned into a plasma and then directed towards the semiconductor fin and gate stack in an anisotropic deposition process. As such, a thickness of the etch stop layer along a bottom surface is larger than a thickness of the etch stop layer along sidewalls.

Abstract: In an embodiment, an apparatus includes: a susceptor including substrate pockets; a gas injector disposed over the susceptor, the gas injector having first process regions, the gas injector including a first gas mixing hub and first distribution valves connecting the first gas mixing hub to the first process regions; and a controller connected to the gas injector and the susceptor, the controller being configured to: connect a first precursor material and a carrier gas to the first gas mixing hub; mix the first precursor material and the carrier gas in the first gas mixing hub to produce a first precursor gas; rotate the susceptor to rotate a first substrate disposed in one of the substrate pockets; and while rotating the susceptor, control the first distribution valves to sequentially introduce the first precursor gas at each of the first process regions as the first substrate enters each first process region.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip has a plurality of gate structures disposed over a substrate. A plurality of metal structures continuously extend from lower surfaces contacting the plurality of gate structures to upper surfaces contacting one or more interconnects within an overlying conductive interconnect layer. The plurality of metal structures are arranged at a first pitch that is larger than a second pitch of the plurality of gate structures.

Abstract: A heat dissipation device includes a first fin group, a second fin group, a heat pipe and a base. The base is in thermal contact with a heat source. The heat pipe includes a first pipe part and a second pipe part. The second pipe part is connected with the first pipe part and extended upwardly. The first pipe part is arranged between the base and the second fin group. The second pipe part is penetrated through the first fin group. The distance between a top surface of the first fin group and the base is larger than the distance between a top surface of the second fin group and the base. Since influences of the dissipating area and the wind resistance are taken into consideration, the heat dissipation device has enhanced heat dissipating efficacy.

Abstract: A light source generating device, a projection apparatus and a light source generation method are provided. The light source generating device includes a first light source, an auxiliary light source, a control device, a driver and a current command generator. The first light source generates a first light beam. The auxiliary light source generates an auxiliary light beam corresponding to the first light beam. The control device generates a first driving signal to drive the first light source. The driver generates an auxiliary driving signal to drive the auxiliary light source according to the gate control signal and a current command. The current command generator receives an indication signal, and generates the current command according to the indication signal, wherein the indication signal corresponds to a driving current of the first light source. The invention has an effect of enhancing brightness/chrominance.

Abstract: A method for synchronously optimizing efficiency and energy consumption of a processing machine includes the following steps. A processing parameter and power consumption information of a motor of the processing machine are obtained to establish a characteristic curve of the processing parameter and the power consumption information. A coupling model of the processing parameter and an electricity consumption is established by using a curve fitting method according to the characteristic curve. A processing chipping instruction of the motor, a unit electricity and a processing time cost are obtained. A processing time, an electricity cost and a comprehensive cost of the processing machine are calculated according to the processing chipping instruction of the motor, the unit electricity, the processing time cost and the coupling model to optimize the processing machine.

Abstract: A method for monitoring idle machining of a processing machine includes the following steps. A spindle load current of the processing machine is monitored to generate a load current change state. A cutting vibration signal of the processing machine is monitored to generate a vibration signal change state. A cutting instruction of the processing machine is obtained to generate a processing section change state. A processing time, a cutting time and an idle time are calculated according to the load current change state, the vibration signal change state and the processing section change state.

Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip has a plurality of gate structures arranged over a substrate. A plurality of first MOL (middle-of-line) structures are arranged at a first pitch over the substrate at locations interleaved between the plurality of gate structures. The plurality of first MOL structures connect active regions within the substrate to an overlying metal interconnect layer. A plurality of second MOL structures are arranged at a second pitch over the plurality of gate structures at locations interleaved between the plurality of first MOL structures. The plurality of second MOL structures connect the plurality of gate structures to the metal interconnect layer. The second pitch is different than the first pitch. The different pitches avoid misalignment errors between the plurality of gate structures and the metal interconnect layer.

Abstract: A semiconductor device includes two elongated active regions that include source/drain regions for multiple transistor devices, a first contact layer that includes an electrical connection between the two active regions, a second contact layer that includes a connection between two gate lines, and a gate contact layer that provides connections to the gate lines.

Abstract: The present disclosure illustrates a method of flipping screen image of an electric screen device. The electronic screen device is applicable to a POS system, and includes a mounting base member, a base, a rotation unit configured to movably assemble the mounting base member with the top of the base, and an electronic circuit system disposed inside the mounting base member. A built-in program of the electronic circuit system is activated to sense the electronic screen by a trigger manner or a time counting manner, and the built-in program receives a sensing signal from the sensor to determine whether the electronic screen is flipped, determining whether the window image shown on screen image of the electronic screen matches with a flip direction of the electronic screen, and if not, the window image shown on the display screen is flipped and the application program operated in the window image is activated.

Abstract: A heat dissipation device includes a first fin group, a second fin group, a heat pipe and a base. The base is in thermal contact with a heat source. The heat pipe includes a first pipe part and a second pipe part. The second pipe part is connected with the first pipe part and extended upwardly. The first pipe part is arranged between the base and the second fin group. The second pipe part is penetrated through the first fin group. The distance between a top surface of the first fin group and the base is larger than the distance between a top surface of the second fin group and the base. Since influences of the dissipating area and the wind resistance are taken into consideration, the heat dissipation device has enhanced heat dissipating efficacy.

Abstract: An oscillator module used with a plurality of power sources includes an oscillator unit, a clock monitor unit (CMU), a software module and a digital calibration circuit. The oscillator unit generates a clock signal. The CMU is coupled to the oscillator unit, determines whether an amplitude of the clock signal exceeds a predetermined threshold, and outputs an alarm signal if the amplitude of the clock signal is lower than the predetermined threshold. The software module is coupled to the CMU, and receives the alarm signal to output a calibration signal. The digital calibration circuit is coupled to the oscillator and the software module, and outputs a control signal in response to the clock signal and the calibration signal, adjusting the plurality of power sources to modify the clock signal.

Abstract: A system and method for forming a resistor system is provided. An embodiment comprises a resistor formed in a U-shape. The resistor may comprise multiple layers of conductive materials, with a dielectric layer filling the remainder of the U-shape. The resistor may be integrated with a dual metal gate manufacturing process or may be integrated with multiple types of resistors.

Abstract: A method for making a breathable cool-feeling fabric includes blending a liquid gel matrix containing a precursor hydrogel and a solvent with a cross-linking agent to prepare an emulsion which includes hydrogel microbeads formed by gelation of the precursor hydrogel with the cross-linking agent, and press-printing a base fabric with the emulsion such that the hydrogel microbeads are trapped between interwoven yarns of the base fabric.