Abstract: An image processing unit including an always on circuit block and a non-always on circuit block is provided. When operating under a first operation mode, the non-always on circuit block receives a bias voltage from a power supply unit, so as to perform an image processing operation on an image input signal. When operating under a second operation mode, the non-always on circuit block stops receiving the bias voltage from the power supply unit, so as to stop the image processing operation, and at least a microcontroller of the non-always on circuit block is powered down. One of the always on circuit block and the non-always on circuit block controls the power supply unit to stop supplying the bias voltage to the non-always on circuit block according an event trigger signal, such that the non-always on circuit block enters the second operation mode from the first operation mode.

Abstract: An image processing circuit and a light illumination module are provided. The light illumination module has an integrated circuit and a plurality of light emitting diode (LED) strings connected in parallel. The integrated circuit could be the image processing circuit. Each of the LED strings has a plurality of LEDs connected in series. The integrated circuit has a driving circuit coupled to the LED strings. The driving circuit supplies a driving voltage to first ends of the LED strings to drive the LED strings. The driving circuit is also configured to maintain a voltage value of the driving voltage obtained while all of the strings of the light emitting diodes are turned on, until all of the LED strings are turned on again. Accordingly, the interference of the LED strings is decreased, and the LED strings operate more stably.

Abstract: A switching control method capable of continuously providing power is utilized for a power supply system having a first power supply unit and a second power supply unit. The switching control method includes generating a first input signal and a second input signal; performing a logical operation process on the first input signal and the second input signal to generate a first control signal; delaying the second input signal for a delay time to generate a second control signal; controlling a coupling relationship between the first power supply unit and a load according to the first control signal; and controlling a coupling relationship between the second power supply unit and the load according to the second control signal.

Abstract: In a normal mode, the power supply is fed back in a close loop, but in a power saving mode, the power supply is fed back in an open loop. When it is detected that the power supply is continuously fed back in the open loop and in a substantially zero output status, the power supply circuit enters a power down status. If the back-stage circuit needs power supply again, then the feedback is switched to the close loop and the power supply circuit enters the normal mode.

Abstract: The disclosure provides a hybrid display device, comprising: a substrate, wherein the substrate comprises a first surface and a second surface; a TFT array layer formed on the first surface of the substrate; a first display device formed on the TFT array layer; and a second display device formed on the second surface of the substrate, wherein there exists a corresponding relationship between a dielectric constant (k) of the substrate and a thickness (t) of the substrate to drive at least one of the first display device and the second display device, or to drive both of the first display device and the second display device by the TFT array layer, especially the TFT array layer actively drive the first display device, the second display device or combinations thereof. The dielectric constant of the substrate is about 1-100 and the thickness of the substrate is about 0.1-60 ?m.

Abstract: An image processing method for a display device, for enhancing image quality, includes receiving video signals, sequentially generating a plurality of image data according to the video signals, and sequentially displaying the plurality of image data on a panel of the display device. Each of the plurality of image data includes a frame data and a low-gray-level frame data respectively corresponding to a frame output duration and a vertical blanking duration in a timing sequence of the video signals.

Abstract: Roll-to-roll printing apparatuses are disclosed. The roll-to-roll printing apparatus includes a printing device with a squeegee moving along a first direction transferring a pattern of a stencil to a roll of working pieces. A sending roller and a receiving roller are disposed on both sides of the printing device. The roll of working pieces is rolled along a second direction to a printing stage of the printing device. An alignment device is disposed corresponding to a position of the stencil and the roll of working pieces. A drying device is disposed on one side of the printing device and may be on the same side with the receiving roller, wherein the drying device cures the patterns on the roll of working pieces.

Abstract: An image processing circuit and a light illumination module are provided. The light illumination module has an integrated circuit and a plurality of light emitting diode (LED) strings connected in parallel. The integrated circuit could be the image processing circuit. Each of the LED strings has a plurality of LEDs connected in series. The integrated circuit has a driving circuit coupled to the LED strings. The driving circuit supplies a driving voltage to first ends of the LED strings to drive the LED strings. The driving circuit is also configured to maintain a voltage value of the driving voltage obtained while all of the strings of the light emitting diodes are turned on, until all of the LED strings are turned on again. Accordingly, the interference of the LED strings is decreased, and the LED strings operate more stably.

Abstract: A three-dimensional (3D) video processing device capable of avoiding crosstalk between adjacent frames includes a video processing circuit and a control circuit. The video processing circuit is configured to generate a 3D video signal having a first frame timing. The 3D video signal is used to control a panel to update, to thereby display 3D video frames in accordance with a second frame timing which is a delayed version of the first frame timing. The control circuit is utilized for generating a backlight control signal. A switching timing of the backlight control signal is determined according to the second frame timing.

Abstract: A light-emitting diode driving device includes a light-emitting diode driving chip, for driving the one or more light-emitting diode strings according to a feedback voltage associated with the one or more light-emitting diode strings, and a voltage limiter, having a terminal coupled to the light-emitting diode driving chip and another terminal coupleable to the one or more light-emitting diode strings, for generating the feedback voltage for provision to the light-emitting diode driving chip according to a bottom voltage of the one or more light-emitting diode strings, and limiting the feedback voltage not to exceed a preset level.

Abstract: An integrated backlight driving chip for driving a light-emitting diode backlight module includes a scaler circuit and a backlight driving circuit. The scaler circuit includes a digital control unit for generating a digital control signal, and a variable reference voltage generation unit for generating a reference voltage. The backlight driving circuit is coupled to the digital control unit, the variable reference voltage generation unit, and the LED backlight module, for generating a backlight driving signal according to the digital control signal and the reference voltage so as to drive the LED backlight module.

Abstract: A method and an apparatus for interlace scanning video signal frequency multiplication are provided. The method includes the following steps: first, removing a part of a first vertical synchronous signal (V-sync signal) which is asynchronous with a first horizontal synchronous signal (H-sync signal); next, capturing a first field and a second field from an interlace scan video signal according to the first V-sync signal obtained in the previous step; performing a frequency multiplication on a frame made up by the first and second fields, and producing a second V-sync signal and a second H-sync signal; finally, compensating for the second V-sync signal on a border between two fields of the frame after the frequency multiplication according to the second H-sync signal. Thereby, the method can be used to perform frequency multiplication using a line buffer instead of a frame buffer, to output through interface scanning without sacrificing image quality.

Abstract: A short detection circuit includes a voltage divider circuit, for generating, according to a bottom voltage of one or more light-emitting diode strings, a divided voltage less than the bottom voltage. Additionally, the short detection circuit includes a voltage clamp circuit, coupled to the voltage divider circuit, for clamping the divided voltage, and a comparator, coupled to the voltage divider circuit, for comparing the divided voltage and a reference voltage, to decide whether a short circuit occurs in the one or more light-emitting diode strings according to a result of the comparison.

Abstract: In a normal mode, the power supply is fed back in a close loop, but in a power saving mode, the power supply is fed back in an open loop. When it is detected that the power supply is continuously fed back in the open loop and in a substantially zero output status, the power supply circuit enters a power down status. If the back-stage circuit needs power supply again, then the feedback is switched to the close loop and the power supply circuit enters the normal mode.

Abstract: A switching control method capable of continuously providing power is utilized for a power supply system having a first power supply unit and a second power supply unit. The switching control method includes generating a first input signal and a second input signal; performing a logical operation process on the first input signal and the second input signal to generate a first control signal; delaying the second input signal for a delay time to generate a second control signal; controlling a coupling relationship between the first power supply unit and a load according to the first control signal; and controlling a coupling relationship between the second power supply unit and the load according to the second control signal.

Abstract: Roll-to-roll printing apparatuses are disclosed. The roll-to-roll printing apparatus includes a printing device with a squeegee moving along a first direction transferring a pattern of a stencil to a roll of working pieces. A sending roller and a receiving roller are disposed on both sides of the printing device. The roll of working pieces is rolled along a second direction to a printing stage of the printing device. An alignment device is disposed corresponding to a position of the stencil and the roll of working pieces. A drying device is disposed on one side of the printing device and may be on the same side with the receiving roller, wherein the drying device cures the patterns on the roll of working pieces.

Abstract: An automatic clamping analog-to-digital converter (A/D converter) is provided, which includes an A/D converter, a switch, a comparator, a bidirectional counter, and a digital-to-analog converter (D/A converter). Wherein, the A/D converter receives an analog signal from a node, and then converts the analog signal into a digital signal according to a DC offset level. The switch is coupled between the node and a fixed voltage level, and is turned on or off according to a clamping signal. The comparator outputs a compare signal according to a comparison result between the digital signal and an offset value. The bidirectional counter outputs a count, and increases or decreases the count according to the compare signal. The D/A converter converts the count into the DC offset level and provides the DC offset level to the A/D converter.

Abstract: An image processing method for a display device, for enhancing image quality, includes receiving video signals, sequentially generating a plurality of image data according to the video signals, and sequentially displaying the plurality of image data on a panel of the display device. Each of the plurality of image data includes a frame data and a low-gray-level frame data respectively corresponding to a frame output duration and a vertical blanking duration in a timing sequence of the video signals.

Abstract: A method that uses at least one hydrogen ion beam for alignment of liquid crystal molecules is proposed in the present invention. The method of the present invention is proposed to resolve the problems of physical destruction and surface deterioration of the alignment films caused by the conventional method using argon ions beams. The method of the present invention directly uses at least one hydrogen ion beam to impact the alignment film. Hence, the physical destruction of the alignment film is reduced. In addition, via the reaction between hydrogen ions and the alignment films, the quality of the alignment film is improved.

Abstract: A method and an apparatus for interlace scanning video signal frequency multiplication are provided. The method includes the following steps: first, removing a part of a first vertical synchronous signal (V-sync signal) which is asynchronous with a first horizontal synchronous signal (H-sync signal); next, capturing a first field and a second field from an interlace scan video signal according to the first V-sync signal obtained in the previous step; performing a frequency multiplication on a frame made up by the first and second fields, and producing a second V-sync signal and a second H-sync signal; finally, compensating for the second V-sync signal on a border between two fields of the frame after the frequency multiplication according to the second H-sync signal. Thereby, the method can be used to perform frequency multiplication using a line buffer instead of a frame buffer, to output through interface scanning without sacrificing image quality.