Abstract: A silicon carbide (carborundum) semiconductor device and a manufacturing method thereof. The manufacturing method of the silicon carbide semiconductor device comprises the following steps of: providing a semiconductor component structure on a silicon carbide substrate, the semiconductor component structure being formed on a front side of the silicon carbide substrate; and forming a multi-layer structure on a back side of the silicon carbide substrate, the multi-layer structure comprising a plurality of ohmic contact layers and a plurality of gettering material layers. By dispersing the gettering material into multiple layers, and by adjusting a thickness combination of the ohmic contact layer and the gettering material layer, even if the gettering material layer is relatively thin (thickness sufficient for balling), a content is still sufficient for gettering carbon and reducing carbon aggregation and accumulation.

Abstract: A silicon carbide (carborundum) semiconductor device and a manufacturing method thereof. The manufacturing method of the silicon carbide semiconductor device comprises the following steps of: providing a semiconductor component structure on a silicon carbide substrate, the semiconductor component structure being formed on a front side of the silicon carbide substrate; and forming a multi-layer structure on a back side of the silicon carbide substrate, the multi-layer structure comprising a plurality of ohmic contact layers and a plurality of gettering material layers. By dispersing the gettering material into multiple layers, and by adjusting a thickness combination of the ohmic contact layer and the gettering material layer, even if the gettering material layer is relatively thin (thickness sufficient for balling), a content is still sufficient for gettering carbon and reducing carbon aggregation and accumulation.

Abstract: A silicon carbide power device is controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbide power device.

Abstract: A silicon carbride power device controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbride power device.

Abstract: A silicon carbide power device controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbide power device.

Abstract: A silicon carbide power device controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbide power device.

Abstract: A semiconductor power device includes an n-type drift layer, a plurality of first p-doped regions, a plurality of n-doped regions, a plurality of second p-doped regions, a gate dielectric layer, a gate electrode, an interlayer dielectric layer and a plurality of source contacts. Each first p-doped region includes a first p-doped portion and a plurality of first p-doped arms extending outwards from the first p-doped portion. Each n-doped region includes an n-doped portion and a plurality of n-doped arms extending outwards from the n-doped portion.

Abstract: A silicon carbide (SiC) semiconductor device having a metal oxide semiconductor field effect transistor (MOSFET) and integrated with an anti-parallelly connected Schottky diode includes: an n-type substrate, an n-type drift layer, a plurality of doped regions, a gate dielectric layer, a gate electrode, an inter-layer dielectric layer, a plurality of source openings, a plurality of junction openings, a plurality of gate openings, a first metal layer and a second metal layer. The second metal layer at the junction openings forms the Schottky diode.

Abstract: The present invention is related to a silicon carbide semiconductor device which employs a silicon carbide substrate to form an integrated device. The integrated device of the present invention comprises a metal oxide semiconductor field-effect transistor (MOSFET) and an integrated junction barrier Schottky (JBS) diode in an anti-parallel connection with the MOSFET.

Abstract: An intelligent power component module operable to be driven by a negative gate voltage integrates a wide bandgap semiconductor power unit, an adjustment unit and a driving unit so as to adjust a voltage level of the driving unit by the adjustment unit. Accordingly, the wide bandgap semiconductor power unit, in a driven state, comprises a driving voltage level alternating between a positive and a negative voltage.

Abstract: An intelligent power component module operable to be driven by a negative gate voltage integrates a wide bandgap semiconductor power unit, an adjustment unit and a driving unit so as to adjust a voltage level of the driving unit by the adjustment unit. Accordingly, the wide bandgap semiconductor power unit, in a driven state, comprises a driving voltage level alternating between a positive and a negative voltage.

Abstract: A semiconductor power device includes an n-type drift layer, a plurality of first p-doped regions, a plurality of n-doped regions, a plurality of second p-doped regions, a gate dielectric layer, a gate electrode, an interlayer dielectric layer and a plurality of source contacts. Each first p-doped region includes a first p-doped portion and a plurality of first p-doped arms extending outwards from the first p-doped portion. Each n-doped region includes an n-doped portion and a plurality of n-doped arms extending outwards from the n-doped portion.

Abstract: A silicon carbide (SiC) semiconductor element includes a semiconductor layer, a dielectric layer on a surface of the semiconductor layer, a gate electrode layer on the dielectric layer, a first doped region, a second doped region, a shallow doped region and a third doped region. The semiconductor layer is of a first conductivity type. The first doped region is of a second conductivity type and includes an upper doping boundary spaced from the surface by a first depth. The shallow doped region is of the second conductivity type, and extends from the surface to a shallow doped depth. The second doped region is adjacent to the shallow doped region and is at least partially in the first doped region. The third doped region is of the second conductivity type and at least partially overlaps the first doped region.

Abstract: A wide bandgap semiconductor device with an adjustable voltage level includes a wide bandgap semiconductor power unit and a level adjusting unit. The wide bandgap semiconductor power unit includes a source terminal, to which the level adjusting unit is electrically connected. The level adjusting unit provides a level shift voltage via the source terminal to adjust a driving voltage level of the wide bandgap semiconductor power unit. By adjusting the driving voltage level of the wide bandgap semiconductor power unit using the level adjusting unit, the wide bandgap semiconductor device may serve as a high-voltage enhancement-mode transistor to achieve reduced costs and an increased switching speed.

Abstract: The present invention is related to a silicon carbide semiconductor device which employs a silicon carbide substrate to form an integrated device. The integrated device of the present invention comprises a metal oxide semiconductor field-effect transistor (MOSFET) and an integrated junction barrier Schottky (JBS) diode in an anti-parallel connection with the MOSFET.

Abstract: A silicon carbide (SiC) semiconductor element includes a semiconductor layer, a dielectric layer on a surface of the semiconductor layer, a gate electrode layer on the dielectric layer, a first doped region, a second doped region, a shallow doped region and a third doped region. The semiconductor layer is of a first conductivity type. The first doped region is of a second conductivity type and includes an upper doping boundary spaced from the surface by a first depth. The shallow doped region is of the second conductivity type, and extends from the surface to a shallow doped depth. The second doped region is adjacent to the shallow doped region and is at least partially in the first doped region. The third doped region is of the second conductivity type and at least partially overlaps the first doped region.

Abstract: A silicon carbide field effect transistor includes a silicon carbide substrate, an n-type drift layer, a p-type epitaxy layer, a source region, a trench gate, at least one p-type doped region, a source, a dielectric layer and a drain. The p-type doped region is disposed at the n-type drift layer to be adjacent to one lateral side of the trench gate, and includes a first doped block and a plurality of second doped blocks arranged at an interval from the first doped block towards the silicon carbide substrate. Further, a thickness of the second doped blocks does not exceed 2 um. Accordingly, not only the issue of limitations posed by the energy of ion implantation is solved, but also an electric field at a bottom and a corner of the trench gate is effectively reduced, thereby enhancing the reliability of the silicon carbide field effect transistor.

Abstract: A silicon carbide semiconductor device and method of manufacture thereof is made by providing a channel control zone which has impurity concentration distribution increased gradually from a first doping boundary to reach a maximum value between the first doping boundary and a second doping boundary, then decreased gradually toward the second doping boundary, so that the silicon carbide semiconductor device is formed with a lower conduction resistance and increased drain current without sacrificing threshold voltage.

Abstract: A SiC junction barrier controlled Schottky rectifier includes a SiC substrate, a n-type drift layer, a p-type doping region, a plurality of junction field-effect regions, a first metal layer and a second metal layer. The drift layer is disposed on the SiC substrate. The junction field-effect regions are disposed in the drift layer and are surrounded by the p-type doping region. The first metal layer is disposed on the drift layer. The second metal layer is disposed at one side of the SiC substrate away from the drift layer. Through N circular regions and (N?1) inter-circle regions each connecting two of the circular regions, as well as geometric characteristics of the circular regions and the inter-circle regions, a leakage current of devices is effectively reduced and ruggedness is increased to improve an issue of a large leakage current of a conventional Schottky barrier diode.

Abstract: A silicon carbide semiconductor device and method of manufacture thereof is made by providing a channel control zone which has impurity concentration distribution increased gradually from a first doping boundary to reach a maximum value between the first doping boundary and a second doping boundary, then decreased gradually toward the second doping boundary, so that the silicon carbide semiconductor device is formed with a lower conduction resistance and increased drain current without sacrificing threshold voltage.