Abstract: The system includes a plurality of storage volumes, a data synchronization module, a space-efficient storage module, and a heat data module. A second storage volume of the plurality of storage volumes includes a backup storage location for a first storage volume. The data synchronization module, coupled to the first storage volume and the second storage volume, provides a backup by synchronizing information from the first storage volume to the second storage volume during a synchronization event. The information includes data chunks, heat map data, and first metadata. The space-efficient storage module receives the information from the data synchronization module and allocates the information to the second storage volume in accordance with a space-efficient storage model. The heat data module reads the first metadata and the heat map data and adjusts a location of the data chunks in the second storage volume based on the heat map data.

Abstract: Embodiments include a load calculator, a workload analyzer, and a decision module. The load calculator generates an input/output (IO) record for an asset. The IO record includes a count of read operations and write operations corresponding to the asset from each of a plurality of sites. The workload analyzer collects the IO record and generates at least one of a write threshold and a read threshold. The decision module generates a request for at least one of a promotion and a copy of the asset in response to a determination that an operation has reached at least one of the write threshold and the read threshold for the asset.

Abstract: The system includes a plurality of storage volumes, a data synchronization module, a space-efficient storage module, and a heat data module. A second storage volume of the plurality of storage volumes includes a backup storage location for a first storage volume. The data synchronization module, coupled to the first storage volume and the second storage volume, provides a backup by synchronizing information from the first storage volume to the second storage volume during a synchronization event. The information includes data chunks, heat map data, and first metadata. The space-efficient storage module receives the information from the data synchronization module and allocates the information to the second storage volume in accordance with a space-efficient storage model. The heat data module reads the first metadata and the heat map data and adjusts a location of the data chunks in the second storage volume based on the heat map data.

Abstract: The present disclosure relates to a method of forming a FinFET device having sidewalls spacers comprising an air gap that provides for a low dielectric constant, and an associated apparatus. In some embodiments, the method is performed by forming a fin of semiconductor material on a semiconductor substrate. A gate structure, having a gate dielectric layer and an overlying gate material layer, is formed at a position overlying the fin of semiconductor material. Sidewall spacers are formed at positions abutting opposing sides of the gate structure. Respective sidewall spacers have a first layer of insulating material abutting the gate structure and a second layer of insulating material separated from the first layer of insulating material by an air gap. By forming the FinFET device to have sidewall spacers with air gaps, the parasitic capacitance of the FinFET device and a corresponding RC time delay are decreased.

Abstract: A controller includes current setting circuitry and voltage regulation circuitry. The current setting circuitry can selectively operate in different states that include a strobe state and an idle state. The current setting circuitry sets a current of a light source to a first current level in the strobe state such that the light source emits light, and sets the current to a second current level that is less than the first current level in the idle state such that the light source disables emission of light. The voltage regulation circuitry regulates an output voltage that powers the light source to be in a voltage range with the current at the first current level in the strobe state such that the light source emits light, and maintains the output voltage at a voltage level in the voltage range in the idle state.

Abstract: The present disclosure relates to a method of forming a FinFET device having sidewalls spacers comprising an air gap that provides for a low dielectric constant, and an associated apparatus. In some embodiments, the method is performed by forming a fin of semiconductor material on a semiconductor substrate. A gate structure, having a gate dielectric layer and an overlying gate material layer, is formed at a position overlying the fin of semiconductor material. Sidewall spacers are formed at positions abutting opposing sides of the gate structure. Respective sidewall spacers have a first layer of insulating material abutting the gate structure and a second layer of insulating material separated from the first layer of insulating material by an air gap. By forming the FinFET device to have sidewall spacers with air gaps, the parasitic capacitance of the FinFET device and a corresponding RC time delay are decreased.

Abstract: A method according to one embodiment may include supplying power to an LED array having at least a first string of LEDs and a second string of LEDs coupled in parallel, each of the strings includes at least two LEDs. The method of this embodiment may also include comparing a first feedback signal from the first string of LEDs and a second feedback signal from the second string of LEDs. The first feedback signal is proportional to current in said first string of LEDs and said second feedback signal is proportional to current in said second string of LEDs. The method of this embodiment may also include controlling a voltage drop of at least the first string of LEDs to adjust the current of the first string of LEDs relative to the second string of LEDs, based on, at least in part, the comparing of the first and second feedback signals. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

Abstract: A display system includes a touch screen and a driving circuit. The touch screen includes touch sensors and a light source. A converter of the driving circuit receives an input voltage and provides a first output voltage to the light source according to a driving signal. A controller of the driving circuit converts the first output voltage to a second output voltage to drive the touch sensors, compares a voltage feedback signal indicating whether the second output voltage reaches a desired voltage level with a current feedback signal indicating whether a current through the light source reaches a desired current level, selects a feedback signal from the voltage feedback signal and the current feedback signal according to the comparison, and generates the driving signal to adjust the first output voltage according to the selected feedback signal.

Abstract: A method for making a metallic casing includes providing an apparatus comprising a first mold and a second mold, placing a preform into a rectangular depression of first mold, moving the first mold to the second mold so that each sharp edge is substantially coplanar with a corresponding cutting edge, moving the first mold to the second mold so that the cutting edges are beyond the corresponding sharp edges of the first mold to complete a partial cut procedure, and moving the first mold to the second mold so that the secondary-cutting edge moves beyond the corresponding sharp edge and completely cuts the excess off the side wall.

Abstract: An artificial cervical vertebrae composite joint is composed of two upper and lower fixing members disposed vertically symmetrically, a cervical vertebrae body member, and two connection members, the cervical vertebrae body member being connected between the fixing members through the connection members. The fixing members each have an L shape and comprise a front wing part and a base part. A locking screw hole is formed in the front wing part, and a skidproof groove provided with an inverted tooth and a protrusion is disposed on a middle portion of the base part. A bone grafting hole is transversely disposed through a middle portion of the cervical vertebrae body member, and two cavities are disposed on both upper and lower sides of the cervical vertebrae body member at an axial center of the cervical vertebrae body member to mount the connection members.

Abstract: A method for forming a semiconductor device and a device made using the method are provided. In one example, the method includes forming a hard mask layer on a semiconductor substrate and patterning the hard mask layer to form multiple openings. The substrate is etched through the openings to form forming a plurality of trenches separating multiple semiconductor mesas. The trenches are partially filled with a dielectric material. The hard mask layer is removed and multiple-gate features are formed, with each multiple-gate feature being in contact with a top surface and sidewalls of at least one of the semiconductor mesas.

Abstract: A method for forming a semiconductor device and a device made using the method are provided. In one example, the method includes forming a hard mask layer on a semiconductor substrate and patterning the hard mask layer to form multiple openings. The substrate is etched through the openings to form forming a plurality of trenches separating multiple semiconductor mesas. The trenches are partially filled with a dielectric material. The hard mask layer is removed and multiple-gate features are formed, with each multiple-gate feature being in contact with a top surface and sidewalls of at least one of the semiconductor mesas.

Abstract: A method for forming a semiconductor device and a device made using the method are provided. In one example, the method includes forming a hard mask layer on a semiconductor substrate and patterning the hard mask layer to form multiple openings. The substrate is etched through the openings to form forming a plurality of trenches separating multiple semiconductor mesas. The trenches are partially filled with a dielectric material. The hard mask layer is removed and multiple-gate features are formed, with each multiple-gate feature being in contact with a top surface and sidewalls of at least one of the semiconductor mesas.