Patents by Inventor Dana Lee

Dana Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11963927
    Abstract: A glass container for storing pharmaceutical formulations may include a glass body formed from a Type IA or Type IB glass composition according to ASTM Standard E438-92(2011). The glass body may include a wall portion with an inner surface and an outer surface, a heel portion and a floor portion, wherein the inner surface of the glass container is formed by the inner surface of the glass body. The glass body may include at least a class A2 base resistance or better according to ISO 695, at least a type HGB2 hydrolytic resistance or better according to ISO 719 and Type 1 chemical durability according to USP <660>. The glass container does not comprise a boron-rich layer on the inner surface of the glass body in as formed condition.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: April 23, 2024
    Assignee: Corning Incorporated
    Inventors: Theresa Chang, Paul Stephen Danielson, Steven Edward DeMartino, Andrei Gennadyevich Fadeev, Robert Michael Morena, Santona Pal, John Stephen Peanasky, Robert Anthony Schaut, Christopher Lee Timmons, Natesan Venkataraman, Ronald Luce Verkleeren, Dana Craig Bookbinder
  • Patent number: 11951072
    Abstract: A coated glass pharmaceutical package includes a glass body having a Type 1 chemical durability according to USP 660, at least a class A2 base resistance or better according to ISO 695, and at least a type HGB2 hydrolytic resistance or better according to ISO 719, the glass body having an interior surface and an exterior surface and a wall extending therebetween. A lubricous coating having a thickness of less than or equal to 90 nm may be positioned on at least a portion of the exterior surface of the glass body but not on any portion of the interior surface. The portion of the coated glass package with the lubricous coating comprises a coefficient of friction that is at least 20% less than an uncoated glass package and the coefficient of friction does not increase by more than 30% after undergoing a depyrogenation cycle including exposure to a temperature of 250° C. for a time period of 30 minutes.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: April 9, 2024
    Assignee: Corning Incorporated
    Inventors: Dana Craig Bookbinder, Theresa Chang, Paul Stephen Danielson, Steven Edward DeMartino, Andrei Gennadyevich Fadeev, Robert Michael Morena, Santona Pal, John Stephen Peanasky, Robert Anthony Schaut, Christopher Lee Timmons, Natesan Venkataraman, Ronald Luce Verkleeren
  • Patent number: 11939259
    Abstract: Embodiments of the present disclosure are directed to coated glass articles which reduce glass particle formation caused by glass to glass contact in pharmaceutical glass filling lines.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: March 26, 2024
    Assignee: Corning Incorporated
    Inventors: John Frederick Bayne, Dana Craig Bookbinder, Theresa Chang, Steven Edward DeMartino, Andrei Gennadyevich Fadeev, Kyle Christopher Hoff, Jamie Lynne Morley, Santona Pal, John Stephen Peanasky, Chandan Kumar Saha, Christopher Lee Timmons
  • Publication number: 20240091103
    Abstract: According to embodiments, a coated pharmaceutical container may include a pharmaceutical container comprising an interior surface and an exterior surface, wherein the pharmaceutical container may include a glass composition that has Class HGA1 hydrolytic resistance when tested according to the ISO 720 testing standard. The coated pharmaceutical container may further include a coating bonded to at least a portion of the exterior surface but not on any portion of the interior surface. The coating may have a coefficient of friction less than or equal to 0.7, and the coated pharmaceutical container may be thermally stable after heating at a temperature of at least 260° C. for a time period of 30 minutes.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Applicant: CORNING INCORPORATED
    Inventors: Andrei Gennadyevich Fadeev, Theresa Chang, Dana Craig Bookbinder, Santona Pal, Chandan Kumar Saha, Steven Edward DeMartino, Christopher Lee Timmons, John Stephen Peanasky
  • Patent number: 11810628
    Abstract: When erasing multiple sub-blocks of a block, erase verify is performed for memory cells connected to even word lines to generate even results and for memory cells connected to odd word lines to generate odd results. The even results and the odd results are used to determine that the erase verify process successfully completed. For each NAND string of a first sub-block, a last even result for the NAND string is compared to a last odd result for the NAND string. Despite the determination that the first sub-block successfully completed erase verify, the erasing failed for the first sub-block because the number of NAND strings that have the last even result different than the last odd result is greater than a limit. The system determines that one or more additional sub-blocks also failed erasing based on and in response to determining that the first sub-block failed erasing.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: November 7, 2023
    Assignee: SanDisk Technologies LLC
    Inventors: Jayavel Pachamuthu, Dana Lee
  • Publication number: 20230260582
    Abstract: When erasing multiple sub-blocks of a block, erase verify is performed for memory cells connected to even word lines to generate even results and for memory cells connected to odd word lines to generate odd results. The even results and the odd results are used to determine that the erase verify process successfully completed. For each NAND string of a first sub-block, a last even result for the NAND string is compared to a last odd result for the NAND string. Despite the determination that the first sub-block successfully completed erase verify, the erasing failed for the first sub-block because the number of NAND strings that have the last even result different than the last odd result is greater than a limit. The system determines that one or more additional sub-blocks also failed erasing based on and in response to determining that the first sub-block failed erasing.
    Type: Application
    Filed: February 16, 2022
    Publication date: August 17, 2023
    Applicant: SanDisk Technologies LLC
    Inventors: Jayavel Pachamuthu, Dana Lee
  • Patent number: 11698086
    Abstract: A system has a hydraulic circuit configured to control a position of an attachment of the system and a control system configured to perform operations that include receiving an input indicative of a center of gravity of the attachment and controlling a flow rate of fluid directed through the hydraulic circuit based on the center of gravity.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: July 11, 2023
    Assignee: CNH INDUSTRIAL AMERICA LLC
    Inventors: Dana Lee Froemming, Jonathan Richard Nistler, Michael Sylvester Bares
  • Publication number: 20230058836
    Abstract: A non-volatile memory system performs an erase process followed by a program process to program blocks of memory cells. The erase process comprises erasing followed by erase verification. The system recovers data and records a strike for blocks that fail a read process. In response to a particular block having a strike, the system performs an odd/even compare process during the erase process for the particular blocks having the strike such that the odd/even compare process comprises determining whether a number of memory cells connected to even word lines that have a different erase verify result than memory cells connected to odd word lines is greater than a defect test threshold. The system retires blocks from further use for storing host data that fail the odd/even compare process even if the block passes erase verification.
    Type: Application
    Filed: April 26, 2022
    Publication date: February 23, 2023
    Applicant: SANDISK TECHNOLOGIES LLC
    Inventors: Jayavel Pachamuthu, Dana Lee, Jiahui Yuan
  • Patent number: 11578159
    Abstract: The invention relates to the use of low levels of glycols and short chain diols to control air void formation in any polymerization reaction having carbonyl-containing monomers, and preferably carboxylic acid ester monomers, at a level of at least 10% of total monomer, where the monomer has a peak polymerization exotherm temperature of greater than the boiling point of the monomer. The glycols and short chain diols are used in the polymization mixture at levels of 0.5 to 10 weight percent, based on the carboxylic acid ester-containing monomer. It is believed the glycols and short chain diols hydrogen bond with the —(C?O)O— containing monomer to increase the monomer boiling point, and decrease or even eliminate the formation of air voids due to monomer boiling. The invention is especially useful in polymerization of methyl methacrylate polymers and copolymers, either neat, or as a polymer composite system.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: February 14, 2023
    Assignee: ARKEMA FRANCE
    Inventors: Alaaeddin Alsbaiee, Evan Crocker, Dana Lee Swan
  • Publication number: 20220399072
    Abstract: An apparatus includes one or more control circuits configured to connect to a plurality of non-volatile memory cells arranged along word lines. The one or more control circuits are configured to receive a plurality of encoded portions of data to be programmed in non-volatile memory cells of a target word line, each encoded portion of data encoded according to an Error Correction Code (ECC) encoding scheme, and arrange the plurality of encoded portions of data in a plurality of rows of data latches corresponding to a plurality of logical pages such that each encoded portion of data is distributed across two or more rows of data latches. The one or more control circuits are also configured to program the distributed encoded portions of data from the plurality of rows of data latches into non-volatile memory cells along a target word line.
    Type: Application
    Filed: June 15, 2021
    Publication date: December 15, 2022
    Applicant: SanDisk Technologies LLC
    Inventors: Hua-Ling Cynthia Hsu, Dana Lee
  • Patent number: 11518866
    Abstract: Liquid resin compositions that can be used in the manufacture of composite materials are described. A method of making a fiber-reinforced polymeric composite material comprises wetting a fibrous material with a liquid prepolymer composition comprising at least one (meth)acrylic monomer, at least one base, and at least one peroxy ester; and polymerizing the liquid prepolymer composition to form a fiber-reinforced polymeric composite material.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: December 6, 2022
    Assignee: ARKEMA INC.
    Inventors: Marine Sauvage, Thomas H. Kozel, Dana Lee Swan, Nathan John Bachman
  • Patent number: 11482531
    Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory stack structures extending through the alternating stack. Each of the memory stack structures includes a vertical semiconductor channel, a tunneling dielectric layer, and a vertical stack of memory elements located at levels of the electrically conductive layers between a respective vertically neighboring pair of the insulating layers. Each of the memory elements includes a first memory material portion, and a second memory material portion that is vertically spaced from and is electrically isolated from the first memory material portion by at least one blocking dielectric material portion.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: October 25, 2022
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Ramy Nashed Bassely Said, Jiahui Yuan, Senaka Kanakamedala, Raghuveer S. Makala, Dana Lee
  • Publication number: 20220254797
    Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory stack structures extending through the alternating stack. Each of the memory stack structures includes a vertical semiconductor channel, a tunneling dielectric layer, and a vertical stack of memory elements located at levels of the electrically conductive layers between a respective vertically neighboring pair of the insulating layers. Each of the memory elements includes a first memory material portion, and a second memory material portion that is vertically spaced from and is electrically isolated from the first memory material portion by at least one blocking dielectric material portion.
    Type: Application
    Filed: February 8, 2021
    Publication date: August 11, 2022
    Inventors: Ramy Nashed Bassely SAID, Jiahui YUAN, Senaka KANAKAMEDALA, Raghuveer S. MAKALA, Dana LEE
  • Publication number: 20220196042
    Abstract: A system has a hydraulic circuit configured to control a position of an attachment of the system and a control system configured to perform operations that include receiving an input indicative of a center of gravity of the attachment and controlling a flow rate of fluid directed through the hydraulic circuit based on the center of gravity.
    Type: Application
    Filed: December 18, 2020
    Publication date: June 23, 2022
    Inventors: Dana Lee Froemming, Jonathan Richard Nistler, Michael Sylvester Bares
  • Patent number: 11194523
    Abstract: A data storage device includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller is operable to measure a first threshold voltage (VT) of a memory cell under a first parameter at a read temperature and measure a second VT of the memory cell under a second parameter at the read temperature in which the first parameter is different from the second parameter. A VT correction term for the memory cell is determined based upon the first VT measurement and the second VT measurement. A read VT of the memory cell is adjusted by using the VT correction term.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: December 7, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Stella Achtenberg, Eran Sharon, David Rozman, Alon Eyal, Idan Alrod, Dana Lee
  • Patent number: 11081190
    Abstract: A method for data recovery in a memory array of a non-volatile memory system, wherein the method comprises detecting an electrical short between a word line (WL) of a memory cell transistor and a local source line (LI) of a memory structure of the array, increasing an initial voltage bias at the local source line to a second voltage bias that exceeds a threshold voltage of the shorted memory cell transistor and a voltage level of a bit line of the memory structure, thereby causing a sensing current to flow in a direction from the local source line to the bit line, and sensing at a sense amplifier of the memory structure the sensing current.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: August 3, 2021
    Assignee: SanDiskTechnologies LLC
    Inventors: Abhinav Anand, Young Pil Kim, Dana Lee
  • Patent number: 10968296
    Abstract: The invention relates to the use of low levels of aliphatic primary and secondary amines to control air void formation in any polymerization reaction having carbonyl groups, and especially carboxylic acid ester group-containing monomers at a level of at least 10% of total monomer, where the monomer has a peak polymerization exotherm temperature of greater than the boiling point of the monomer. The primary or secondary amines are used in the polymerization mixture at levels of 100 to 5000 ppm, based on the carboxylic acid ester group-containing monomer. It is believed the primary and secondary amines hydrogen bond with the —C?O)O— containing monomer to increase the monomer boiling point, and decrease or even eliminate the formation of air voids due to monomer boiling. The invention is especially useful in polymerization of methymethacrylate polymers and copolymers, either neat, or as a polymer composite system.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: April 6, 2021
    Assignee: Arkema France
    Inventors: Alaaeddin Alsbaiee, Evan Crocker, Dana Lee Swan
  • Patent number: 10717707
    Abstract: A method of making CF3CH2SH, comprising a step of reacting CF3CH2X, wherein X is halide or tosylate, with MSH, where M is an alkali metal such as Na or K, to yield CF3CH2SH.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: July 21, 2020
    Assignee: Arkema Inc.
    Inventors: Robert George Syvret, Craig Alan Polsz, Dana Lee Swan, Vijay R. Srinivas
  • Patent number: D1017056
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: March 5, 2024
    Assignee: LG ELECTRONICS INC.
    Inventors: Dana Jung, Min-ji Seo, Gayeong Lee
  • Patent number: D1023932
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: April 23, 2024
    Assignee: LG ELECTRONICS INC.
    Inventors: Dana Jung, Min-ji Seo, Gayeong Lee