Abstract: A processing system includes processors and dynamically configurable communication elements (DCCs) coupled together in an interspersed arrangement. A source device may transfer a data item through an intermediate subset of the DCCs to a destination device. The source and destination devices may each correspond to different processors, DCCs, or input/output devices, or mixed combinations of these. In response to detecting a stall after the source device begins transfer of the data item to the destination device and prior to receipt of all of the data item at the destination device, a stalling device is operable to propagate stalling information through one or more of the intermediate subset towards the source device. In response to receiving the stalling information, at least one of the intermediate subset is operable to buffer all or part of the data item.

Abstract: A wound core assembly for an electrical machine comprising a stack of laminations defining a core having a plurality of poles, the wound core assembly further comprising at least one slot wedge, wherein the slot wedge comprises a first portion arranged between adjacent poles and at least one second portion protruding from the first portion and abutting an end face of the core in the region of at least one of the poles. The at least one second portion may apply axial pressure to the end face to reduce the tendency of the laminations to splay axially outwards.

Abstract: A processing system comprising processors and the dynamically configurable communication elements coupled together in an interspersed arrangement. The processors each comprise at least one arithmetic logic unit, an instruction processing unit, and a plurality of processor ports. The dynamically configurable communication elements each comprise a plurality of communication ports, a first memory, and a routing engine. For each of the processors, the plurality of processor ports is configured for coupling to a first subset of the plurality of dynamically configurable communication elements. For each of the dynamically configurable communication elements, the plurality of communication ports comprises a first subset of communication ports configured for coupling to a subset of the plurality of processors and a second subset of communication ports configured for coupling to a second subset of the plurality of dynamically configurable communication elements.

Abstract: Foot-operated assemblies and methods of using the foot-operated assemblies to control a motorcycle. A foot-operated assembly includes a shaft that defines a pivot axis, a device for mounting the shaft to the motorcycle, a rocker arm coupled to the shaft so that the rocker arm is rotatable about the pivot axis, a second arm interconnected with the rocker arm so that rotation of the rocker arm causes the second arm to rotate about the pivot axis, a feature for coupling the second arm to a gear shifter linkage or a brake cylinder rod of the motorcycle, and a foot board attached to the rocker arm so that rotation of the foot board causes the rocker arm and the second arm to rotate about the pivot axis.

Abstract: Computerized method and system for identification and evaluation of a repair likely to prevent a failure of a mobile asset is provided. The method allows collecting data indicative of an incipient malfunction in the mobile asset (e.g., 1006). The method further allows collecting usage data indicative of usage of the mobile asset (e.g., 1002). The usage data is processed relative to historical data collected from a fleet of corresponding mobile assets to generate a usage profile for that asset (e.g., 1004). The data indicative of incipient malfunctions is processed to generate a prediction of a failure in the mobile asset and at least one repair likely to prevent the failure of the mobile asset (e.g., 1010). A repair weight indicative of a probability that the repair will prevent the predicted failure is determined (e.g., 466). The repair weight is adjusted based on the usage profile of the asset (e.g.

Abstract: A processing system comprising processors and the dynamically configurable communication elements coupled together in an interspersed arrangement. The processors each comprise at least one arithmetic logic unit, an instruction processing unit, and a plurality of processor ports. The dynamically configurable communication elements each comprise a plurality of communication ports, a first memory, and a routing engine. For each of the processors, the plurality of processor ports is configured for coupling to a first subset of the plurality of dynamically configurable communication elements. For each of the dynamically configurable communication elements, the plurality of communication ports comprises a first subset of communication ports configured for coupling to a subset of the plurality of processors and a second subset of communication ports configured for coupling to a second subset of the plurality of dynamically configurable communication elements.

Abstract: A processing system comprising processors and the dynamically configurable communication elements coupled together in an interspersed arrangement. The processors each comprise at least one arithmetic logic unit, an instruction processing unit, and a plurality of processor ports. The dynamically configurable communication elements each comprise a plurality of communication ports, a first memory, and a routing engine. For each of the processors, the plurality of processor ports is configured for coupling to a first subset of the plurality of dynamically configurable communication elements. For each of the dynamically configurable communication elements, the plurality of communication ports comprises a first subset of communication ports configured for coupling to a subset of the plurality of processors and a second subset of communication ports configured for coupling to a second subset of the plurality of dynamically configurable communication elements.

Abstract: A method for determining the pulse width for driving printhead nozzles in a thermal inkjet printer. The printhead is preheated to a desired temperature during a maintenance mode. The printhead nozzle heaters are successively driven in respective heating intervals, where each successive heating interval is characterized by shorter drive pulse width pulses occurring at a higher pulse frequency. The printhead temperature data received during each heating interval is processed to determine a respective temperature slope. The temperature slopes are compared to a desired threshold temperature slope, and when a match is found, the pulse width associated with the matched temperature slope is used to drive the nozzle heaters during subsequent printer operations to print characters on a print medium.

Abstract: An assembly for testing microelectronic devices includes a microelectronic element having faces and contacts, a flexible substrate spaced from and overlying a first face of the microelectronic element, and a plurality of conductive posts extending from the flexible substrate and projecting away from the first face of the microelectronic element, at least some of the conductive posts being electrically interconnected with the microelectronic element. The assembly also includes a plurality of support elements disposed between the microelectronic element and the substrate for supporting the flexible substrate over the microelectronic element. At least some of the conductive posts are offset from the support elements.

Abstract: A processing system comprising processors and the dynamically configurable communication elements coupled together in an interspersed arrangement. The processors each comprise at least one arithmetic logic unit, an instruction processing unit, and a plurality of processor ports. The dynamically configurable communication elements each comprise a plurality of communication ports, a first memory, and a routing engine. For each of the processors, the plurality of processor ports is configured for coupling to a first subset of the plurality of dynamically configurable communication elements. For each of the dynamically configurable communication elements, the plurality of communication ports comprises a first subset of communication ports configured for coupling to a subset of the plurality of processors and a second subset of communication ports configured for coupling to a second subset of the plurality of dynamically configurable communication elements.

Abstract: A bottom unit including a bottom unit semiconductor chip is mounted to a circuit board and one or more top elements such as packaged semiconductor chips are mounted to the bottom unit. Both mounting operations can be performed using the same techniques as commonly employed for mounting components to a circuit board. Ordinary packaged chips can be employed as the top elements, thereby reducing the cost of the assembly and allowing customization of the assembly by selecting packaged chips. The assembly achieves benefits similar to those obtained with a preassembled stacked chip unit, but without the expense of special handling of the bare dies included in the packaged chips.

Abstract: A processing system comprising processors and the dynamically configurable communication elements coupled together in an interspersed arrangement. The processors each comprise at least one arithmetic logic unit, an instruction processing unit, and a plurality of processor ports. The dynamically configurable communication elements each comprise a plurality of communication ports, a first memory, and a routing engine. For each of the processors, the plurality of processor ports is configured for coupling to a first subset of the plurality of dynamically configurable communication elements. For each of the dynamically configurable communication elements, the plurality of communication ports comprises a first subset of communication ports configured for coupling to a subset of the plurality of processors and a second subset of communication ports configured for coupling to a second subset of the plurality of dynamically configurable communication elements.

Abstract: A processing system comprising processors and the dynamically configurable communication elements coupled together in an interspersed arrangement. The processors each comprise at least one arithmetic logic unit, an instruction processing unit, and a plurality of processor ports. The dynamically configurable communication elements each comprise a plurality of communication ports, a first memory, and a routing engine. For each of the processors, the plurality of processor ports is configured for coupling to a first subset of the plurality of dynamically configurable communication elements. For each of the dynamically configurable communication elements, the plurality of communication ports comprises a first subset of communication ports configured for coupling to a subset of the plurality of processors and a second subset of communication ports configured for coupling to a second subset of the plurality of dynamically configurable communication elements.

Abstract: A processing system comprising processors and the dynamically configurable communication elements coupled together in an interspersed arrangement. The processors each comprise at least one arithmetic logic unit, an instruction processing unit, and a plurality of processor ports. The dynamically configurable communication elements each comprise a plurality of communication ports, a first memory, and a routing engine. For each of the processors, the plurality of processor ports is configured for coupling to a first subset of the plurality of dynamically configurable communication elements. For each of the dynamically configurable communication elements, the plurality of communication ports comprises a first subset of communication ports configured for coupling to a subset of the plurality of processors and a second subset of communication ports configured for coupling to a second subset of the plurality of dynamically configurable communication elements.

Abstract: An arbiter generates an availability signal indicating whether pseudo-ports are available for receiving data. Each pseudo-port identifies one or more output ports of a packet switch. The availability signal also indicates whether each pseudo-port has a hold. A hold on a pseudo-port indicates that the pseudo-port is being held for an input port of the packet switch. Although the packet switch may complete routing of a data packet in progress to an output port of the pseudo-port that has the hold, the packet switch will not initiate routing of a data packet to an output port of the pseudo-port until each output port of the pseudo-port is available. When all the output ports of the pseudo-port are available, the packet switch can route data of a data packet from the input port for which the pseudo-port is being held to each output port of the pseudo-port.

Abstract: A method for determining the pulse width for driving printhead nozzles in a thermal inkjet printer. The printhead is preheated to a desired temperature during a maintenance mode. The printhead nozzle heaters are successively driven in respective heating intervals, where each successive heating interval is characterized by shorter drive pulse width pulses occurring at a higher pulse frequency. The printhead temperature data received during each heating interval is processed to determine a respective temperature slope.

Abstract: A switch includes an arbiter that receives a plurality of requests from N input ports, and determines N round robin arbitration option winners by performing N round robin arbitration options on the requests, each of the N round robin arbitration options performed assuming that a different one of the N input ports was a previous round robin arbitration winner. After the actual previous round robin arbitration winner is identified, a current round robin arbitration winner from among the N round robin arbitration option winners is determined by selecting the round robin arbitration option winner in which the assumed previous round robin arbitration winner is the actual previous round robin arbitration winner.

Abstract: A wound core assembly for an electrical machine comprising a stack of laminations defining a core having a plurality of poles, the wound core assembly further comprising at least one slot wedge, wherein the slot wedge comprises a first portion arranged between adjacent poles and at least one second portion protruding from the first portion and abutting an end face of the core in the region of at least one of the poles. The at least one second portion may apply axial pressure to the end face to reduce the tendency of the laminations to splay axially outwards.

Abstract: A packet switch arbitration system and method for arbitration in a packet switch. In one aspect, a method of issuing grants to an ingress port is disclosed in which a first grant request and burst signal are activated at an ingress port having more than one word available for transfer through the switch. A first grant is issued to the ingress port on a first interval. A subsequent grant is issued to the ingress port on a subsequent interval, where the subsequent grant is issued before the ingress port has validated the first grant request.

Abstract: A microelectronic assembly includes units superposed on one another to form at least one stack having a vertical direction. Each unit includes one or more microelectronic devices and has top and bottom surfaces. Top unit terminals are exposed at the top surfaces and bottom unit terminals are exposed at the bottom surfaces. The top and bottom unit terminals are provided at a set of ordered column positions. Each top unit terminal of the set, except the top unit terminals at the highest ordered column position, is connected to a respective bottom unit terminal of the same unit at a next higher ordered column position. Each bottom unit terminal of the set, except the bottom unit terminals of the lowest unit in the stack, is connected to a respective upper unit terminal of the next lower unit in the stack at the same column position.