Patents by Inventor David F. Heinrich
David F. Heinrich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11927999Abstract: A process includes an application layer of a host of a computer platform using a smart network interface card (NIC) of the computer platform to provide an input/output (I/O) service for the application layer. The I/O service includes a service that is associated with a cloud operator domain; the smart NIC is installed in a connector; and the application layers associated with a cloud tenant domain. The process includes a baseboard management controller of the smart NIC managing the computer platform. Managing the computer platform includes the baseboard management controller managing the host; the baseboard management controller managing components of the smart NIC other than the baseboard management controller; and managing the host includes the baseboard management controller communicating with the host via the connector to control a system power state of the computer platform.Type: GrantFiled: October 14, 2021Date of Patent: March 12, 2024Assignee: Hewlett Packard Enterprise Development LPInventors: Scott P. Faasse, David F. Heinrich
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Publication number: 20240070092Abstract: In some examples, a system includes a processor, a management controller; and a programmable device to provide input/output (I/O) expansion emulation to support communication with a plurality of I/O devices of a subsystem coupled to the system, where the programmable device provides a plurality of virtual registers as part of the I/O expansion emulation, the virtual registers associated with respective I/O devices of the plurality of I/O devices. The processor writes a value to a first virtual register of the plurality of virtual registers to trigger an output event relating to a first I/O device of the plurality of I/O devices at the subsystem. The management controller reads the first virtual register and, in response to the value written to the first virtual register, interact with the subsystem to issue the output event relating to the first I/O device at the subsystem.Type: ApplicationFiled: August 26, 2022Publication date: February 29, 2024Inventors: Binh Q. Nguyen, David F. Heinrich, Paul Anthony Kaler
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Patent number: 11757612Abstract: A process includes a port of a bridge providing a reference clock signal to a first end of an interconnect extending between the first port and a network interface controller. The reference clock signal propagates over the interconnect to provide, at a second end of the interconnect, a delayed reference clock signal at the network interface controller. Pursuant to the process, the bridge senses a timing of the delayed reference clock signal. The process includes communicating management traffic between a network interface of a baseboard management controller and the network interface controller via the interconnect. The communication of the management traffic includes the port, responsive to the sensing of the timing of the delayed reference clock signal, synchronizing communication of data with the first end of the interconnect to the delayed reference clock signal.Type: GrantFiled: October 29, 2021Date of Patent: September 12, 2023Assignee: Hewlett Packard Enterprise Development LPInventors: David F. Heinrich, Gennadiy Rozenberg, Scott P. Faasse, Melvin K. Benedict
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Publication number: 20230229132Abstract: A system is provided, which manages, by a microcontroller internal to a fan installed in a server, power data associated with the fan, wherein the fan includes two pins configured to communicate signals based on an inter-integrated circuit (I2C). During operation of the fan, the microcontroller measures a first and second amount of power consumed by the fan at a first and second time. The microcontroller transmits, via the two pins, the information to a system management entity which monitors and manages the server, wherein the system management entity controls a speed of the fan in response to receiving the measured power data and based on a net power comprising a difference between a total amount of power consumed by the server and an amount of power consumed by the fan.Type: ApplicationFiled: January 20, 2022Publication date: July 20, 2023Inventors: David F. Heinrich, Pranay Mahendra, Stephen Robert Jones, Gennadiy Rozenberg
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Publication number: 20230134324Abstract: An apparatus includes a host and a baseboard management controller. The baseboard management controller includes a semiconductor package; and the semiconductor package includes a memory, a security hardware processor; and a main hardware processor. The main hardware processor causes the baseboard management controller to serve as an agent that, independently from the host, responds to communications with a remote management entity to manage the host. The security hardware processor manages the storage of a secret of the host in the memory.Type: ApplicationFiled: October 28, 2021Publication date: May 4, 2023Inventors: Theodore F. Emerson, Shiva R. Dasari, Luis E. Luciani, JR., Kevin E. Boyum, Naysen J. Robertson, Robert L. Noonan, Christopher M. Wesneski, David F. Heinrich
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Publication number: 20230134197Abstract: A process includes a port of a bridge providing a reference clock signal to a first end of an interconnect extending between the first port and a network interface controller. The reference clock signal propagates over the interconnect to provide, at a second end of the interconnect, a delayed reference clock signal at the network interface controller. Pursuant to the process, the bridge senses a timing of the delayed reference clock signal. The process includes communicating management traffic between a network interface of a baseboard management controller and the network interface controller via the interconnect. The communication of the management traffic includes the port, responsive to the sensing of the timing of the delayed reference clock signal, synchronizing communication of data with the first end of the interconnect to the delayed reference clock signal.Type: ApplicationFiled: October 29, 2021Publication date: May 4, 2023Inventors: David F. Heinrich, Gennadiy Rozenberg, Scott P. Faasse, Melvin K. Benedict
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Publication number: 20230119437Abstract: A process includes an application layer of a host of a computer platform using a smart network interface card (NIC) of the computer platform to provide an input/output (I/O) service for the application layer. The I/O service includes a service that is associated with a cloud operator domain; the smart NIC is installed in a connector; and the application layers associated with a cloud tenant domain. The process includes a baseboard management controller of the smart NIC managing the computer platform. Managing the computer platform includes the baseboard management controller managing the host; the baseboard management controller managing components of the smart NIC other than the baseboard management controller; and managing the host includes the baseboard management controller communicating with the host via the connector to control a system power state of the computer platform.Type: ApplicationFiled: October 14, 2021Publication date: April 20, 2023Inventors: Scott P. Faasse, David F. Heinrich
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Patent number: 11494280Abstract: Examples described herein relate to consumption monitoring device and method for changing a client for its use of a networked resource. The consumption monitoring device may receive information regarding an out-of-band (OOB) performance parameter from a manageability controller corresponding to a networked resource subscribed by the client. The consumption monitoring device may determine a resource consumption metric corresponding to the networked resource for the client based at least on the information regarding the OOB performance parameter received from the manageability controller. The client may be charged based on the resource consumption metric.Type: GrantFiled: April 9, 2020Date of Patent: November 8, 2022Assignee: Hewlett Packard Enterprise Development LPInventors: David F. Heinrich, Scott Faasse
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Publication number: 20220326745Abstract: An apparatus can include a fan including a control pin. The fan may receive a pulse width modulated (PWM) signal at the control pin. The fan may further control a speed of the fan based on a duty cycle of the PWM signal when the PWM signal is in a first range and, responsive to the duty cycle of the PWM signal being in a second range, transmit information corresponding to the fan to an external controller.Type: ApplicationFiled: June 30, 2022Publication date: October 13, 2022Inventors: David F. Heinrich, Arthur Volkmann, Rachel Pollock
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Patent number: 11402882Abstract: An apparatus can include a fan including a control pin. The fan may receive a pulse width modulated (PWM) signal at the control pin. The fan may further control a speed of the fan based on a duty cycle of the PWM signal when the PWM signal is in a first range and, responsive to the duty cycle of the PWM signal being in a second range, transmit information corresponding to the fan to an external controller.Type: GrantFiled: September 19, 2018Date of Patent: August 2, 2022Assignee: Hewlett Packard Enterprise Development LPInventors: David F. Heinrich, Arthur Volkmann, Rachel Pollock
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Patent number: 11210252Abstract: A processor executes firmware to write control data describing transfer descriptors for a bus protocol engine to an address that is associated with a transfer descriptor buffer for the bus protocol engine. The bus protocol engine performs an operation according to the transfer descriptors with a slave device; the processor is part of a first semiconductor package; the bus protocol engine is part of a second semiconductor package other than the first semiconductor package; and the address corresponds to a memory of the second semiconductor package. A first physical interface of the first semiconductor package communicates with a second physical interface of the second semiconductor package to direct the control data to the memory.Type: GrantFiled: June 9, 2020Date of Patent: December 28, 2021Assignee: Hewlett Packard Enterprise Development LPInventors: Naysen J. Robertson, Robert L. Noonan, David F. Heinrich
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Publication number: 20210382832Abstract: Some examples described relate to securing a memory device of a computing system. For instance, a method may comprise comparing a command for the memory device to each command in a list of commands. The command is accepted when the command matches an authorized command in the list of commands. The accepted command is issued to the memory device.Type: ApplicationFiled: June 23, 2021Publication date: December 9, 2021Inventors: David F. HEINRICH, Theodore F. EMERSON, Don A. DYKES, Sukhamoy SOM
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Publication number: 20210382841Abstract: A processor executes firmware to write control data describing transfer descriptors for a bus protocol engine to an address that is associated with a transfer descriptor buffer for the bus protocol engine. The bus protocol engine performs an operation according to the transfer descriptors with a slave device; the processor is part of a first semiconductor package; the bus protocol engine is part of a second semiconductor package other than the first semiconductor package; and the address corresponds to a memory of the second semiconductor package. A first physical interface of the first semiconductor package communicates with a second physical interface of the second semiconductor package to direct the control data to the memory.Type: ApplicationFiled: June 9, 2020Publication date: December 9, 2021Inventors: Naysen J. Robertson, Robert L. Noonan, David F. Heinrich
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Publication number: 20210342169Abstract: A technique includes a baseboard management controller receiving, from a requestor, a request for a security function to be performed, where the request is directed to a physical security device other than the baseboard management controller. The technique includes, the baseboard management controller responding to the request to emulate a response to the security device to the request.Type: ApplicationFiled: April 29, 2020Publication date: November 4, 2021Inventors: David F. Heinrich, Luis E. Luciani, JR., Theodore F. Emerson, Sze Hau Loh
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Publication number: 20210318941Abstract: Examples described herein relate to consumption monitoring device and method for changing a client for its use of a networked resource. The consumption monitoring device may receive information regarding an out-of-band (OOB) performance parameter from a manageability controller corresponding to a networked resource subscribed by the client. The consumption monitoring device may determine a resource consumption metric corresponding to the networked resource for the client based at least on the information regarding the OOB performance parameter received from the manageability controller. The client may be charged based on the resource consumption metric.Type: ApplicationFiled: April 9, 2020Publication date: October 14, 2021Inventors: David F. Heinrich, Scott Faasse
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Patent number: 11074199Abstract: Some examples described relate to securing a memory device of a computing system. For instance, a method may comprise comparing a command for the memory device to each command in a list of commands. The command is accepted when the command matches an authorized command in the list of commands. The accepted command is issued to the memory device.Type: GrantFiled: January 27, 2016Date of Patent: July 27, 2021Assignee: Hewlett Packard Enterprise Development LPInventors: David F. Heinrich, Theodore F. Emerson, Don A. Dykes, Sukhamoy Som
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Patent number: 10866747Abstract: An arrangement for securing a memory device of a computing system in which a memory access command is compared to each command in a list of commands. The command, with specified attributes, is authenticated when the command and its attributes match an entry in the list of commands. Following authentication, the command is evaluated according to usage and behavior metrics in order to identify and prevent unauthorized or malicious access of the memory device. If no violation of usage or behavior metrics is detected, the command may be issued to the memory device for execution.Type: GrantFiled: June 3, 2019Date of Patent: December 15, 2020Assignee: Hewlett Packard Enterprise Development LPInventors: Sukhamoy Som, David F. Heinrich, Theodore F. Emerson
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Patent number: 10846254Abstract: Various examples described herein provide for a management controller that includes a virtual universal serial bus (USB) host controller that can emulate an actual USB host controller to a central processor. A particular endpoint from a number of endpoints is associated with a virtual USB device that is coupled to the virtual USB host controller. The particular endpoint is to refer to a location in a management memory.Type: GrantFiled: October 3, 2019Date of Patent: November 24, 2020Assignee: Hewlett Packard Enterprise Development LPInventors: Theodore F. Emerson, David F. Heinrich, Richard Wei Chieh Yu, Robert L. Noonan, Christopher J. Frantz, Sze Hau Loh
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Patent number: 10846219Abstract: A system and method for a computing device having a processor, a memory module including volatile memory for random access memory (RAM), and an integrated circuit to intercept an error signal from the processor, the intercept delaying a system shutdown of the computing device. Firmware is executed by the processor to copy contents of the volatile memory to a non-volatile memory during the delay of the system shutdown.Type: GrantFiled: July 31, 2015Date of Patent: November 24, 2020Assignee: Hewlett Packard Enterprise Development LPInventors: Thierry Fevrier, David F Heinrich, William C Hallowell, Mark S Fletcher, Justin Haanbyull Park, David W Engler
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Patent number: 10788872Abstract: Example implementations relate to a server node shutdown. For example, a system includes a control module and a secondary power supply. The control module includes a detect engine to detect an even that triggers a sequenced shutdown of a server node and prevent execution of the sequenced shutdown and execution of a data transfer. The control module also includes an initiate engine to initiate a data backup process, by a basic input/output system (BIOS) of the server node, to write data from a volatile memory location of the server node to a non-volatile memory location of the server node. The secondary power supply is to support the data backup process.Type: GrantFiled: September 21, 2015Date of Patent: September 29, 2020Assignee: Hewlett Packard Enterprise Development LPInventors: David F. Heinrich, David W. Engler, Patrick Raymond, William C. Hallowell