Abstract: An arrangement for securing a memory device of a computing system in which a memory access command is compared to each command in a list of commands. The command, with specified attributes, is authenticated when the command and its attributes match an entry in the list of commands. Following authentication, the command is evaluated according to usage and behavior metrics in order to identify and prevent unauthorized or malicious access of the memory device. If no violation of usage or behavior metrics is detected, the command may be issued to the memory device for execution.

Abstract: Various examples described herein provide for a management controller that includes a virtual universal serial bus (USB) host controller that can emulate an actual USB host controller to a central processor. A particular endpoint from a number of endpoints is associated with a virtual USB device that is coupled to the virtual USB host controller. The particular endpoint is to refer to a location in a management memory.

Abstract: An apparatus can include a fan including a control pin. The fan may receive a pulse width modulated (PWM) signal at the control pin. The fan may further control a speed of the fan based on a duty cycle of the PWM signal when the PWM signal is in a first range and, responsive to the duty cycle of the PWM signal being in a second range, transmit information corresponding to the fan to an external controller.

Abstract: A computing device having firmware, an uninterruptible power supply (UPS), and a memory module with volatile memory. Firmware tasks are prioritized to elevate tasks associated with the copying of the contents of the volatile memory to the nonvolatile memory external to the memory module during the loss of main or primary power.

Abstract: Various examples described herein provide for a management controller that includes a virtual universal serial bus (USB) host controller that can emulate an actual USB host controller to a central processor. A particular endpoint from a number of endpoints is associated with a virtual USB device that is coupled to the virtual USB host controller. The particular endpoint is to refer to a location in a management memory.

Abstract: An apparatus includes a plurality of compute nodes and a baseboard management controller that is shared by the plurality of compute nodes to manage video for the compute nodes. The baseboard management controller includes video controllers that are associated with the plurality of compute nodes and at least one resource that is shared by the video controllers.

Abstract: Example implementations relate to data transfer using backup power supply. For example, a system includes a shared backup power supply coupled to a node. The system also includes a controller to detect an interruption of primary power supply to the node and isolate a portion of the node from a sequenced shutdown of the node. The controller is further to initiate a transfer of data, utilizing the shared backup power supply, from volatile memory of the node to non-volatile memory of the node.

Abstract: A computing device having firmware, an uninterruptible power supply (UPS), and a memory module with volatile memory. Firmware tasks are prioritized to elevate tasks associated with the copying of the contents of the volatile memory to the nonvolatile memory external to the memory module during the loss of main or primary power.

Abstract: A system and method for a computing device having a processor, a memory module including volatile memory for random access memory (RAM), and an integrated circuit to intercept an error signal from the processor, the intercept delaying a system shutdown of the computing device. Firmware is executed by the processor to copy contents of the volatile memory to a non-volatile memory during the delay of the system shutdown.

Abstract: Some examples described relate to securing a memory device of a computing system. For instance, a method may comprise comparing a command for the memory device to each command in a list of commands. The command is accepted when the command matches an authorized command in the list of commands. The accepted command is issued to the memory device.

Abstract: In an example, a system comprises a read-only memory, and a processor. The processor to: access a first reset vector, wherein the first reset vector is associated with a first memory address, wherein the first memory address is located on the read-only memory. Responsive to the processor being reset, the processor to: access a second reset vector, wherein the second reset vector is associated with a second memory address, wherein the second memory address is different than the first memory address.

Abstract: Example implementations relate to a server node shutdown. For example, a system includes a control module and a secondary power supply. The control module includes a detect engine to detect an even that triggers a sequenced shutdown of a server node and prevent execution of the sequenced shutdown and execution of a data transfer. The control module also includes an initiate engine to initiate a data backup process, by a basic input/output system (BIOS) of the server node, to write data from a volatile memory location of the server node to a non-volatile memory location of the server node. The secondary power supply is to support the data backup process.

Abstract: Various examples described herein provide for a management controller that includes a virtual universal serial bus (USB) host controller that can emulate an actual USB host controller to a central processor. A particular endpoint from a number of endpoints is associated with a virtual USB device that is coupled to the virtual USB host controller. The particular endpoint is to refer to a location in a management memory.

Abstract: Example implementations relate to dynamically changing a power voltage to a system. For example, a system includes a power supply unit to provide power to the system and a control module. The control module is to dynamically enable a first output voltage level from the power supply unit to the system when the system is operating in a first mode, and to dynamically enable a second output voltage level from the power supply unit to the system when the system is operating in a second mode. The first output voltage level is greater than the second output voltage level.

Abstract: An apparatus includes a plurality of compute nodes and a baseboard management controller that is shared by the plurality of compute nodes to manage video for the compute nodes. The baseboard management controller includes video controllers that are associated with the plurality of compute nodes and at least one resource that is shared by the video controllers.

Abstract: A method for initializing a memory subsystem (212) of a management controller (200) includes, with an additional memory initialization module (206) of the management controller (200), initializing the memory subsystem (212) of the management controller (200) in response to the memory subsystem (212) not being properly initialized. A management controller (200) includes a memory subsystem (212) including a memory controller (214) and a memory (216); firmware (208) able to initialize the memory subsystem (212); and a memory initialization module (206) to initialize the memory subsystem (212) if the memory subsystem (212) is not properly initialized.

Abstract: Example implementations relate to data transfer using backup power supply. For example, a system includes a shared backup power supply coupled to a node. The system also includes a controller to detect an interruption of primary power supply to the node and isolate a portion of the node from a sequenced shutdown of the node. The controller is further to initiate a transfer of data, utilizing the shared backup power supply, from volatile memory of the node to non-volatile memory of the node.

Abstract: Example implementations relate to data backup. For example, a data backup can include tracking a location of a data block on a first node and initiating a transfer, utilizing a backup power supply, of the data block to a non-volatile memory location on a second node in response to an interruption of a primary power supply. In addition, the data block can be restored to the tracked location of the first node responsive to a restoration of the primary power supply.

Abstract: A memory controller containing one or more ports coupled to a buffer selection logic and a plurality of buffers. Each buffer is configured to store write data associated with a write request and each buffer is also coupled to the buffer selection logic. The buffer selection logic is configured to store write data associated with a write request from at least one of the ports in any of the buffers based on a priority of the buffers for each one of the ports.

Abstract: An intelligent air moving apparatus for cooling an electronics enclosure includes a motor for driving a fan at a variable rotational speed and a microcontroller for controlling the rotational speed of the motor. The microcontroller includes a speed sensor for sensing the rotational speed such that when the sensed rotational speed deviates below a target speed, the microcontroller detects a locked rotor condition.