Abstract: A method for controlling target sound playback. A display screen of a control device is configured to display a target sound user setting for controlling target sound playback, wherein the target sound user setting controls a stored target sound level parameter that is stored within memory of the control device. A target sound sequence is generated in accordance with the user setting. A speaker is driven with the target sound sequence. Other aspects are also described and claimed.

Abstract: Provided is an optical apparatus that includes an illumination assembly which include an extended radiation source emitting radiation with a controllable spatial distribution and telecentric condensing optics, configured to receive and project the emitted radiation with a numerical aperture exceeding 0.3 along a first optical axis onto a field and an imaging assembly that includes a sensor and objective optics configured to image the field along a second optical axis onto the sensor and also a prism combiner positioned between the field and the condensing and objective optics which is configured to combine the first and second optical axes, while reflecting at least one of the optical axes multiple times within the prism combiner.

Abstract: The application describes a method for mapping nodes of a network using Stream Control Transmission Protocol (SCTP) probing. Packets are sent to open ports of the nodes. Response packets are received from the nodes. Signatures are generated using headers of the response packets. The nodes are classified using the signatures. The node are mapped to elements of the network using the signatures. Rogue devices may be detected based on the mapped nodes.

Abstract: The application describes a method for mapping nodes of a network using Stream Control Transmission Protocol (SCTP) probing. Packets are sent to open ports of the nodes. Response packets are received from the nodes. Signatures are generated using headers of the response packets. The nodes are classified using the signatures. The node are mapped to elements of the network using the signatures. Rogue devices may be detected based on the mapped nodes.

Abstract: A distance measuring system is provided for auto focusing a camera of an inspection system for inspecting a planar surface that is patterned. The system includes a pattern generator, an image sensor, an optical element(s) and a processor. The pattern generator projects a spatially random pattern toward the planar surface at an oblique angle. The optical element(s) forms the image of the reflected pattern on the image sensor and the image sensor captures an image of the spatially random pattern reflected off the planar surface. The processor processes the image of the spatially random pattern and provides auto-focus information.

Abstract: An online system transmits a notification including a reference to an application to a client device associated with a user. Upon receiving an interaction with the reference to the application, the online system may transmit instructions for retrieving the application to an additional client device associated with the user. For example, if the client device used to interact with the reference has a device type different than a device type associated with the application, the online system selects an additional client device having a device type matching the device type associated with the application to receive the instruction for retrieving the application.

Abstract: System and method for providing precision a self calibrating resistance circuit is described that provides for matching a reference resistor using dynamically configurable resistance networks. The resistor network is coupled to the connection, wherein the resistor network provides a configurable resistance across the connection. In addition, the resistor network comprises a digital resistor network and an analog resistor network. Also, the circuit includes control circuitry for configuring the configurable resistance based on a reference resistance of the reference resistor. The configurable resistance is configured by coarsely tuning the resistor network through the digital resistor network and fine tuning the resistor network through the analog resistor network.

Abstract: System and method for providing precision a self calibrating resistance circuit is described that provides for matching a reference resistor using dynamically configurable resistance networks. The resistor network is coupled to the connection, wherein the resistor network provides a configurable resistance across the connection. In addition, the resistor network comprises a digital resistor network and an analog resistor network. Also, the circuit includes control circuitry for configuring the configurable resistance based on a reference resistance of the reference resistor. The configurable resistance is configured by coarsely tuning the resistor network through the digital resistor network and fine tuning the resistor network through the analog resistor network.

Abstract: A distance measuring system is provided for auto focusing a camera of an inspection system for inspecting a planar surface that is patterned. The system includes a pattern generator, an image sensor, an optical element(s) and a processor. The pattern generator projects a spatially random pattern toward the planar surface at an oblique angle. The optical element(s) forms the image of the reflected pattern on the image sensor and the image sensor captures an image of the spatially random pattern reflected off the planar surface. The processor processes the image of the spatially random pattern and provides auto-focus information.

Abstract: A semiconductor chip that may be configured to function as either a master chip or a slave chip. The semiconductor chip may be included in a microelectronic assembly including a plurality of vertically stacked semiconductor chips, with each of the chips containing functional circuit blocks that enable each semiconductor chip to function as either a master chip or a slave chip under in accordance with a state input stored on the same chip, or received from another chip in the stacked assembly or from another component of a system in which the stacked assembly is configured to operate.

Abstract: System and method for providing precision a self calibrating resistance circuit is described that provides for matching a reference resistor using dynamically configurable resistance networks. The resistor network is coupled to the connection, wherein the resistor network provides a configurable resistance across the connection. In addition, the resistor network comprises a digital resistor network and an analog resistor network. Also, the circuit includes control circuitry for configuring the configurable resistance based on a reference resistance of the reference resistor. The configurable resistance is configured by coarsely tuning the resistor network through the digital resistor network and fine tuning the resistor network through the analog resistor network.

Abstract: A semiconductor chip that may be configured to function as either a master chip or a slave chip. The semiconductor chip may be included in a microelectronic assembly including a plurality of vertically stacked semiconductor chips, with each of the chips containing functional circuit blocks that enable each semiconductor chip to function as either a master chip or a slave chip under in accordance with a state input stored on the same chip, or received from another chip in the stacked assembly or from another component of a system in which the stacked assembly is configured to operate.

Abstract: An online system transmits a notification including a reference to an application to a client device associated with a user. Upon receiving an interaction with the reference to the application, the online system may transmit instructions for retrieving the application to an additional client device associated with the user. For example, if the client device used to interact with the reference has a device type different than a device type associated with the application, the online system selects an additional client device having a device type matching the device type associated with the application to receive the instruction for retrieving the application.

Abstract: A method of generating a voltage on an integrated circuit device comprising a memory cell array including (i) a plurality of memory cells, arranged in a matrix of rows and columns, and (ii) a plurality of bit lines, wherein each bit line includes a plurality of memory cells. The integrated circuit device further comprises voltage generation circuitry, coupled to a plurality of the bit lines, to (i) apply a first voltage to a first group of associated bit lines, (ii) apply a second voltage to a second group of associated bit lines, (iii) generate a third voltage by connecting the first group of associated bit lines and the second group of associated bit lines, and (iv) output the third voltage. Also, disclosed is a method of operation and/or control of such an integrated circuit device as well as such voltage generation circuitry.

Abstract: System and method for providing precision a self calibrating resistance circuit is described that provides for matching a reference resistor using dynamically configurable resistance networks. The resistor network is coupled to the connection, wherein the resistor network provides a configurable resistance across the connection. In addition, the resistor network comprises a digital resistor network and an analog resistor network. Also, the circuit includes control circuitry for configuring the configurable resistance based on a reference resistance of the reference resistor. The configurable resistance is configured by coarsely tuning the resistor network through the digital resistor network and fine tuning the resistor network through the analog resistor network.

Abstract: A system and method for illuminating an elongated field of view of a linear or high aspect ratio area image sensor comprises providing illumination with an elongated field shape with a plurality of discrete light sources and projecting the illumination toward an object to be imaged; wherein the illumination projected on the object is substantially spatially invariant in intensity and angular distribution along the elongated field shape on the object.

Abstract: A new architecture for machine vision system that uses area sensor (or line sensor), with telecentric imaging optics compound with telecentric illumination module is described. The illumination module may include a bright field illumination source and/or a dark field illumination source. The telecentric imaging optics includes an upper imaging module having an aperture stop and a lower imaging module positioned between the upper imaging module and object, such that the light source and the aperture stop are located in the back focal plane of the lower imaging module. The lower imaging module images the illumination source into a plane of an aperture stop of the upper imaging module. The optical axis of the upper imaging module is offset with respect to the lower imaging module. The optical axis of the telecentric illumination module is offset with respect to the axis of the lower imaging module in the opposite direction.

Abstract: An integrated circuit device (e.g., a logic device or a memory device) having a memory cell array including a plurality of bit lines (e.g., first and second bit lines) and a plurality of bit line segments (e.g., first and second bit line segments) wherein each bit line segment is selectively and responsively coupled to or decoupled from its associated bit line via an associated isolation circuit. The memory cell array further includes a plurality of memory cells, wherein each memory cell includes a transistor having a first region, a second region, a body region, and a gate coupled to an associated word line via an associated word line segment. A first group of memory cells is coupled to the first bit line via the first bit line segment and a second group of memory cells is coupled to the second bit line via the second bit line segment.

Abstract: A method of generating a voltage on an integrated circuit device comprising a memory cell array including (i) a plurality of memory cells, arranged in a matrix of rows and columns, and (ii) a plurality of bit lines, wherein each bit line includes a plurality of memory cells. The integrated circuit device further comprises voltage generation circuitry, coupled to a plurality of the bit lines, to (i) apply a first voltage to a first group of associated bit lines, (ii) apply a second voltage to a second group of associated bit lines, (iii) generate a third voltage by connecting the first group of associated bit lines and the second group of associated bit lines, and (iv) output the third voltage. Also, disclosed is a method of operation and/or control of such an integrated circuit device as well as such voltage generation circuitry.

Abstract: A method of generating a voltage as well as an integrated circuit device (e.g., a logic device or a memory device) having a memory cell array which includes (i) a plurality of memory cells, wherein each memory cell array including (i) a plurality of memory cells, arranged in a matrix of rows and columns, and (ii) a plurality of bit lines, wherein each bit line includes a plurality of memory cells. The integrated circuit further includes voltage generation circuitry, coupled to a plurality of the bit lines, to (i) apply a first voltage to a first group of associated bit lines, and (ii) apply a second voltage to a second group of associated bit lines, and (iii) generate a third voltage by connecting the first group of associated bit lines and the second group of associated bit lines, and (iv) output the third voltage. Also, disclosed is a method of operation and/or control of such an integrated circuit device as well as such voltage generation circuitry.