Abstract: An enhanced bus turnaround integrated circuit dynamic random access memory ("DRAM") device of particular utility in providing maximum DRAM performance while concomitantly affording a device with may be readily integrated into systems designed to use zero bus turnaround ("ZBT"), or pipeline burst static random access memory ("SRAM") devices. The enhanced bus turnaround DRAM device of the present invention provides much of the same benefits of a conventional ZBT SRAM device with a similar pin-out, timing and function set while also providing improvements in device density, power consumption and cost approaching that of straight DRAM memory. Through the provision of a "Wait" pin, the enhanced bus turnaround device of the present invention can signal the system memory controller when additional wait states must be added yet still provide virtually identical data access time performance to that of ZBT SRAM for all Read and Write operations with a burst length of four or greater.

Abstract: A receiver circuit for an integrated circuit including an input buffer having an input coupled to receive an external input signal and an output coupled to generate a buffered input signal in response to the external input signal. The input buffer is selectively enabled by a control signal. A latch is coupled to receive the buffered input signal and to generate a latched output signal. A delay circuit is coupled to receive the latched output signal and to generate a delayed signal. A comparator is coupled to receive both the latched output signal and the delayed signal. The comparator has an output coupled to the input buffer to generate the control signal.

Abstract: An intelligent switching mechanism for the backup batteries of an alarm system is disclosed. When AC input power has failed but no alarm has been declared, the batteries are switched into a parallel configuration, which is sufficient to supply the control panel, so that the batteries are drained in tandem. When AC input power has failed and an alarm has been declared, the batteries are switched into a series configuration to supply power at the higher voltage required by the alarm annunciators.