Patents by Inventor David K. Foote

David K. Foote has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6022799
    Abstract: A local interconnection to a device region in/on a substrate is formed by depositing either silicon oxynitride or silicon oxime as an etch stop layer, at a temperature of less than about 480.degree. C. to increase the hot carrier injection (HCI) lifetime of the resulting semiconductor device. A dielectric layer is then deposited over the etch stop layer and through-holes are etched exposing the etch stop layer using a first etching process. A second etching process is then conducted, which etches through the etch stop layer exposing at least one device region. The resulting through-hole is then filled with conductive material(s) to form a local interconnection.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: February 8, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: David K. Foote, Minh Van Ngo, Darin A. Chan
  • Patent number: 5990524
    Abstract: During damascene formation of local interconnects in a semiconductor wafer, a punch-through region can be formed into the substrate as a result of exposing the oxide spacers that are adjacent to a transistor gate to one or more etching plasmas that are used to etch one or more overlying dielectric layers. A punch-through region can damage the transistor circuit. Improved, multipurpose spacers are provided to reduce the chances of over-etching. The multipurpose spacers are made of silicon oxime. The etching plasmas that are used to etch one or more overlying dielectric layers tend to have a higher selectivity ratio to the multipurpose spacers than to the conventional oxide spacers. Additionally, the multipurpose spacers do not tend to degrade the hot carrier injection (HCI) properties as would a typical nitride spacer.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: November 23, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: William G. En, Minh Van Ngo, Chih-Yuh Yang, David K. Foote, Scott A. Bell, Olov B. Karlsson, Christopher F. Lyons
  • Patent number: 5989957
    Abstract: A semiconductor memory device such as a flash Electrically Erasable Programmable Read-Only Memory (Flash EEPROM) includes a floating gate with high data retention. A tungsten damascene local interconnect structure includes a silicon oxynitride etch stop layer which is formed using Plasma Enhanced Chemical Vapor Deposition (PECVD) at a temperature of at least 480.degree. C. such that the etch stop layer has a very low concentration of hydrogen ions. The minimization of hydrogen ions, which constitute mobile positive charge carriers, in the etch stop layer, minimizes recombination of the hydrogen ions with electrons on the floating gate, and thereby maximizes data retention of the device.
    Type: Grant
    Filed: May 21, 1997
    Date of Patent: November 23, 1999
    Assignee: Advanced Micro Devices
    Inventors: Minh Van Ngo, Sunil Mehta, David K. Foote
  • Patent number: 5963841
    Abstract: A gate is formed on a semiconductor substrate by using a bottom anti-reflective coating (BARC) to better control the critical dimension (CD) of the gate as defined via a deep-UV resist mask formed thereon. The wafer stack includes a gate oxide layer over a semiconductor substrate, a polysilicon gate layer over the gate oxide layer, a SiON BARC over the conductive layer, a thin oxide film over the SiON BARC. The resist mask is formed on the oxide film. The SiON BARC improves the resist mask formation process. The wafer stack is then shaped to form one or more polysilicon gates by sequentially etching through selected portions of the oxide film, the BARC, and the gate conductive layer as defined by the etch windows in the resist mask. Once properly shaped, the remaining portions of the resist mask, oxide film and SiON BARC are removed.
    Type: Grant
    Filed: September 5, 1997
    Date of Patent: October 5, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Olov B. Karlsson, Christopher F. Lyons, Minh Van Ngo, Scott A. Bell, David K. Foote
  • Patent number: 5895269
    Abstract: During damascene formation of local interconnects in a semiconductor wafer, a punch-through region can be formed into the substrate as a result of exposing the oxide spacers that are adjacent to a transistor gate to one or more etching plasmas that are used to etch one or more overlying dielectric layers. A punch-through region can damage the transistor circuit. In order to prevent punch-through, the oxide spacers are removed prior to forming an overlying dielectric layer.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: April 20, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Fei Wang, Minh Van Ngo, Darin A. Chan, David K. Foote, William G. En
  • Patent number: 5710067
    Abstract: A silicon oxime film is formed by plasma enhanced chemical vapor deposition. The silicon oxime film is useful as an anti-reflection layer during photolithography, as an etch stop, and as a protection layer.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: January 20, 1998
    Assignee: Advanced Micro Devices, Inc.
    Inventors: David K. Foote, Subash Gupta