Patents by Inventor David Sherrer
David Sherrer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20130333820Abstract: A process to form devices may include forming a seed layer on and/or over a substrate, modifying a seed layer selectively, forming an image-wise mold layer on and/or over a substrate and/or electrodepositing a first material on and/or over an exposed conductive area. A process may include selectively applying a temporary patterned passivation layer on a conductive substrate, selectively forming an image-wise mold layer on and/or over a substrate, forming a first material on and/or over at least one of the exposed conductive areas and/or removing a temporary patterned passivation layer. A process may include forming a sacrificial image-wise mold layer on a substrate layer, selectively placing one or more first materials in one or more exposed portions of a substrate layer, forming one or more second materials on and/or over a substrate layer and/or removing a portion of a sacrificial image-wise mold layer.Type: ApplicationFiled: August 13, 2013Publication date: December 19, 2013Applicant: NUVOTRONICS, LLCInventor: David Sherrer
-
Publication number: 20130016022Abstract: Disclosed and claimed herein is a hollow core coaxial cable, having a dielectric capillary with an inside wall and an outside wall, an inner conductive layer on the inside wall of the hollow core coaxial cable and an outer conductive layer on the outside wall of the hollow core coaxial cable, the conductive layers may be patterned. Further disclosed is a method of making the hollow core coaxial cable. Further disclosed are holey fiber coaxial cables, having a holey fiber capillary having an inside wall and an outside wall, an inner conductive layer on the inside wall of the hollow core coaxial cable and an outer conductive layer on the outside wall of the hollow core coaxial cable, the conductive layers may be patterned.Type: ApplicationFiled: July 14, 2011Publication date: January 17, 2013Inventors: Noel Heiks, David Sherrer
-
Publication number: 20120062335Abstract: An apparatus comprising a first power combiner/divider network and a second power combiner/divider network. The first power combiner/divider network splits a first electromagnetic signal into split signals that are connectable to signal processor(s). The second power combiner/divider network combines processed signals into a second electromagnetic signal. The apparatus includes a three-dimensional coaxial microstructure.Type: ApplicationFiled: July 5, 2011Publication date: March 15, 2012Inventors: David Sherrer, Jean-Marc Rollin, Kenneth Vanhille, Marcus Oliver, Steven Huetiner
-
Patent number: 8050526Abstract: A method for making a micro optical device includes providing an optical element, providing a glass perform, providing a substrate with a precision formed feature designed to passively position the optical element relative to the substrate, and bonding the optical element to the substrate using the glass perform. The optical element is passively located in a predefined relationship with the substrate, and the glass perform has a shape prior to contacting the substrate that is maintained before the bonding.Type: GrantFiled: January 19, 2006Date of Patent: November 1, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Garo Khanarian, Margaret M. Pafford, David Sherrer
-
Publication number: 20110181377Abstract: A transmission line structure, a transmission line thermal manager and/or process thereof. A transmission line thermal manager may include a thermal member. A thermal member may be configured to form a thermal path, for example away from one or more inner conductors of a transmission line. A part of a thermal member may be formed of an electrically insulative and thermally conductive material. One or more inner conductors may be spaced apart from one or more outer conductors in a transmission line. A transmission line and/or a transmission line thermal manager may be configured to maximize a signal through a system, for example by modifying the geometry of one or more transmission line conductors and/or of a thermal manager.Type: ApplicationFiled: January 22, 2011Publication date: July 28, 2011Inventors: Kenneth Vanhille, David Sherrer
-
Publication number: 20110181376Abstract: An apparatus may include one or more conductive surfaces, waveguide structures and/or ports. One or more waveguide structures may include a portion disposed above a conductive surface, an outer conductor, and/or an inner conductor. A first portion of an outer conductor may be connected to a conductive surface. A port end of an outer conductor may be connected to an outer conductor port. An inner conductor may be disposed inside and spaced apart from an outer conductor. An inner conductor port may be connected to an inner conductor. An inner conductor of two or more waveguide structures may be connected to each other. A conductive surface may include at least one aperture portion, which may have a width substantially similar to the width of a waveguide structure. A substrate may be disposed between one or more waveguide structures and a conductive surface for a substantial portion of a waveguide structure.Type: ApplicationFiled: January 22, 2011Publication date: July 28, 2011Inventors: Kenneth Vanhille, David Sherrer
-
Publication number: 20110123783Abstract: A process to form devices may include forming a seed layer on and/or over a substrate, modifying a seed layer selectively, forming an image-wise mold layer on and/or over a substrate and/or electrodepositing a first material on and/or over an exposed conductive area. A process may include selectively applying a temporary patterned passivation layer on a conductive substrate, selectively forming an image-wise mold layer on and/or over a substrate, forming a first material on and/or over at least one of the exposed conductive areas and/or removing a temporary patterned passivation layer. A process may include forming a sacrificial image-wise mold layer on a substrate layer, selectively placing one or more first materials in one or more exposed portions of a substrate layer, forming one or more second materials on and/or over a substrate layer and/or removing a portion of a sacrificial image-wise mold layer.Type: ApplicationFiled: November 23, 2010Publication date: May 26, 2011Inventor: David Sherrer
-
Publication number: 20100129193Abstract: Smooth, preferably variable-sweep fluid collection device surfaces disposed into opposition with wind, river, surf, ocean or tidal currents generate enhanced velocity fluid flows at length driven into onboard work-extracting disc turbines at advantageous angles of attack. Keyed to shafts turning freely through optionally extendable volutes, disc turbines comprising a dense population of smooth, axially fixed or adjustably spaced discs conducting preferably laminar flow between adjacent elements develop significant torque through boundary layer adhesion and viscous shear-stress between fluid layers. Exhaust of disc turbine throughput into divergent channels drafting into external currents of initially higher than ambient velocity and lower pressure may reduce turbine discharge backpressure, rapidly clear system throughput, and allow normally disadvantageous drag to be utilized to develop greater work generation.Type: ApplicationFiled: May 5, 2008Publication date: May 27, 2010Inventor: Gordon David Sherrer
-
Publication number: 20080050582Abstract: A multi-level optical device includes a substrate having a baseline level. At least one feature is disposed at a level above the baseline level. At least one feature is disposed at a level below the baseline level, or in the feature above the baseline level is located at a distance apart from the feature below the baseline level. The distance has an accuracy inn the range of approximately ±0.05 ?m to less than approximately ±1.0 ?m. A method of fabricating an optical device includes forming at least one feature at a level of above a baseline level of a substrate; and forming at least one feature at a baseline level below the baseline level of the substrate, wherein the feature at a level above the baseline level and the feature at a level below the baseline level are patterned in a single-mask step using a multi-level mask.Type: ApplicationFiled: August 13, 2007Publication date: February 28, 2008Applicant: Shipley Company, L.L.C.Inventors: Dan Steinberg, David Sherrer
-
Publication number: 20070164419Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.Type: ApplicationFiled: October 31, 2006Publication date: July 19, 2007Applicant: Rohm and Haas Electronic Materials LLCInventors: David Sherrer, Larry Rasnake, John Fisher
-
Publication number: 20070152782Abstract: Provided are coaxial waveguide microstructures. The microstructures include a substrate and a coaxial waveguide disposed above the substrate. The coaxial waveguide includes: a center conductor; an outer conductor including one or more walls, spaced apart from and disposed around the center conductor; one or more dielectric support members for supporting the center conductor in contact with the center conductor and enclosed within the outer conductor; and a core volume between the center conductor and the outer conductor, wherein the core volume is under vacuum or in a gas state. Also provided are methods of forming coaxial waveguide microstructures by a sequential build process and hermetic packages which include a coaxial waveguide microstructure.Type: ApplicationFiled: December 12, 2006Publication date: July 5, 2007Applicant: Rohm and Haas Electronic Materials LLCInventors: David Sherrer, John Fisher
-
Publication number: 20070092178Abstract: The present invention provides a micro-optical device which may be used as an optical pigtailing assembly for waveguides. In an exemplary configuration the assembly includes a first chip which includes an optoelectronic component and an optical fiber. The optical fiber and optoelectronic component are coupled with an optical component, such as one or more waveguides on an integrated optic chip.Type: ApplicationFiled: October 11, 2006Publication date: April 26, 2007Applicant: Rohm and Haas Electronic Materials LLCInventors: Carl Gaebe, Noel Heiks, David Sherrer
-
Publication number: 20070072321Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.Type: ApplicationFiled: October 31, 2006Publication date: March 29, 2007Applicant: Rohm and Haas Electronic Materials LLCInventors: David Sherrer, Larry Rasnake, John Fisher
-
Publication number: 20070040268Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.Type: ApplicationFiled: October 31, 2006Publication date: February 22, 2007Applicant: Rohm and Haas Electronic Materials LLCInventors: David Sherrer, Larry Rasnake, John Fisher
-
Publication number: 20060284294Abstract: An optical device package includes a substrate having an upper surface, a distal end, a proximal end, and distal and proximal longitudinally extending notches co-linearly aligned with each other. A structure is mounted to the substrate and has at least one recessed portion. The structure can be a lid or a frame to which a lid is bonded. An optical fiber is positioned within at least one of the proximal longitudinally extending notch and the distal longitudinally extending notch and within the recessed portion of the structure mounted to the substrate. The optical device package can also include conductive legs extending upwardly from bonding pads on the upper surface of the substrate to facilitate flip mounting of the optical device package onto a circuit board or other such platform.Type: ApplicationFiled: August 11, 2006Publication date: December 21, 2006Applicants: Rohm and Haas Electronic Materials LLCInventors: David Sherrer, Mindaugas Dautartas, Neil Ricks, Dan Steinberg
-
Publication number: 20060278814Abstract: An optical microbench configured to facilitate wafer-level testing of opto-electronic devices is provided. The optical microbench includes an optoelectronic device mounted to a wafer in which the optical microbench is provided. The optical microbench also includes a beam deflector provided in the wafer and disposed along the optical path of the optoelectronic device. The beam deflector is configured to deflect a portion of the optical path to lie along a direction oriented out of the plane of the wafer. The optical microbench further includes an optical feed-through disposed along the optical path between the optoelectronic device and the beam deflector. The optical feed-through is configured to conduct an optical signal between the beam deflector and the optoelectronic device. A method for testing optoelectronic devices at the wafer level is also provided.Type: ApplicationFiled: June 5, 2006Publication date: December 14, 2006Applicants: Rohm and Haas Electronic Materials LLCInventor: David Sherrer
-
Publication number: 20060278821Abstract: Provided are optoelectronic components which include an optoelectronic device mounted on a silicon substrate and a flexible circuit electrically connected to the optoelectronic device.Type: ApplicationFiled: August 18, 2006Publication date: December 14, 2006Applicant: Rohm and Haas Electronic Materials LLCInventors: David Sherrer, Noel Heiks
-
Publication number: 20060275012Abstract: A first waveguide holding member has a first transverse surface region and a first optical waveguide having an end terminating at the first transverse surface region. A second waveguide holding member has a second transverse surface region which confronts the first transverse surface region of the first waveguide holding member and a second optical waveguide having an end terminating at the second transverse surface region. A guide member is operatively coupled to the first and second waveguide holding members and guides the first waveguide holding member in a transverse direction relative to the second waveguide holding member so as to selectively optically couple and decouple the ends of the first and second optical waveguides.Type: ApplicationFiled: June 5, 2006Publication date: December 7, 2006Inventors: Dan Steinberg, David Sherrer, Mindaugas Dautartas, Donald Leber
-
Publication number: 20060174652Abstract: Micro-optical devices and methods of making the same are disclosed, wherein the disclosed micro-optical devices and methods include passive alignment features.Type: ApplicationFiled: January 19, 2006Publication date: August 10, 2006Inventors: Garo Khanarian, Margaret Pafford, David Sherrer
-
Publication number: 20060164190Abstract: Provided are coaxial waveguide microstructures. The microstructures include a substrate and a coaxial waveguide disposed above the substrate. The coaxial waveguide includes: a center conductor; an outer conductor including one or more walls, spaced apart from and disposed around the center conductor; one or more dielectric support members for supporting the center conductor in contact with the center conductor and enclosed within the outer conductor; and a core volume between the center conductor and the outer conductor, wherein the core volume is under vacuum or in a gas state. Also provided are methods of forming coaxial waveguide microstructures by a sequential build process and hermetic packages which include a coaxial waveguide microstructure.Type: ApplicationFiled: December 22, 2005Publication date: July 27, 2006Applicant: Rohm and Haas Electronic Materials LLCInventors: David Sherrer, John Fisher