Abstract: A memory element includes a first piezotronic transistor coupled to a second piezotronic transistor; the first and second piezotronic transistors each comprising a piezoelectric (PE) material and a piezoresistive (PR) material, wherein an electrical resistance of the PR material is dependent upon an applied voltage across the PE material by way of an applied pressure to the PR material by the PE material.

Abstract: A memory cell device includes a semiconductor nanowire extending, at a first end thereof, from a substrate; the nanowire having a doping profile so as to define a field effect transistor (FET) adjacent the first end, the FET further including a gate electrode at least partially surrounding the nanowire, the doping profile further defining a p-n junction in series with the FET, the p-n junction adjacent a second end of the nanowire; and a phase change material at least partially surrounding the nanowire, at a location corresponding to the p-n junction.

Abstract: A doped, passivated graphene nanomesh includes a graphene nanomesh, a plurality of nanoholes formed in a graphene sheet, and a plurality of carbon atoms which are formed adjacent to the plurality of nanoholes; a passivating element bonded to the plurality of carbon atoms; and a dopant bonded to the passivating element, the dopant comprising one of an electron-donating element for making the graphene nanomesh an n-doped graphene nanomesh, and an electron-accepting element for making the graphene nanomesh a p-doped graphene nanomesh.

Abstract: The present invention provides a nano-fluidic field effective device. The device includes a channel having a first side and a second side, a first set of electrodes adjacent to the first side, a second set of electrodes adjacent to the second side, a control unit for applying electric potentials to the electrodes and a fluid within the channel containing a charge molecule. The first set of electrodes is disposed such that application of electric potentials produces a spatially varying electric field that confines a charged molecule within a predetermined area of said channel. The second set of electrodes is disposed such that application of electric potentials relative to the electric potentials applied to the first set of electrodes creates an electric field that confines the charged molecule to an area away from the second side of the channel.

Abstract: The present invention provides a nano-fluidic field effective device. The device includes a channel having a first side and a second side, a first set of electrodes adjacent to the first side, a second set of electrodes adjacent to the second side, a control unit for applying electric potentials to the electrodes and a fluid within the channel containing a charge molecule. The first set of electrodes is disposed such that application of electric potentials produces a spatially varying electric field that confines a charged molecule within a predetermined area of said channel. The second set of electrodes is disposed such that application of electric potentials relative to the electric potentials applied to the first set of electrodes creates an electric field that confines the charged molecule to an area away from the second side of the channel.

Abstract: A method of making a semiconductor device, includes providing a graphene sheet, creating a plurality of nanoholes in the graphene sheet to form a graphene nanomesh, the graphene nanomesh including a plurality of carbon atoms which are formed adjacent to the plurality of nanoholes, passivating a dangling bond on the plurality of carbon atoms by bonding a passivating element to the plurality of carbon atoms, and doping the passivated graphene nanomesh by bonding a dopant to the passivating element.

Abstract: Embodiments include a wireless keyboard having a plurality of keys and a plurality of radio frequency identification (RFID) tags, wherein each of the plurality of RFID tags are coupled to one of the plurality of keys. Each of the RFID tags are configured to transmit a signal when one of the plurality of keys coupled to RFID tag is pressed.

Abstract: A method of storing a bit at a memory device is disclosed. A memory cell the memory device is formed of a germanium-deficient chalcogenide glass configured to alternate between an amorphous phase and a crystalline phase upon application of a selected voltage, wherein a drift coefficient of the germanium-deficient chalcogenide glass is less than a drift coefficient of an undoped chalcogenide glass. A voltage is applied to the formed memory cell to select one of the amorphous phase and the crystalline phase to store the bit.

Abstract: A memory element includes a first piezotronic transistor coupled to a second piezotronic transistor; the first and second piezotronic transistors each comprising a piezoelectric (PE) material and a piezoresistive (PR) material, wherein an electrical resistance of the PR material is dependent upon an applied voltage across the PE material by way of an applied pressure to the PR material by the PE material.

Abstract: A electrometric access head includes a supporting substrate and a plurality of read elements mounted on the supporting substrate. Each read element includes an electrometric sensor for detection of a sign of polarization of domains within a ferroelectric data layer of a ferroelectric storage medium. The ferroelectric data layer serves as a layer for storing information as bits defined by the signs of polarization of domains within the ferroelectric data layer, each polarized domain including a volume dipole polarization within the ferroelectric data layer and including an area of bound charge on and adjacent to a surface of the ferroelectric data layer.

Abstract: A method of storing a bit at a memory device is disclosed. A memory cell the memory device is formed of a germanium-deficient chalcogenide glass configured to alternate between an amorphous phase and a crystalline phase upon application of a selected voltage, wherein a drift coefficient of the germanium-deficient chalcogenide glass is less than a drift coefficient of an undoped chalcogenide glass. A voltage is applied to the formed memory cell to select one of the amorphous phase and the crystalline phase to store the bit.

Abstract: A method of storing a bit at a memory device is disclosed. A memory cell the memory device is formed of a germanium-deficient chalcogenide glass configured to alternate between an amorphous phase and a crystalline phase upon application of a selected voltage, wherein a drift coefficient of the germanium-deficient chalcogenide glass is less than a drift coefficient of an undoped chalcogenide glass. A voltage is applied to the formed memory cell to select one of the amorphous phase and the crystalline phase to store the bit.

Abstract: A method of storing a bit at a memory device is disclosed. A memory cell the memory device is formed of a germanium-deficient chalcogenide glass configured to alternate between an amorphous phase and a crystalline phase upon application of a selected voltage, wherein a drift coefficient of the germanium-deficient chalcogenide glass is less than a drift coefficient of an undoped chalcogenide glass. A voltage is applied to the formed memory cell to select one of the amorphous phase and the crystalline phase to store the bit.

Abstract: A three-terminal switching device for use in integrated circuit devices, including a phase change material (PCM) disposed in contact between a first terminal and a second terminal; a heating device disposed in direct electrical contact between said second terminal and a third terminal, said heating device positioned proximate said PCM, and configured to switch the conductivity of a transformable portion of said PCM between a lower resistance crystalline state and a higher resistance amorphous state; and an insulating layer configured to electrically isolate said heater from said PCM material, and said heater from said first terminal.

Abstract: Disclosed is a method which includes forming a bottom metallic electrode on an insulating substrate; forming a semiconductor junction on the metallic electrode; forming a transparent conducting overlayer in contact with the semiconductor junction; and forming a metallic layer in contact with the transparent conducting overlayer, wherein the metallic layer is formed by a plating process. The plating process may be an electroplating process or an electroless plating process. The transparent conducting overlayer may be carbon nanotubes or graphene. The semiconductor junction may be a p-i-n semiconductor junction, a p-n semiconductor junction, an n-p semiconductor junction or an n-i-p semiconductor junction.

Abstract: A switching circuit includes a plurality of three-terminal PCM switching devices connected between a voltage supply terminal and a sub-block of logic. Each of the switching devices includes a PCM disposed in contact between a first terminal and a second terminal, a heating device disposed in contact between the second terminal and a third terminal, the heating device positioned proximate the PCM, and configured to switch the conductivity of a transformable portion of the PCM between a lower resistance state and a higher resistance state; and an insulating layer configured to electrically isolate the heater from said PCM material, and the heater from the first terminal. The third terminal of a first of the PCM switching devices is coupled to a set/reset switch, and the third terminal of the remaining PCM switching devices is coupled to the second terminal of an adjacent PCM switching device in a cascade configuration.

Abstract: A coupling structure for coupling piezoelectric material generated stresses to an actuated device of an integrated circuit includes a rigid stiffener structure formed around a piezoelectric (PE) material and the actuated device, the actuated device comprising a piezoresistive (PR) material that has an electrical resistance dependent upon an applied pressure thereto; and a soft buffer structure formed around the PE material and PR material, the buffer structure disposed between the PE and PR materials and the stiffener structure, wherein the stiffener structure clamps both the PE and PR materials to a substrate over which the PE and PR materials are formed, and wherein the soft buffer structure permits the PE material freedom to move relative to the PR material, thereby coupling stress generated by an applied voltage to the PE material to the PR material so as change the electrical resistance of the PR material.

Abstract: A electrometric access head includes a supporting substrate and a plurality of read elements mounted on the supporting substrate. Each read element includes an electrometric sensor for detection of a sign of polarization of domains within a ferroelectric data layer of a ferroelectric storage medium. The ferroelectric data layer serves as a layer for storing information as bits defined by the signs of polarization of domains within the ferroelectric data layer, each polarized domain including a volume dipole polarization within the ferroelectric data layer and including an area of bound charge on and adjacent to a surface of the ferroelectric data layer.

Abstract: A method of making a semiconductor device, includes providing a graphene sheet, creating a plurality of nanoholes in the graphene sheet to form a graphene nanomesh, the graphene nanomesh including a plurality of carbon atoms which are formed adjacent to the plurality of nanoholes, passivating a dangling bond on the plurality of carbon atoms by bonding a passivating element to the plurality of carbon atoms, and doping the passivated graphene nanomesh by bonding a dopant to the passivating element.

Abstract: A 4-terminal piezoelectronic transistor (PET) which includes a piezoelectric (PE) material disposed between first and second electrodes; an insulator material disposed on the second electrode; a third electrode disposed on the insulator material and a piezoresistive (PR) material disposed between the third electrode and a fourth electrode. An applied voltage across the first and second electrodes causing a pressure from the PE material to be applied to the PR material through the insulator material, the electrical resistance of the PR material being dependent upon the pressure applied by the PE material. The first and second electrodes are electrically isolated from the third and fourth electrodes. Also disclosed are logic devices fabricated from 4-terminal PETs and a method of fabricating a 4-terminal PET.